JP2017505998A5 - - Google Patents

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Publication number
JP2017505998A5
JP2017505998A5 JP2016549259A JP2016549259A JP2017505998A5 JP 2017505998 A5 JP2017505998 A5 JP 2017505998A5 JP 2016549259 A JP2016549259 A JP 2016549259A JP 2016549259 A JP2016549259 A JP 2016549259A JP 2017505998 A5 JP2017505998 A5 JP 2017505998A5
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JP
Japan
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glass substrate
ppm
cte2
cte1
main surface
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JP2016549259A
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English (en)
Japanese (ja)
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JP6505726B2 (ja
JP2017505998A (ja
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Priority claimed from PCT/US2015/013405 external-priority patent/WO2015116749A1/en
Publication of JP2017505998A publication Critical patent/JP2017505998A/ja
Publication of JP2017505998A5 publication Critical patent/JP2017505998A5/ja
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Publication of JP6505726B2 publication Critical patent/JP6505726B2/ja
Expired - Fee Related legal-status Critical Current
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JP2016549259A 2014-01-31 2015-01-29 半導体チップを相互接続するためのインタポーザを提供するための方法及び装置 Expired - Fee Related JP6505726B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201461934366P 2014-01-31 2014-01-31
US61/934,366 2014-01-31
PCT/US2015/013405 WO2015116749A1 (en) 2014-01-31 2015-01-29 Methods and apparatus for providing an interposer for interconnecting semiconductor chips

Publications (3)

Publication Number Publication Date
JP2017505998A JP2017505998A (ja) 2017-02-23
JP2017505998A5 true JP2017505998A5 (https=) 2018-03-22
JP6505726B2 JP6505726B2 (ja) 2019-04-24

Family

ID=52463211

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016549259A Expired - Fee Related JP6505726B2 (ja) 2014-01-31 2015-01-29 半導体チップを相互接続するためのインタポーザを提供するための方法及び装置

Country Status (7)

Country Link
US (2) US9472479B2 (https=)
EP (1) EP3100300A1 (https=)
JP (1) JP6505726B2 (https=)
KR (1) KR20160114710A (https=)
CN (1) CN106165088B (https=)
TW (1) TWI653713B (https=)
WO (1) WO2015116749A1 (https=)

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US11169326B2 (en) 2018-02-26 2021-11-09 Invensas Bonding Technologies, Inc. Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects
US11256004B2 (en) 2018-03-20 2022-02-22 Invensas Bonding Technologies, Inc. Direct-bonded lamination for improved image clarity in optical devices
US11515291B2 (en) 2018-08-28 2022-11-29 Adeia Semiconductor Inc. Integrated voltage regulator and passive components
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KR102564761B1 (ko) 2019-03-07 2023-08-07 앱솔릭스 인코포레이티드 패키징 기판 및 이를 포함하는 반도체 장치
US11901281B2 (en) 2019-03-11 2024-02-13 Adeia Semiconductor Bonding Technologies Inc. Bonded structures with integrated passive component
US11652039B2 (en) 2019-03-12 2023-05-16 Absolics Inc. Packaging substrate with core layer and cavity structure and semiconductor device comprising the same
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US11981501B2 (en) 2019-03-12 2024-05-14 Absolics Inc. Loading cassette for substrate including glass and substrate loading method to which same is applied
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JP7104245B2 (ja) 2019-08-23 2022-07-20 アブソリックス インコーポレイテッド パッケージング基板及びこれを含む半導体装置
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KR102948403B1 (ko) 2021-05-03 2026-04-02 삼성전자주식회사 반도체 패키지
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CN115677213B (zh) * 2022-11-16 2024-07-26 湖南兆湘光电高端装备研究院有限公司 化学强化层压玻璃制品及其制备方法
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CN121443101B (zh) * 2025-12-30 2026-04-10 厦门云天半导体科技有限公司 玻璃中介层堆叠基板及半导体封装结构

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