JP2017152541A5 - - Google Patents

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JP2017152541A5
JP2017152541A5 JP2016033597A JP2016033597A JP2017152541A5 JP 2017152541 A5 JP2017152541 A5 JP 2017152541A5 JP 2016033597 A JP2016033597 A JP 2016033597A JP 2016033597 A JP2016033597 A JP 2016033597A JP 2017152541 A5 JP2017152541 A5 JP 2017152541A5
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Japan
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paragraphs
shortening
technique
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disclosed
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JP2016033597A
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JP6620034B2 (ja
JP2017152541A (ja
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Priority claimed from JP2016033597A external-priority patent/JP6620034B2/ja
Priority to JP2016033597A priority Critical patent/JP6620034B2/ja
Priority to TW106101084A priority patent/TW201810533A/zh
Priority to US15/409,947 priority patent/US10546946B2/en
Priority to CN201710086452.XA priority patent/CN107123649B/zh
Priority to KR1020170022867A priority patent/KR20170099769A/ko
Publication of JP2017152541A publication Critical patent/JP2017152541A/ja
Publication of JP2017152541A5 publication Critical patent/JP2017152541A5/ja
Priority to US16/707,985 priority patent/US11217682B2/en
Publication of JP6620034B2 publication Critical patent/JP6620034B2/ja
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Description

また、特開2013−98192号公報(特許文献2)の[0128]段落〜[0135]段落および図39〜図41には、等方性のエッチングを用いて、サイドウォール長を短くする技術が開示されている。
特開2006−41354号公報 特開2013−98192号公報
JP2016033597A 2016-02-24 2016-02-24 半導体装置の製造方法 Active JP6620034B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2016033597A JP6620034B2 (ja) 2016-02-24 2016-02-24 半導体装置の製造方法
TW106101084A TW201810533A (zh) 2016-02-24 2017-01-13 半導體裝置之製造方法
US15/409,947 US10546946B2 (en) 2016-02-24 2017-01-19 Method for manufacturing semiconductor device having thinned fins
CN201710086452.XA CN107123649B (zh) 2016-02-24 2017-02-17 用于制造半导体器件的方法
KR1020170022867A KR20170099769A (ko) 2016-02-24 2017-02-21 반도체 장치의 제조 방법
US16/707,985 US11217682B2 (en) 2016-02-24 2019-12-09 Method for manufacturing semiconductor device having thinned fins

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016033597A JP6620034B2 (ja) 2016-02-24 2016-02-24 半導体装置の製造方法

Publications (3)

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JP2017152541A JP2017152541A (ja) 2017-08-31
JP2017152541A5 true JP2017152541A5 (ja) 2018-11-01
JP6620034B2 JP6620034B2 (ja) 2019-12-11

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Family Applications (1)

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JP2016033597A Active JP6620034B2 (ja) 2016-02-24 2016-02-24 半導体装置の製造方法

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US (2) US10546946B2 (ja)
JP (1) JP6620034B2 (ja)
KR (1) KR20170099769A (ja)
CN (1) CN107123649B (ja)
TW (1) TW201810533A (ja)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180151716A1 (en) 2016-11-28 2018-05-31 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and forming method thereof
US10727343B2 (en) * 2017-09-28 2020-07-28 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device having fin structures
US10170577B1 (en) 2017-12-04 2019-01-01 International Business Machines Corporation Vertical transport FETs having a gradient threshold voltage
CN109979943B (zh) * 2017-12-28 2022-06-21 联华电子股份有限公司 半导体元件及其制造方法
US10468428B1 (en) * 2018-04-19 2019-11-05 Silicon Storage Technology, Inc. Split gate non-volatile memory cells and logic devices with FinFET structure, and method of making same
US10535529B2 (en) 2018-06-05 2020-01-14 International Business Machines Corporation Semiconductor fin length variability control
US10727240B2 (en) 2018-07-05 2020-07-28 Silicon Store Technology, Inc. Split gate non-volatile memory cells with three-dimensional FinFET structure
KR102472571B1 (ko) * 2018-07-20 2022-12-01 삼성전자주식회사 반도체 소자
CN110858565B (zh) * 2018-08-24 2022-06-28 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法
JP2020043103A (ja) * 2018-09-06 2020-03-19 キオクシア株式会社 半導体記憶装置およびその製造方法
US10797142B2 (en) 2018-12-03 2020-10-06 Silicon Storage Technology, Inc. FinFET-based split gate non-volatile flash memory with extended source line FinFET, and method of fabrication
US10937794B2 (en) * 2018-12-03 2021-03-02 Silicon Storage Technology, Inc. Split gate non-volatile memory cells with FinFET structure and HKMG memory and logic gates, and method of making same
JP7232081B2 (ja) * 2019-03-01 2023-03-02 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
EP3840036A1 (en) 2019-12-19 2021-06-23 Imec VZW Cointegration method for forming a semiconductor device
US11114451B1 (en) * 2020-02-27 2021-09-07 Silicon Storage Technology, Inc. Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices
US11362100B2 (en) 2020-03-24 2022-06-14 Silicon Storage Technology, Inc. FinFET split gate non-volatile memory cells with enhanced floating gate to floating gate capacitive coupling
US11552085B2 (en) * 2020-09-28 2023-01-10 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including memory cell and fin arrangements
US11776816B2 (en) * 2020-12-02 2023-10-03 Synopsys, Inc. Fin patterning to reduce fin collapse and transistor leakage

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6885055B2 (en) * 2003-02-04 2005-04-26 Lee Jong-Ho Double-gate FinFET device and fabricating method thereof
US7115974B2 (en) * 2004-04-27 2006-10-03 Taiwan Semiconductor Manfacturing Company, Ltd. Silicon oxycarbide and silicon carbonitride based materials for MOS devices
JP2006041354A (ja) 2004-07-29 2006-02-09 Renesas Technology Corp 半導体装置及びその製造方法
KR100598109B1 (ko) * 2004-10-08 2006-07-07 삼성전자주식회사 비휘발성 기억 소자 및 그 형성 방법
US7494858B2 (en) * 2005-06-30 2009-02-24 Intel Corporation Transistor with improved tip profile and method of manufacture thereof
US7396711B2 (en) * 2005-12-27 2008-07-08 Intel Corporation Method of fabricating a multi-cornered film
US7781306B2 (en) * 2007-06-20 2010-08-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor substrate and method for manufacturing the same
JP5847537B2 (ja) 2011-10-28 2016-01-27 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
KR101964262B1 (ko) 2011-11-25 2019-04-02 삼성전자주식회사 반도체 소자 및 그 제조 방법
KR101823105B1 (ko) * 2012-03-19 2018-01-30 삼성전자주식회사 전계 효과 트랜지스터의 형성 방법
US9368388B2 (en) 2012-04-13 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus for FinFETs
KR101912582B1 (ko) 2012-04-25 2018-12-28 삼성전자 주식회사 반도체 장치 및 그 제조 방법
US8697515B2 (en) 2012-06-06 2014-04-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making a FinFET device
TWI540650B (zh) * 2014-08-06 2016-07-01 聯華電子股份有限公司 鰭狀場效電晶體元件製造方法
US9437445B1 (en) * 2015-02-24 2016-09-06 International Business Machines Corporation Dual fin integration for electron and hole mobility enhancement
US20170140992A1 (en) * 2015-11-16 2017-05-18 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor and method for fabricating the same

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