JP2016225415A5 - - Google Patents

Download PDF

Info

Publication number
JP2016225415A5
JP2016225415A5 JP2015108812A JP2015108812A JP2016225415A5 JP 2016225415 A5 JP2016225415 A5 JP 2016225415A5 JP 2015108812 A JP2015108812 A JP 2015108812A JP 2015108812 A JP2015108812 A JP 2015108812A JP 2016225415 A5 JP2016225415 A5 JP 2016225415A5
Authority
JP
Japan
Prior art keywords
layer
insulating layer
wiring
electrode
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2015108812A
Other languages
English (en)
Japanese (ja)
Other versions
JP6566726B2 (ja
JP2016225415A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2015108812A priority Critical patent/JP6566726B2/ja
Priority claimed from JP2015108812A external-priority patent/JP6566726B2/ja
Priority to US15/158,777 priority patent/US9668341B2/en
Publication of JP2016225415A publication Critical patent/JP2016225415A/ja
Publication of JP2016225415A5 publication Critical patent/JP2016225415A5/ja
Application granted granted Critical
Publication of JP6566726B2 publication Critical patent/JP6566726B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2015108812A 2015-05-28 2015-05-28 配線基板、及び、配線基板の製造方法 Active JP6566726B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2015108812A JP6566726B2 (ja) 2015-05-28 2015-05-28 配線基板、及び、配線基板の製造方法
US15/158,777 US9668341B2 (en) 2015-05-28 2016-05-19 Wiring substrate and method of making wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015108812A JP6566726B2 (ja) 2015-05-28 2015-05-28 配線基板、及び、配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2016225415A JP2016225415A (ja) 2016-12-28
JP2016225415A5 true JP2016225415A5 (enExample) 2018-02-15
JP6566726B2 JP6566726B2 (ja) 2019-08-28

Family

ID=57399545

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015108812A Active JP6566726B2 (ja) 2015-05-28 2015-05-28 配線基板、及び、配線基板の製造方法

Country Status (2)

Country Link
US (1) US9668341B2 (enExample)
JP (1) JP6566726B2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106548998A (zh) * 2015-09-17 2017-03-29 胡迪群 封装基材的制作方法
JP2018018868A (ja) * 2016-07-26 2018-02-01 イビデン株式会社 コイル基板及びその製造方法
JP6818534B2 (ja) * 2016-12-13 2021-01-20 キヤノン株式会社 プリント配線板、プリント回路板及び電子機器
CN107104091B (zh) * 2017-05-27 2019-07-05 华进半导体封装先导技术研发中心有限公司 一种半埋入线路基板结构及其制造方法
CN107835565B (zh) * 2017-10-24 2020-01-14 Oppo广东移动通信有限公司 印刷电路板及移动终端
JP7289620B2 (ja) 2018-09-18 2023-06-12 新光電気工業株式会社 配線基板、積層型配線基板、半導体装置
MY202414A (en) 2018-11-28 2024-04-27 Intel Corp Embedded reference layers fo semiconductor package substrates
JP7170685B2 (ja) * 2020-03-19 2022-11-14 株式会社東芝 アイソレータ
KR20210154454A (ko) * 2020-06-12 2021-12-21 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11214848A (ja) * 1998-01-29 1999-08-06 Denso Corp プリント配線基板およびプリント配線基板の製造方法
US8756804B2 (en) * 2010-09-29 2014-06-24 Samsung Electro-Mechanics Co., Ltd. Method of manufacturing printed circuit board
JP6162458B2 (ja) * 2013-04-05 2017-07-12 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
JP6169955B2 (ja) * 2013-04-17 2017-07-26 新光電気工業株式会社 配線基板及びその製造方法
US9000302B2 (en) 2013-04-17 2015-04-07 Shinko Electric Industries Co., Ltd. Wiring board
CN105845635B (zh) * 2015-01-16 2018-12-07 恒劲科技股份有限公司 电子封装结构

Similar Documents

Publication Publication Date Title
JP2016225415A5 (enExample)
JP2016192568A5 (enExample)
JP2014204005A5 (enExample)
JP2015191968A5 (ja) 配線基板及びその製造方法
JP2015070007A5 (enExample)
JP2013254830A5 (enExample)
JP2015122385A5 (enExample)
JP2009283739A5 (enExample)
JP2014022465A5 (enExample)
US20140159850A1 (en) Inductor formed in substrate
WO2009069398A1 (ja) セラミック複合多層基板及びその製造方法並びに電子部品
JP2012028735A5 (enExample)
MX386893B (es) Materiales de superficie decorativos multicapa que tienen materiales conductores incrustados, superficies sólidas hechas con los mismos, métodos de fabricación de tales materiales de revestimiento y uso de los mismos.
JP2013008880A5 (enExample)
JP2013247353A5 (enExample)
JP2016207957A5 (enExample)
JP2010103502A5 (ja) 半導体装置
JP2013098209A5 (enExample)
JP2013219191A5 (enExample)
JP2011071315A5 (enExample)
JP2014049558A5 (enExample)
CN103327756A (zh) 具有局部混合结构的多层电路板及其制作方法
JP2014143399A5 (enExample)
JP2015185773A5 (enExample)
JP2014239187A5 (enExample)