JP2016207829A - 絶縁ゲート型スイッチング素子 - Google Patents
絶縁ゲート型スイッチング素子 Download PDFInfo
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- JP2016207829A JP2016207829A JP2015087744A JP2015087744A JP2016207829A JP 2016207829 A JP2016207829 A JP 2016207829A JP 2015087744 A JP2015087744 A JP 2015087744A JP 2015087744 A JP2015087744 A JP 2015087744A JP 2016207829 A JP2016207829 A JP 2016207829A
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- 239000004065 semiconductor Substances 0.000 claims abstract description 59
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 239000000969 carrier Substances 0.000 claims abstract description 9
- 239000012535 impurity Substances 0.000 claims description 32
- 239000012212 insulator Substances 0.000 claims description 10
- 239000002344 surface layer Substances 0.000 description 102
- 239000010410 layer Substances 0.000 description 48
- 238000004519 manufacturing process Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
- H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7394—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
Abstract
Description
ドレイン電極78は、LOCOS膜70と境界絶縁膜20aの間に形成されている。ドレイン電極78は、LOCOS膜70と境界絶縁膜20aの間の位置で、デバイス層14に接している。
本明細書または図面に説明した技術要素は、単独であるいは各種の組み合わせによって技術的有用性を発揮するものであり、出願時請求項記載の組み合わせに限定されるものではない。また、本明細書または図面に例示した技術は複数目的を同時に達成するものであり、そのうちの一つの目的を達成すること自体で技術的有用性を持つものである。
12 :SOI基板
14 :デバイス層
16 :ボックス層
18 :ハンドル層
20 :境界絶縁膜
30 :ソース領域
40 :ベース領域
42 :メインベース領域
42a :表層部
44 :表層ベース領域
46 :コンタクト領域
50 :ドレイン領域
52 :ボトム領域
54 :ドリフト領域
56 :コンタクト領域
58 :高濃度n型領域
60 :界面絶縁膜
62 :高濃度p型領域
70 :LOCOS膜
72 :ゲート絶縁膜
74 :ゲート電極
76 :ソース電極
78 :ドレイン電極
80 :チャネル
82 :空乏層
Claims (10)
- 絶縁ゲート型スイッチング素子であって、
半導体基板と、
前記半導体基板の表面上に配置されているゲート絶縁膜と、
前記ゲート絶縁膜上に配置されているゲート電極、
を有しており、
前記半導体基板が、
前記表面に露出している第1導電型の第1半導体領域と、
前記表面に露出しており、前記第1半導体領域に接している第2導電型のベース領域と、
前記表面に露出しており、前記ベース領域に接しており、前記第1半導体領域から分離されている第1導電型の第2半導体領域、
を有しており、
前記ゲート電極が、前記第1半導体領域と前記第2半導体領域を分離している範囲の前記ベース領域に対して前記ゲート絶縁膜を介して対向しており、
前記ベース領域と前記第1半導体領域の界面である第1界面及び前記ベース領域と前記第2半導体領域の界面である第2界面の少なくとも一方に、前記ゲート絶縁膜から離れており、第1導電型の半導体の多数キャリアに対する抵抗が前記ベース領域よりも高い高抵抗領域が配置されている、
絶縁ゲート型スイッチング素子。 - MOSFET構造を有する請求項1の絶縁ゲート型スイッチング素子。
- 前記表面に配置されており、前記第1半導体領域に接続されている第1電極と、
前記表面に配置されており、前記第2半導体領域に接続されている第2電極、
をさらに有し、
前記高抵抗領域の少なくとも一部が、前記表面を平面視したときに前記第1電極と前記第2電極の間の範囲内に配置されている請求項1または2の絶縁ゲート型スイッチング素子。 - 前記高抵抗領域が、絶縁体によって構成されている請求項1〜3の何れか一項の絶縁ゲート型スイッチング素子。
- 前記高抵抗領域が、前記第2界面のうち、前記ゲート絶縁膜の近傍の位置を除く全体に形成されている請求項1〜4の何れか一項の絶縁ゲート型スイッチング素子。
- 前記第2界面に、間隔を開けて複数の前記高抵抗領域が配置されている請求項4の絶縁ゲート型スイッチング素子。
- 前記第2半導体領域が、前記高抵抗領域に接しているとともにその周囲の前記第2半導体領域よりも第1導電型不純物濃度が高い高濃度領域を有している請求項6の絶縁ゲート型スイッチング素子。
- 前記高抵抗領域が、前記ベース領域よりも第2導電型不純物濃度が高い第2導電型の領域によって構成されている請求項1〜3の何れか一項の絶縁ゲート型スイッチング素子。
- 前記高抵抗領域が、複数の絶縁体と、前記ベース領域よりも第2導電型不純物濃度が高い第2導電型の領域を有しており、
前記複数の絶縁体が、前記第2界面に、間隔を開けて配置されており、
前記第2導電型の領域が、前記複数の前記絶縁体の間の間隔に配置されている、
請求項1〜3の何れか一項の絶縁ゲート型スイッチング素子。 - 前記高抵抗領域が、前記第1界面に配置されている請求項1〜4の何れか一項の絶縁ゲート型スイッチング素子。
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JP2015087744A JP6299658B2 (ja) | 2015-04-22 | 2015-04-22 | 絶縁ゲート型スイッチング素子 |
US15/133,993 US9525062B2 (en) | 2015-04-22 | 2016-04-20 | Insulated gate switching element |
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JP2015087744A JP6299658B2 (ja) | 2015-04-22 | 2015-04-22 | 絶縁ゲート型スイッチング素子 |
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JP2016207829A true JP2016207829A (ja) | 2016-12-08 |
JP6299658B2 JP6299658B2 (ja) | 2018-03-28 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP7000912B2 (ja) | 2018-02-22 | 2022-01-19 | 株式会社豊田中央研究所 | 半導体装置 |
Families Citing this family (2)
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JP6568735B2 (ja) * | 2015-07-17 | 2019-08-28 | 日立オートモティブシステムズ株式会社 | スイッチ素子及び負荷駆動装置 |
CN106684135B (zh) * | 2017-01-10 | 2019-04-26 | 电子科技大学 | 一种高可靠性的soi-ligbt |
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JPH07221301A (ja) * | 1994-02-02 | 1995-08-18 | Sony Corp | 絶縁ゲート型電界効果トランジスタとその製法 |
JPH0897411A (ja) * | 1994-09-21 | 1996-04-12 | Fuji Electric Co Ltd | 横型高耐圧トレンチmosfetおよびその製造方法 |
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JP2010056216A (ja) * | 2008-08-27 | 2010-03-11 | Sharp Corp | 半導体装置およびその製造方法 |
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- 2015-04-22 JP JP2015087744A patent/JP6299658B2/ja not_active Expired - Fee Related
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- 2016-04-20 US US15/133,993 patent/US9525062B2/en active Active
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JPH07221301A (ja) * | 1994-02-02 | 1995-08-18 | Sony Corp | 絶縁ゲート型電界効果トランジスタとその製法 |
JPH0897411A (ja) * | 1994-09-21 | 1996-04-12 | Fuji Electric Co Ltd | 横型高耐圧トレンチmosfetおよびその製造方法 |
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JP2001102586A (ja) * | 1999-09-28 | 2001-04-13 | Toshiba Corp | 高耐圧半導体装置 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP7000912B2 (ja) | 2018-02-22 | 2022-01-19 | 株式会社豊田中央研究所 | 半導体装置 |
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JP6299658B2 (ja) | 2018-03-28 |
US9525062B2 (en) | 2016-12-20 |
US20160315190A1 (en) | 2016-10-27 |
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