JP2016143430A5 - - Google Patents

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Publication number
JP2016143430A5
JP2016143430A5 JP2015016977A JP2015016977A JP2016143430A5 JP 2016143430 A5 JP2016143430 A5 JP 2016143430A5 JP 2015016977 A JP2015016977 A JP 2015016977A JP 2015016977 A JP2015016977 A JP 2015016977A JP 2016143430 A5 JP2016143430 A5 JP 2016143430A5
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JP
Japan
Prior art keywords
signal
match
circuit
distance
clock
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JP2015016977A
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English (en)
Japanese (ja)
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JP6389438B2 (ja
JP2016143430A (ja
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Priority to JP2015016977A priority Critical patent/JP6389438B2/ja
Priority claimed from JP2015016977A external-priority patent/JP6389438B2/ja
Priority to US15/009,699 priority patent/US9911496B2/en
Publication of JP2016143430A publication Critical patent/JP2016143430A/ja
Publication of JP2016143430A5 publication Critical patent/JP2016143430A5/ja
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Publication of JP6389438B2 publication Critical patent/JP6389438B2/ja
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JP2015016977A 2015-01-30 2015-01-30 ｋ近傍法連想メモリ Expired - Fee Related JP6389438B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2015016977A JP6389438B2 (ja) 2015-01-30 2015-01-30 ｋ近傍法連想メモリ
US15/009,699 US9911496B2 (en) 2015-01-30 2016-01-28 Associative memory for realizing a k-nearest neighbors algorithm

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015016977A JP6389438B2 (ja) 2015-01-30 2015-01-30 ｋ近傍法連想メモリ

Publications (3)

Publication Number Publication Date
JP2016143430A JP2016143430A (ja) 2016-08-08
JP2016143430A5 true JP2016143430A5 (enExample) 2018-01-18
JP6389438B2 JP6389438B2 (ja) 2018-09-12

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JP2015016977A Expired - Fee Related JP6389438B2 (ja) 2015-01-30 2015-01-30 ｋ近傍法連想メモリ

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US (1) US9911496B2 (enExample)
JP (1) JP6389438B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170364473A1 (en) * 2016-03-31 2017-12-21 Wave Computing, Inc. Program counter alignment across a reconfigurable hum fabric
FR3096796B1 (fr) * 2019-05-28 2021-06-18 St Microelectronics Grenoble 2 Dispositif à plusieurs domaines d'horloge

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3037089B2 (ja) * 1994-12-14 2000-04-24 川崎製鉄株式会社 連想メモリ
US5893137A (en) * 1996-11-29 1999-04-06 Motorola, Inc. Apparatus and method for implementing a content addressable memory circuit with two stage matching
US6934795B2 (en) * 1999-09-23 2005-08-23 Netlogic Microsystems, Inc. Content addressable memory with programmable word width and programmable priority
JP3861157B2 (ja) * 2004-02-27 2006-12-20 国立大学法人広島大学 参照データ最適化装置とパターン認識システム
US8644624B2 (en) * 2009-07-28 2014-02-04 Samsung Electronics Co., Ltd. System and method for indoor-outdoor scene classification
JP6327717B2 (ja) * 2013-07-25 2018-05-23 国立大学法人広島大学 ｋ近傍法連想メモリ
US9269041B2 (en) * 2013-10-22 2016-02-23 In2H2 Hardware enhancements to radial basis function with restricted coulomb energy learning and/or K-nearest neighbor based neural network classifiers
US9824162B1 (en) * 2016-09-26 2017-11-21 Cisco Technology, Inc. Associative memory including multiple cascaded associative memory blocks and its use in forwarding packets in a network

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