JP2015527639A5 - - Google Patents

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Publication number
JP2015527639A5
JP2015527639A5 JP2015519326A JP2015519326A JP2015527639A5 JP 2015527639 A5 JP2015527639 A5 JP 2015527639A5 JP 2015519326 A JP2015519326 A JP 2015519326A JP 2015519326 A JP2015519326 A JP 2015519326A JP 2015527639 A5 JP2015527639 A5 JP 2015527639A5
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JP
Japan
Prior art keywords
clock
input signal
domain
confirmation
frequency
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Application number
JP2015519326A
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English (en)
Japanese (ja)
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JP2015527639A (ja
JP6356669B2 (ja
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Priority claimed from GB1211426.0A external-priority patent/GB2503474B/en
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Publication of JP2015527639A publication Critical patent/JP2015527639A/ja
Publication of JP2015527639A5 publication Critical patent/JP2015527639A5/ja
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Publication of JP6356669B2 publication Critical patent/JP6356669B2/ja
Expired - Fee Related legal-status Critical Current
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JP2015519326A 2012-06-27 2013-06-20 クロック・ドメイン間のデータ転送 Expired - Fee Related JP6356669B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB1211426.0 2012-06-27
GB1211426.0A GB2503474B (en) 2012-06-27 2012-06-27 Data transfer between clock domains
PCT/GB2013/051607 WO2014001764A1 (en) 2012-06-27 2013-06-20 Data transfer between clock domains

Publications (3)

Publication Number Publication Date
JP2015527639A JP2015527639A (ja) 2015-09-17
JP2015527639A5 true JP2015527639A5 (https=) 2016-08-12
JP6356669B2 JP6356669B2 (ja) 2018-07-11

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ID=46704316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015519326A Expired - Fee Related JP6356669B2 (ja) 2012-06-27 2013-06-20 クロック・ドメイン間のデータ転送

Country Status (8)

Country Link
US (1) US10114407B2 (https=)
EP (1) EP2847666B1 (https=)
JP (1) JP6356669B2 (https=)
KR (1) KR20150037898A (https=)
CN (1) CN104412220B (https=)
GB (1) GB2503474B (https=)
TW (1) TWI585570B (https=)
WO (1) WO2014001764A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110502066B (zh) * 2019-08-15 2021-03-02 Oppo广东移动通信有限公司 时钟切换装置、方法及电子设备
CN112036103B (zh) * 2020-09-01 2024-03-08 深圳市傲立电子有限公司 一种从快时钟域跨慢时钟域处理多比特数据的装置及方法
CN117561489A (zh) * 2021-06-22 2024-02-13 谷歌有限责任公司 配置和状态寄存器的独立计时
CN114185396B (zh) * 2021-07-19 2026-03-17 芯华章科技股份有限公司 设计的时钟域转换方法、验证系统及存储介质

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5987081A (en) * 1997-06-27 1999-11-16 Sun Microsystems, Inc. Method and apparatus for a testable high frequency synchronizer
JP3560793B2 (ja) 1997-11-27 2004-09-02 株式会社東芝 データ転送方法
US6549593B1 (en) * 1999-07-19 2003-04-15 Thomson Licensing S.A. Interface apparatus for interfacing data to a plurality of different clock domains
JP4009592B2 (ja) * 2001-08-03 2007-11-14 アルテラ コーポレイション クロックロス検出およびスイッチオーバー回路
US7085952B2 (en) * 2001-09-14 2006-08-01 Medtronic, Inc. Method and apparatus for writing data between fast and slow clock domains
US7161999B2 (en) * 2002-01-02 2007-01-09 Intel Corporation Synchronizing data or signal transfer across clocked logic domains
DE10255685B3 (de) * 2002-11-28 2004-07-29 Infineon Technologies Ag Taktsynchronisationsschaltung
US7562244B2 (en) * 2003-05-09 2009-07-14 Koninklijke Philips Electronics N.V. Method for data signal transfer across different clock-domains
US6949955B2 (en) * 2003-11-24 2005-09-27 Intel Corporation Synchronizing signals between clock domains
US7496779B2 (en) * 2006-06-13 2009-02-24 Via Technologies, Inc. Dynamically synchronizing a processor clock with the leading edge of a bus clock
JP4983349B2 (ja) * 2007-04-04 2012-07-25 セイコーエプソン株式会社 クロック監視回路及びルビジウム原子発振器
WO2008129364A1 (en) * 2007-04-23 2008-10-30 Nokia Corporation Transferring data between asynchronous clock domains
US7733130B2 (en) * 2008-03-06 2010-06-08 Oracle America, Inc. Skew tolerant communication between ratioed synchronous clocks
TWI443521B (zh) * 2010-03-26 2014-07-01 Nuvoton Technology Corp 匯流排介面、時脈控制裝置，以及時脈頻率控制方法
TWI417703B (zh) * 2010-07-22 2013-12-01 Genesys Logic Inc 相容於通用序列匯流排協定之時脈同步方法

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