JP2015518658A - 不均一多重量子井戸構造 - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
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- H01L21/02505—Layer structure consisting of more than two layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
- H01L21/02507—Alternating layers, e.g. superlattice
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02513—Microstructure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
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Abstract
Description
本出願は、「Non−Uniform Multiple Quantum Well Structures in Ultraviolet Light Emitting Diodes」の名称で2012年4月16日に出願された同時係属中の米国特許仮出願第61/624,683号の恩典を主張するものであり、当該仮出願は、参照により本明細書に組み入れられる。
4 量子井戸
10 放出デバイス
12 基材
14 中間層
16 n型クラッディング層
18 活性領域
20 p型ブロッキング層
22 p型クラッディング層
30 量子井戸
32 障壁
110 デバイス設計システム
112 デバイス設計
114 デバイス製作システム
116 物理デバイス
120 回路設計システム
122 回路設計
124 回路製作システム
126 回路
430 量子井戸
432 障壁
718 活性領域
730 量子井戸
732 量子障壁
734 量子障壁
740 サブスケールの量子井戸
742 サブスケールの量子障壁
1018 ヘテロ接合
1030 量子井戸
1032 障壁
1118 ヘテロ接合
1130 量子井戸
1134 量子井戸
1136 量子井戸
Claims (20)
- 活性領域を含む半導体構造であって、該活性領域が、複数の量子井戸と交互に配置された複数の障壁を含む発光ヘテロ構造を含み、該複数の障壁における障壁もしくは該複数の量子井戸における量子井戸のうちの少なくとも1つが、微細構造領域を含み、該微細構造領域が、成長方向もしくは横方向のうちの少なくとも1つの方向に配列された複数のサブスケールの特徴を含む、半導体構造を含むデバイス。
- 前記微細構造領域が、様々な組成の第一の横方向に離散された複数のサブスケールの特徴を含み、該微細構造領域が、実質的に連続する横方向の組成を有する、前記複数の障壁における障壁もしくは前記複数の量子井戸における量子井戸のうちの少なくとも1つに隣接する、請求項1に記載のデバイス。
- 前記微細構造領域が、さらに、様々な組成の、第二の横方向に離散した複数のサブ領域を含む第二微細構造に隣接し、該第二の横方向に離散した複数のサブ領域が、前記第一の横方向に離散された複数のサブ領域と横方向に互い違いになっている、請求項2に記載のデバイス。
- 前記微細構造領域が、交互に配置された圧縮応力および引張応力を有する複数のサブスケールの層を含む、請求項1に記載のデバイス。
- 前記微細構造領域が、サブスケールの障壁およびサブスケールの量子井戸の超格子構造を含む、請求項1に記載のデバイス。
- 前記サブスケールの障壁が、様々な高さの障壁を含み、前記サブスケールの量子井戸が、様々な深さの量子井戸を含む、請求項5に記載のデバイス。
- 前記微細構造領域が、障壁−量子井戸ヘテロ接合に隣接する前記複数の障壁における前記障壁にあり、前記サブスケールの障壁の高さが、前記ヘテロ接合に向かって減少する、請求項5に記載のデバイス。
- 前記微細構造領域が、前記複数の障壁における前記障壁に位置され、前記サブスケールの障壁のそれぞれの高さが、前記複数の障壁における前記障壁の障壁高さよりも高くない、請求項5に記載のデバイス。
- 前記微細構造領域が、前記複数の量子井戸における前記量子井戸に位置され、前記サブスケールの障壁のそれぞれの高さが、前記複数の量子井戸における前記量子井戸の量子井戸深さよりも高く、かつ前記量子井戸に隣接する一連の障壁のそれぞれよりも低い、請求項5に記載のデバイス。
- 前記サブスケールの特徴の少なくとも1つが横方向に不均一である、請求項1に記載のデバイス。
- 活性領域を含む半導体構造であって、該活性領域が、複数の量子井戸と交互に配置された複数の障壁を含む発光ヘテロ構造を含み、該複数の障壁における障壁もしくは該複数の量子井戸における量子井戸のうちの少なくとも1つが微細構造領域を含み、該微細構造領域が、交互に配置された圧縮応力および引張応力を有する複数のサブスケールの特徴を含む、半導体構造を含むデバイス。
- 前記半導体構造がIII族窒化物材料で構成される、請求項11に記載のデバイス。
- 前記複数の障壁における前記障壁が前記微細構造領域を含み、前記複数のサブスケールの特徴の少なくとも1つが、前記障壁のガリウム含有量よりも高いガリウム含有量を有する、請求項12に記載のデバイス。
- 前記複数の量子井戸における前記量子井戸が前記微細構造領域を含み、前記複数のサブスケールの特徴の少なくとも1つが、前記量子井戸のアルミニウム含有量よりも高いアルミニウム含有量を有する、請求項12に記載のデバイス。
- 前記複数のサブスケールの特徴が横方向に配列されている、請求項12に記載のデバイス。
- 半導体構造の活性領域を形成することを含み、該活性領域が発光ヘテロ構造を含み、該半導体構造の活性領域を形成することが、複数の量子井戸と交互に配置された複数の障壁を形成することを含み、該複数の障壁における障壁もしくは該複数の量子井戸における量子井戸のうちの少なくとも1つを形成することが、該複数の障壁における該障壁もしくは該複数の量子井戸における該量子井戸のうちの少なくとも1つに微細構造領域を形成することを含み、該微細構造領域が、成長方向もしくは横方向のうちの少なくとも1つの方向に配列された複数のサブスケールの特徴を含む、方法。
- 前記微細構造領域を形成することが、前記複数の障壁における前記障壁もしくは前記複数の量子井戸における前記量子井戸のうちの少なくとも1つのエピタキシャル成長の際にV/III比を調整することを含む、請求項16に記載の方法。
- 前記微細構造領域を形成することが、前記複数の障壁における前記障壁もしくは前記複数の量子井戸における前記量子井戸のうちの少なくとも1つのエピタキシャル成長の際に成長温度を調整することを含む、請求項16に記載の方法。
- 前記微細構造領域を形成することが、微細スケールの超格子構造を形成するために、前記複数の障壁における前記障壁もしくは前記複数の量子井戸における前記量子井戸のうちの少なくとも1つのエピタキシャル成長の間に、V/III比または成長温度の時間を調整することを含む、請求項16に記載の方法。
- 前記微細構造領域を形成することが、有機金属前駆体および窒素前駆体をスイッチオンおよびスイッチオフするタイミングのパターンを制御することにより、パルシングエピタキシャル成長(pulsing epitaxial growth)を含む、請求項16に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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US201261624683P | 2012-04-16 | 2012-04-16 | |
US61/624,683 | 2012-04-16 | ||
PCT/US2013/036784 WO2013158645A1 (en) | 2012-04-16 | 2013-04-16 | Non-uniform multiple quantum well structure |
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JP2015518658A true JP2015518658A (ja) | 2015-07-02 |
JP2015518658A5 JP2015518658A5 (ja) | 2016-07-14 |
JP6211057B2 JP6211057B2 (ja) | 2017-10-11 |
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JP2015505992A Active JP6211057B2 (ja) | 2012-04-16 | 2013-04-16 | 不均一多重量子井戸構造 |
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US (2) | US9722139B2 (ja) |
EP (1) | EP2839520B1 (ja) |
JP (1) | JP6211057B2 (ja) |
KR (1) | KR20150006444A (ja) |
WO (1) | WO2013158645A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN108808446A (zh) * | 2018-06-27 | 2018-11-13 | 潍坊华光光电子有限公司 | 一种具有位错折断结构的GaN基激光器外延结构及其生长方法 |
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JP6211057B2 (ja) | 2012-04-16 | 2017-10-11 | センサー エレクトロニック テクノロジー インコーポレイテッド | 不均一多重量子井戸構造 |
US9748440B2 (en) | 2013-05-23 | 2017-08-29 | Sensor Electronic Technology, Inc. | Semiconductor layer including compositional inhomogeneities |
US9406840B2 (en) | 2013-05-23 | 2016-08-02 | Sensor Electronic Technology, Inc. | Semiconductor layer including compositional inhomogeneities |
US9281441B2 (en) | 2013-05-23 | 2016-03-08 | Sensor Electronic Technology, Inc. | Semiconductor layer including compositional inhomogeneities |
US10923623B2 (en) | 2013-05-23 | 2021-02-16 | Sensor Electronic Technology, Inc. | Semiconductor layer including compositional inhomogeneities |
JP2016535436A (ja) * | 2013-10-21 | 2016-11-10 | センサー エレクトロニック テクノロジー インコーポレイテッド | 複合半導体層を含むヘテロ構造 |
CN105006505B (zh) | 2014-04-15 | 2019-03-15 | 传感器电子技术股份有限公司 | 具有应力管理的半导体异质结构 |
US9799793B2 (en) | 2014-04-15 | 2017-10-24 | Sensor Electronics Technology, Inc. | Semiconductor heterostructure with stress management |
FR3028670B1 (fr) * | 2014-11-18 | 2017-12-22 | Commissariat Energie Atomique | Structure semi-conductrice a couche de semi-conducteur du groupe iii-v ou ii-vi comprenant une structure cristalline a mailles cubiques ou hexagonales |
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US20130270519A1 (en) | 2013-10-17 |
WO2013158645A1 (en) | 2013-10-24 |
US9722139B2 (en) | 2017-08-01 |
US20170345968A1 (en) | 2017-11-30 |
US10164147B2 (en) | 2018-12-25 |
KR20150006444A (ko) | 2015-01-16 |
EP2839520A4 (en) | 2015-11-18 |
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