JP2015072996A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2015072996A
JP2015072996A JP2013207498A JP2013207498A JP2015072996A JP 2015072996 A JP2015072996 A JP 2015072996A JP 2013207498 A JP2013207498 A JP 2013207498A JP 2013207498 A JP2013207498 A JP 2013207498A JP 2015072996 A JP2015072996 A JP 2015072996A
Authority
JP
Japan
Prior art keywords
layer
intermetallic compound
connection terminal
metal
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2013207498A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015072996A5 (https=
Inventor
村山　啓
Hiroshi Murayama
啓 村山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2013207498A priority Critical patent/JP2015072996A/ja
Priority to US14/489,932 priority patent/US9129884B2/en
Publication of JP2015072996A publication Critical patent/JP2015072996A/ja
Publication of JP2015072996A5 publication Critical patent/JP2015072996A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H10W72/07253—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H10W72/07255—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H10W72/07338—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy hardening the adhesive by curing, e.g. thermosetting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/232—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H10W72/2528—Intermetallic compounds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass

Landscapes

  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP2013207498A 2013-10-02 2013-10-02 半導体装置 Pending JP2015072996A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013207498A JP2015072996A (ja) 2013-10-02 2013-10-02 半導体装置
US14/489,932 US9129884B2 (en) 2013-10-02 2014-09-18 Solder bump joining structure with low resistance joining member

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013207498A JP2015072996A (ja) 2013-10-02 2013-10-02 半導体装置

Publications (2)

Publication Number Publication Date
JP2015072996A true JP2015072996A (ja) 2015-04-16
JP2015072996A5 JP2015072996A5 (https=) 2016-08-25

Family

ID=52739305

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013207498A Pending JP2015072996A (ja) 2013-10-02 2013-10-02 半導体装置

Country Status (2)

Country Link
US (1) US9129884B2 (https=)
JP (1) JP2015072996A (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018093001A (ja) * 2016-11-30 2018-06-14 富士通株式会社 電子装置及び電子装置の製造方法
US10446513B2 (en) 2017-07-07 2019-10-15 Shinko Electric Industries Co., Ltd. Conductive ball having a tin-based solder covering an outer surface of the copper ball
WO2020136979A1 (ja) * 2018-12-28 2020-07-02 Ｊｘ金属株式会社 はんだ接合部
JP2023005616A (ja) * 2021-06-29 2023-01-18 凸版印刷株式会社 配線基板

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015122445A (ja) * 2013-12-24 2015-07-02 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP6330786B2 (ja) * 2015-11-16 2018-05-30 トヨタ自動車株式会社 半導体装置の製造方法
US20170173745A1 (en) 2015-12-22 2017-06-22 International Business Machines Corporation No clean flux composition and methods for use thereof
US10347602B1 (en) * 2018-07-23 2019-07-09 Mikro Mesa Technology Co., Ltd. Micro-bonding structure
US10388627B1 (en) * 2018-07-23 2019-08-20 Mikro Mesa Technology Co., Ltd. Micro-bonding structure and method of forming the same
US11854879B2 (en) * 2020-02-26 2023-12-26 Raytheon Company Cu3Sn via metallization in electrical devices for low-temperature 3D-integration
KR20230058949A (ko) * 2021-10-25 2023-05-03 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001274201A (ja) * 2000-03-27 2001-10-05 Toshiba Corp 電子デバイス及びその製造方法
JP2010003878A (ja) * 2008-06-20 2010-01-07 Fujitsu Ltd 回路基板及びその製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005095977A (ja) 2003-08-26 2005-04-14 Sanyo Electric Co Ltd 回路装置
JP4961617B2 (ja) * 2007-10-01 2012-06-27 新光電気工業株式会社 配線基板とその製造方法及び半導体装置
JP5536322B2 (ja) * 2007-10-09 2014-07-02 新光電気工業株式会社 基板の製造方法
JP4949279B2 (ja) * 2008-01-21 2012-06-06 新光電気工業株式会社 配線基板及びその製造方法
US9607936B2 (en) * 2009-10-29 2017-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Copper bump joint structures with improved crack resistance
US8338945B2 (en) * 2010-10-26 2012-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Molded chip interposer structure and methods
US20120248176A1 (en) * 2011-04-01 2012-10-04 Herron Derrick Matthew Solder pastes for providing impact resistant, mechanically stable solder joints
JP6028449B2 (ja) 2011-10-05 2016-11-16 富士通株式会社 半導体装置、電子装置、半導体装置の製造方法
US8779588B2 (en) * 2011-11-29 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structures for multi-chip packaging
US9646942B2 (en) * 2012-02-23 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for controlling bump height variation
JP6006523B2 (ja) * 2012-04-27 2016-10-12 新光電気工業株式会社 接続構造体、配線基板ユニット、電子回路部品ユニット、及び電子装置
US8829673B2 (en) * 2012-08-17 2014-09-09 Taiwan Semiconductor Manufacturing Company, Ltd. Bonded structures for package and substrate
US20140361070A1 (en) * 2013-06-05 2014-12-11 The Research Foundation For The State University Of New York Solder alloys

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001274201A (ja) * 2000-03-27 2001-10-05 Toshiba Corp 電子デバイス及びその製造方法
JP2010003878A (ja) * 2008-06-20 2010-01-07 Fujitsu Ltd 回路基板及びその製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018093001A (ja) * 2016-11-30 2018-06-14 富士通株式会社 電子装置及び電子装置の製造方法
US10446513B2 (en) 2017-07-07 2019-10-15 Shinko Electric Industries Co., Ltd. Conductive ball having a tin-based solder covering an outer surface of the copper ball
WO2020136979A1 (ja) * 2018-12-28 2020-07-02 Ｊｘ金属株式会社 はんだ接合部
JPWO2020136979A1 (ja) * 2018-12-28 2021-09-09 Ｊｘ金属株式会社 はんだ接合部
JP2023005616A (ja) * 2021-06-29 2023-01-18 凸版印刷株式会社 配線基板
JP7815630B2 (ja) 2021-06-29 2026-02-18 Ｔｏｐｐａｎホールディングス株式会社 配線基板

Also Published As

Publication number Publication date
US20150091162A1 (en) 2015-04-02
US9129884B2 (en) 2015-09-08

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