JP2014120635A - Optical device and method of manufacturing optical device - Google Patents

Optical device and method of manufacturing optical device Download PDF

Info

Publication number
JP2014120635A
JP2014120635A JP2012275215A JP2012275215A JP2014120635A JP 2014120635 A JP2014120635 A JP 2014120635A JP 2012275215 A JP2012275215 A JP 2012275215A JP 2012275215 A JP2012275215 A JP 2012275215A JP 2014120635 A JP2014120635 A JP 2014120635A
Authority
JP
Japan
Prior art keywords
base substrate
lid
metal film
optical device
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2012275215A
Other languages
Japanese (ja)
Other versions
JP6281858B2 (en
Inventor
Keiichiro Hayashi
恵一郎 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP2012275215A priority Critical patent/JP6281858B2/en
Publication of JP2014120635A publication Critical patent/JP2014120635A/en
Application granted granted Critical
Publication of JP6281858B2 publication Critical patent/JP6281858B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Led Device Packages (AREA)
  • Light Receiving Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an optical device 1 having high airtightness and excellent weatherability, e.g., moisture resistance, sea-water resistance, and the like, at a low cost.SOLUTION: An optical device 1 includes a base substrate 2, an optical chip 3 mounted on the base substrate 2 and having an optical active region 4 on the surface on the reverse side of the base substrate 2, and a translucent lid 6 having a recess 5 and being bonded to the base substrate 2, while housing the optical chip 3 in the recess 5, by anodic bonding, intermetallic joining, solder joining, or the like, via a metal bonding material 10.

Description

本発明は、可視光の光を発光し又は検出する光学デバイス及びその製造方法に関する。   The present invention relates to an optical device that emits or detects visible light and a method for manufacturing the same.

フォトダイオードや発光ダイオードを用いた光学デバイスが実用化されている。例えば、照明装置の自動点灯制御、液晶ディスプレイのバックライトの明るさの制御、携帯電話のキーパッドのバックライト制御、監視カメラの暗視野切り替え制御等の分野で光検知の手段とし使用されている。また、発光素子と組み合わせて近接センサを構成し、物体の有無や距離の測定にも使用されている。   Optical devices using photodiodes and light emitting diodes have been put into practical use. For example, it is used as a light detection means in fields such as automatic lighting control of lighting devices, backlight brightness control of liquid crystal displays, backlight control of mobile phone keypads, and dark field switching control of surveillance cameras. . In addition, a proximity sensor is configured in combination with a light emitting element, and it is also used for measuring the presence or absence of an object and a distance.

図5は、この種の光学デバイスのパッケージ構造30を示す断面模式図である(特許文献1の図3)。ベースとなるセラミック基板31には固体撮像素子32が搭載される。セラミック基板31は3層又はそれ以上の多層構造をなし、層間に所定本数の導電膜33aがパターン形成される。各々の導電膜33aの一端はセラミック基板31上の固体撮像素子32の周辺部に近接配置され、そこに固体撮像素子32の電極部から引き出されたボンディングワイヤ34が接続される。一方、各々の導電膜33aの他端はセラミック基板31の外側面に露出しており、その露出部分に側面導電膜33bが形成される。そして、各々の側面導電膜33bにリード端子35がセラミック基板31の裏側方向に垂直に伸びるようにろう付けされる。さらに、セラミック基板31の上端部にはシールガラス36が接合され、シールガラス36によって固体撮像素子32が気密封止される。   FIG. 5 is a schematic cross-sectional view showing the package structure 30 of this type of optical device (FIG. 3 of Patent Document 1). A solid-state imaging device 32 is mounted on a ceramic substrate 31 serving as a base. The ceramic substrate 31 has a multilayer structure of three layers or more, and a predetermined number of conductive films 33a are patterned between the layers. One end of each conductive film 33a is disposed in the vicinity of the peripheral portion of the solid-state imaging device 32 on the ceramic substrate 31, and a bonding wire 34 drawn from the electrode portion of the solid-state imaging device 32 is connected thereto. On the other hand, the other end of each conductive film 33a is exposed on the outer surface of the ceramic substrate 31, and a side conductive film 33b is formed on the exposed portion. Then, the lead terminals 35 are brazed to the side conductive films 33b so as to extend perpendicularly to the back side direction of the ceramic substrate 31. Further, a sealing glass 36 is bonded to the upper end portion of the ceramic substrate 31, and the solid-state imaging device 32 is hermetically sealed by the sealing glass 36.

図6は、他の光学デバイスのパッケージ構造を示す断面模式図である(特許文献1の図2)。固体撮像装置41は、主にベース基板42、固体撮像素子43、樹脂枠44及び透明板45から構成される。ベース基板42はセラミック基板からなる平板構造を成す。固体撮像素子43はCCD素子からなりベース基板42の中央部に実装される。ベース基板42の両側は平面視半円状の凹部46が所定の間隔で形成される。ベース基板42の上には各々の凹部46面を経由して断面コの字形の厚膜導電材料からなる導電膜47が形成される。導電膜47の一端部47aは固体撮像素子43の周辺部に近接配置され、導電膜47の他端部47bはベース基板42の素子実装面とは反対側の面に延出し、その延出部分を基板表面に露出させて外部接続用の電極部とする。固体撮像素子43の上面周縁部には複数の電極部が形成され、この電極部と一端部47aはボンディングワイヤ48により接続される。樹脂枠44はベース基板42上の固体撮像素子43を取り囲むように形成される。透明板45はベース基板42の素子実装面との間に所定の空間を確保した状態で、樹脂枠44の上端部に接合される。これにより、従来の中空パッケージ構造に比較して製造工程が大幅に簡略化されることが記載されている。   FIG. 6 is a schematic cross-sectional view showing the package structure of another optical device (FIG. 2 of Patent Document 1). The solid-state imaging device 41 mainly includes a base substrate 42, a solid-state imaging device 43, a resin frame 44, and a transparent plate 45. The base substrate 42 has a flat plate structure made of a ceramic substrate. The solid-state image sensor 43 is composed of a CCD element and is mounted at the center of the base substrate 42. On both sides of the base substrate 42, concave portions 46 having a semicircular shape in plan view are formed at predetermined intervals. A conductive film 47 made of a thick film conductive material having a U-shaped cross section is formed on the base substrate 42 via the surface of each recess 46. One end portion 47a of the conductive film 47 is disposed in the vicinity of the peripheral portion of the solid-state imaging device 43, and the other end portion 47b of the conductive film 47 extends to the surface opposite to the element mounting surface of the base substrate 42, and the extended portion Is exposed to the substrate surface to form an electrode portion for external connection. A plurality of electrode portions are formed on the periphery of the upper surface of the solid-state imaging device 43, and the electrode portions and one end portion 47 a are connected by a bonding wire 48. The resin frame 44 is formed so as to surround the solid-state imaging device 43 on the base substrate 42. The transparent plate 45 is joined to the upper end portion of the resin frame 44 in a state where a predetermined space is secured between the transparent plate 45 and the element mounting surface of the base substrate 42. This describes that the manufacturing process is greatly simplified as compared with the conventional hollow package structure.

特開平10−144898号公報Japanese Patent Laid-Open No. 10-144898

図5に示される光学デバイスのパッケージ構造30では、多層構造のセラミック基板に階段状の凹部を形成し、その凹部の底面に固体撮像素子32を実装して気密封止用の空間を確保している。そのため、セラミック基板31の製造工程が煩雑になり、セラミック基板31の材料費や加工費が高くなる、という課題があった。   In the optical device package structure 30 shown in FIG. 5, a stepped recess is formed in a multilayer ceramic substrate, and a solid-state imaging device 32 is mounted on the bottom of the recess to secure a space for hermetic sealing. Yes. Therefore, the manufacturing process of the ceramic substrate 31 becomes complicated, and there is a problem that the material cost and processing cost of the ceramic substrate 31 are increased.

また、図6に示される固体撮像装置41のパッケージ構造では、樹脂枠44の上端部を平坦に形成し、透明板45とベース基板42との間に形成される中空部を気密封止するのは難しい。つまり、透明板45をベース基板42側に押圧しながら加熱すると、樹脂枠44は軟化して所定の高さの中空部を形成することが困難となる。また、樹脂枠44として熱硬化型樹脂に代えて紫外線硬化型樹脂を使用すると、紫外線をカットするフィルター機能を有する透明板45を使用することができなくなる。   In the package structure of the solid-state imaging device 41 shown in FIG. 6, the upper end portion of the resin frame 44 is formed flat, and the hollow portion formed between the transparent plate 45 and the base substrate 42 is hermetically sealed. Is difficult. That is, when the transparent plate 45 is heated while being pressed toward the base substrate 42, the resin frame 44 is softened and it becomes difficult to form a hollow portion having a predetermined height. In addition, when an ultraviolet curable resin is used as the resin frame 44 instead of the thermosetting resin, the transparent plate 45 having a filter function for cutting ultraviolet rays cannot be used.

本発明は上記課題に鑑みてなされたものであり、フィルター機能を有する透明板を使用することができ、簡単な工程で製造することができ、高気密性を有する光学デバイス及びその製造方法を提供することを目的とする。   The present invention has been made in view of the above problems, and provides an optical device that can use a transparent plate having a filter function, can be manufactured by a simple process, and has high airtightness, and a method for manufacturing the same. The purpose is to do.

本発明の光学デバイスは、ベース基板と、前記ベース基板に実装され、前記ベース基板とは反対側の表面に光学活性領域を有する光学チップと、凹部を有し、前記凹部に前記光学チップを収容して前記ベース基板に金属接合材を介して接合される透光性の蓋体と、を備えることとした。   The optical device of the present invention includes a base substrate, an optical chip mounted on the base substrate, having an optically active region on a surface opposite to the base substrate, a concave portion, and the optical chip is accommodated in the concave portion. And a translucent lid bonded to the base substrate through a metal bonding material.

また、前記金属接合材は、前記ベース基板の側に形成される第一金属膜と前記蓋体の側に形成される第二金属膜を含み、前記第一又は第二金属膜は、下地層がCr、Ni、Ta、Al、Cuのいずれかを含む層からなり、表面層がAu、Snのいずれかを含む層からなる積層構造を有することとした。   The metal bonding material includes a first metal film formed on the base substrate side and a second metal film formed on the lid side, and the first or second metal film is a base layer Is made of a layer containing any one of Cr, Ni, Ta, Al and Cu, and the surface layer has a laminated structure consisting of a layer containing either Au or Sn.

また、前記金属接合材は、前記ベース基板の側に形成される第一金属膜と前記蓋体の側に形成される第二金属膜を含み、前記第一又は第二金属膜はナノ銀粒子から形成されることとした。   The metal bonding material includes a first metal film formed on the base substrate side and a second metal film formed on the lid side, and the first or second metal film is a nano silver particle. It was decided to be formed from.

また、前記第一金属膜と前記第二金属膜とは超音波接合又は半田接合により接合されることとした。   Further, the first metal film and the second metal film are bonded by ultrasonic bonding or solder bonding.

前記金属接合材は導電膜を含み、前記ベース基板と前記蓋体6とが陽極接合により接合されることとした。   The metal bonding material includes a conductive film, and the base substrate and the lid body 6 are bonded by anodic bonding.

また、前記蓋体は特定の光の波長を透過するフィルター機能を有することとした。   The lid has a filter function of transmitting a specific wavelength of light.

本発明の光学デバイスの製造方法は、表面から反対側の裏面に貫通する貫通電極を備えるベース基板を準備するベース基板準備工程と、表面に光学活性領域を有する光学チップを前記表面とは反対側の裏面を前記ベース基板の表面に向けて実装する光学チップ実装工程と、凹部が形成される蓋体を準備する蓋体準備工程と、前記光学チップを前記凹部に収納して前記蓋体を前記ベース基板に設置する蓋体設置工程と、前記凹部を形成する側壁の上面と前記ベース基板の表面とを金属接合材を介在させて接合する接合工程と、を備えることとした。   The optical device manufacturing method of the present invention includes a base substrate preparing step of preparing a base substrate having a through electrode penetrating from the front surface to the back surface on the opposite side, and an optical chip having an optically active region on the surface opposite to the front surface. An optical chip mounting step for mounting the back surface of the base substrate toward the front surface of the base substrate; a lid body preparation step for preparing a lid body in which a recess is formed; A lid installation step to be installed on the base substrate, and a joining step of joining the upper surface of the side wall forming the recess and the surface of the base substrate with a metal joining material interposed therebetween are provided.

また、前記ベース基板準備工程は、前記ベース基板の前記蓋体が接合される領域の表面に第一金属膜を形成する工程と、前記蓋体準備工程は、前記側壁の上面に第二金属膜を形成する工程と、を含むこととした。   Further, the base substrate preparation step includes a step of forming a first metal film on a surface of a region of the base substrate to which the lid body is bonded, and the lid body preparation step includes a second metal film on an upper surface of the side wall. Forming the step.

また、前記接合工程は、前記第一金属膜と前記第二金属膜とを超音波接合又は半田接合により接合することとした。   In the bonding step, the first metal film and the second metal film are bonded by ultrasonic bonding or solder bonding.

また、前記接合工程は、前記蓋体と前記ベース基板とを陽極接合により接合することとした。   In the bonding step, the lid and the base substrate are bonded by anodic bonding.

また、前記光学チップ実装工程は、前記ベース基板に複数の前記光学チップを実装する工程であり、前記蓋体準備工程は、前記蓋体に複数の凹部を形成する工程を含み、前記蓋体設置工程は、複数の前記光学チップを複数の前記凹部にそれぞれに収納して前記蓋体を前記ベース基板に設置する工程であり、前記接合工程の後に、個々の光学デバイスに分離する分離工程を備えることとした。   The optical chip mounting step is a step of mounting a plurality of the optical chips on the base substrate, and the lid body preparing step includes a step of forming a plurality of recesses in the lid body, and the lid body installation step The step is a step of storing the plurality of optical chips in the plurality of concave portions, respectively, and placing the lid on the base substrate, and includes a separation step of separating into individual optical devices after the bonding step. It was decided.

本発明の光学デバイスは、ベース基板と、ベース基板に実装され、ベース基板とは反対側の表面に光学活性領域を有する光学チップと、凹部を有し、凹部に光学チップを収容してベース基板に金属接合材を介して接合される透光性の蓋体と、を備える。これにより、光学チップを収納する高気密性の空間を確実に形成することができ、構造が簡素なので低コストで光学デバイスを提供することができる。   An optical device according to the present invention includes a base substrate, an optical chip mounted on the base substrate and having an optically active region on a surface opposite to the base substrate, a concave portion, and the optical chip is accommodated in the concave portion. And a translucent lid that is joined via a metal joining material. As a result, a highly airtight space for accommodating the optical chip can be reliably formed, and the optical device can be provided at low cost because the structure is simple.

本発明の第一実施形態に係る光学デバイスの断面模式図である。It is a cross-sectional schematic diagram of the optical device which concerns on 1st embodiment of this invention. 本発明の第二実施形態に係る光学デバイスの製造方法を表す工程図である。It is process drawing showing the manufacturing method of the optical device which concerns on 2nd embodiment of this invention. 本発明の第二実施形態に係る光学デバイスの製造工程の説明図である。It is explanatory drawing of the manufacturing process of the optical device which concerns on 2nd embodiment of this invention. 本発明の第二実施形態に係る光学デバイスの製造工程の説明図である。It is explanatory drawing of the manufacturing process of the optical device which concerns on 2nd embodiment of this invention. 従来公知の光学デバイスのパッケージ構造を示す断面模式図である。It is a cross-sectional schematic diagram which shows the package structure of a conventionally well-known optical device. 従来公知の光学デバイスのパッケージ構造を示す断面模式図である。It is a cross-sectional schematic diagram which shows the package structure of a conventionally well-known optical device.

(第一実施形態)
図1は、本発明の第一実施形態に係る光学デバイス1の断面模式図である。光学デバイス1は、ベース基板2と、ベース基板2の上に実装される光学チップ3と、光学チップ3を収納しベース基板2に金属接合材10を介して接合される透光性の蓋体6とを備える。光学チップ3はベース基板2とは反対側の表面に光学活性領域4を有する。蓋体6は凹部5を有し、凹部5に光学チップ3を収容する。
(First embodiment)
FIG. 1 is a schematic cross-sectional view of an optical device 1 according to the first embodiment of the present invention. The optical device 1 includes a base substrate 2, an optical chip 3 mounted on the base substrate 2, and a translucent lid that houses the optical chip 3 and is bonded to the base substrate 2 via a metal bonding material 10. 6. The optical chip 3 has an optically active region 4 on the surface opposite to the base substrate 2. The lid 6 has a recess 5, and the optical chip 3 is accommodated in the recess 5.

具体的に説明する。ベース基板2は、ガラス材料(ソーダ石灰ガラス、硬質ガラス、アルミナガラス等)、石英、セラミックス、プラスチック材料(ガラスエポキシ樹脂、エポキシ系樹脂、アクリル系樹脂、ポリイミド系樹脂、アラミド不織布等)を使用することができる。蓋体6は透光性の材料を使用することができる。例えば、ガラス材料、石英、セラミックス、プラスチック材料を使用することができる。蓋体6として、特定の光の波長を透過するフィルター機能を有する材料を使用することができる。例えば、粉砕したリン酸塩ガラスを混入して視感度特性に近い分光特性を付与したガラス材料や透光性プラスチック材料を使用することができる。また、表面に光干渉膜を形成してフィルター機能を付与してもよい。光学チップ3として、フォトダイオード、発光素子等の光学チップを使用することができる。   This will be specifically described. The base substrate 2 uses glass materials (soda-lime glass, hard glass, alumina glass, etc.), quartz, ceramics, plastic materials (glass epoxy resin, epoxy resin, acrylic resin, polyimide resin, aramid nonwoven fabric, etc.). be able to. The lid 6 can be made of a translucent material. For example, glass materials, quartz, ceramics, and plastic materials can be used. As the lid 6, a material having a filter function that transmits a specific wavelength of light can be used. For example, a glass material or a translucent plastic material to which a pulverized phosphate glass is mixed to give a spectral characteristic close to the visibility characteristic can be used. Further, a filter function may be imparted by forming a light interference film on the surface. As the optical chip 3, an optical chip such as a photodiode or a light emitting element can be used.

ベース基板2は、板厚方向に貫通する貫通電極11と、貫通電極11に電気的に接続し、ベース基板2の表面に形成される内部電極9と、表面とは反対側の裏面に形成される外部電極8とを備える。貫通電極11は、Ag、Au系の貴金属ペーストや、Cu、Ni系の卑金属ペースト等の圧膜導電体材料により、また、Cuの電解メッキ又は無電解メッキにより形成することができる。また、コバール、ステンレス等の金属線材から形成することができる。内部電極9は、単層の金属膜の他に、Au/Ni/Cuの積層構造としてもよい。   The base substrate 2 is formed on the through electrode 11 that penetrates in the plate thickness direction, the internal electrode 9 that is electrically connected to the through electrode 11 and formed on the surface of the base substrate 2, and the back surface opposite to the surface. The external electrode 8 is provided. The through electrode 11 can be formed of a pressure film conductor material such as Ag or Au-based noble metal paste, Cu or Ni-based base metal paste, or by electrolytic plating or electroless plating of Cu. Moreover, it can form from metal wires, such as Kovar and stainless steel. The internal electrode 9 may have a laminated structure of Au / Ni / Cu other than a single-layer metal film.

ベース基板2と蓋体6とは金属接合材10を介して陽極接合、超音波接合、又は半田接合により接合される。陽極接合の場合は、例えば、ベース基板2と蓋体6にソーダ石灰ガラスを使用し、金属接合材10としてベース基板2又は蓋体6のいずれかの接合領域にアルミニウム膜、シリコン膜等からなる導電膜を形成する。そして、ベース蓋体6を基板2に加圧しながら300℃〜450℃に加熱し、接合部に数100Vの高電圧を印加して行うことができる。   The base substrate 2 and the lid body 6 are bonded by anodic bonding, ultrasonic bonding, or solder bonding through a metal bonding material 10. In the case of anodic bonding, for example, soda lime glass is used for the base substrate 2 and the lid 6, and the metal bonding material 10 is made of an aluminum film, a silicon film, or the like in either the base substrate 2 or the lid 6. A conductive film is formed. And it can carry out by heating to 300 to 450 degreeC, pressurizing the base cover body 6 to the board | substrate 2, and applying a several hundred volts high voltage to a junction part.

また、超音波接合の場合は、ベース基板2と蓋体6にガラス材料、セラミックス、プラスチック材料を使用し、ベース基板2の表面外周に金属接合材10としての第一金属膜10aを形成し、蓋体6の凹部5を形成する側壁の上面に金属接合材10としての第二金属膜10bを形成する。そして、ベース基板2に蓋体6を載置し第一金属膜10aと第二金属膜10bを密着させて、加熱及び加圧しながら超音波を印加して接合することができる。ここで、第一金属膜10aや第二金属膜10bとして、例えばAg、Cu、Ni、Au、Cr、Al等の単体層、或いはこれらの積層構成を用いることができる。また、第一金属膜10aや第二金属膜10bは、下地のベース基板2又は蓋体6に対して密着性の良い材料からなる下地層と、金属間接合の容易な表面層とからなる積層構造とすることができる。下地層は、例えばCr、Ni、Ta、Al、Cuのいずれかを含み、表面層は、例えばAu、Snのいずれかを含むようにする。例えば、下地層としてCuを約2wt%含むAlとすれば、下地に対する密着性を向上させることができる。また、第一又は第二金属膜10a、10bとして、或いは第一及び第二金属膜10a、10bとしてナノ銀粒子からなる層を形成することができる。ナノ銀粒子は直径が1nm〜10nmの銀粒子からなり、温度100℃〜200℃の比較的低い温度で高い反応性を有する。従って、ベース基板2と蓋体6とを比較的低温で接合することができる。   In the case of ultrasonic bonding, a glass material, ceramics, or plastic material is used for the base substrate 2 and the lid 6, and a first metal film 10 a as a metal bonding material 10 is formed on the outer periphery of the surface of the base substrate 2. A second metal film 10 b as a metal bonding material 10 is formed on the upper surface of the side wall that forms the recess 5 of the lid 6. Then, the lid body 6 is placed on the base substrate 2 and the first metal film 10a and the second metal film 10b are brought into close contact with each other. Here, as the first metal film 10a and the second metal film 10b, for example, a single layer of Ag, Cu, Ni, Au, Cr, Al, or a laminated structure thereof can be used. Further, the first metal film 10a and the second metal film 10b are a laminate composed of a base layer made of a material having good adhesion to the base substrate 2 or the cover 6 and a surface layer that can be easily bonded to each other. It can be a structure. The underlayer includes, for example, any one of Cr, Ni, Ta, Al, and Cu, and the surface layer includes, for example, any of Au and Sn. For example, if the base layer is made of Al containing about 2 wt% Cu, the adhesion to the base can be improved. Moreover, the layer which consists of nano silver particles can be formed as 1st or 2nd metal film 10a, 10b, or 1st and 2nd metal film 10a, 10b. The nano silver particles are composed of silver particles having a diameter of 1 nm to 10 nm and have high reactivity at a relatively low temperature of 100 ° C. to 200 ° C. Therefore, the base substrate 2 and the lid body 6 can be bonded at a relatively low temperature.

このように、光学チップ3が実装されるベース基板2に蓋体6を被せる構造なので、温度設定や加圧の大きさによって内部空間が潰れることがなく、光学チップ3を確実に収納することができる。また、簡素な構造なので低コストで製造することができる。更に、ベース基板2と蓋体6とを金属接合材10を用いて接合するので、気密性が高く耐湿性、耐海水性、耐温度性等の耐候性に優れた光学デバイス1を提供することができる。   As described above, the lid 6 is covered with the base substrate 2 on which the optical chip 3 is mounted. Therefore, the internal space is not crushed by the temperature setting or the magnitude of pressurization, and the optical chip 3 can be securely stored. it can. Moreover, since it is a simple structure, it can be manufactured at low cost. Furthermore, since the base substrate 2 and the lid 6 are bonded using the metal bonding material 10, the optical device 1 having high airtightness and excellent weather resistance such as moisture resistance, seawater resistance, and temperature resistance is provided. Can do.

また、母材たるベース基板2と蓋体6とを金属接合材10を用いて接合するため、母材の融点温度よりも低い温度で接合できることとなり、高精度な製品の出来上がり寸法を実現することができる。さらに、母材たるベース基板2と蓋体6とを金属接合材10を用いて接合するため、母材の融点温度よりも低い温度で接合できることとなり、例えば、非常に薄い厚さの蓋体6を適用することもできる。また、金属接合材10が、ベース基板2と蓋体6の間に浸透するため、気密性が高いとともに、接合面が複雑な形状であっても接合することができる。   In addition, since the base substrate 2 and the lid body 6 which are the base materials are joined using the metal joining material 10, it is possible to join them at a temperature lower than the melting point temperature of the base material, thereby realizing a finished product with high accuracy. Can do. Furthermore, since the base substrate 2 as the base material and the lid body 6 are joined using the metal joining material 10, it can be joined at a temperature lower than the melting point temperature of the base material. For example, the lid body 6 having a very thin thickness. Can also be applied. Moreover, since the metal bonding material 10 permeates between the base substrate 2 and the lid body 6, the metal bonding material 10 has high airtightness and can be bonded even if the bonding surface has a complicated shape.

(第二実施形態)
図2は、本発明の第二実施形態に係る光学デバイスの製造方法を表す工程図である。図3及び図4は、本発明の第二実施形態に係る光学デバイスの製造工程の説明図である。同一の部分又は同一の機能を有する部分には同一の符号を付している。
(Second embodiment)
FIG. 2 is a process diagram illustrating a method for manufacturing an optical device according to the second embodiment of the present invention. 3 and 4 are explanatory diagrams of the optical device manufacturing process according to the second embodiment of the present invention. The same portions or portions having the same function are denoted by the same reference numerals.

まず、ベース基板準備工程S1において、表面から反対側の裏面に貫通する貫通電極11を備えるベース基板2を準備する。次に、光学チップ実装工程S2において、表面に光学活性領域4を有する光学チップ3をベース基板2の表面に実装する。また、蓋体準備工程S3において、凹部5が形成される蓋体6を準備する。次に、蓋体設置工程S4において、光学チップ3を凹部5に収納して蓋体6をベース基板2に設置する。次に、接合工程S5において、凹部5を形成する側壁の上面とベース基板2の表面とを金属接合材10を介在させて接合する。接合は、陽極接合、超音波接合又は半田接合により行うことができる。次に、外部電極形成工程S6において、ベース基板2の裏面に、貫通電極11と電気的に接続する外部電極8を形成する。   First, in the base substrate preparation step S1, the base substrate 2 including the through electrodes 11 penetrating from the front surface to the back surface on the opposite side is prepared. Next, in the optical chip mounting step S <b> 2, the optical chip 3 having the optically active region 4 on the surface is mounted on the surface of the base substrate 2. Moreover, the cover body 6 in which the recessed part 5 is formed is prepared in cover body preparation process S3. Next, in the lid installation step S <b> 4, the optical chip 3 is accommodated in the recess 5 and the lid 6 is installed on the base substrate 2. Next, in the bonding step S5, the upper surface of the side wall forming the recess 5 and the surface of the base substrate 2 are bonded with the metal bonding material 10 interposed. Bonding can be performed by anodic bonding, ultrasonic bonding, or solder bonding. Next, in the external electrode forming step S <b> 6, the external electrode 8 that is electrically connected to the through electrode 11 is formed on the back surface of the base substrate 2.

このように、凹部5が形成される蓋体6を、光学チップ3を実装したベース基板2に、金属接合材10を介して接合する。そのため、構造が簡素であり、光学チップ3を確実に収納することができ、気密性が高く、耐候性に優れた光学デバイス1を低コストで製造することができる。なお、ベース基板2、蓋体6、金属接合材10、ベース基板2のそれぞれの材料については第一実施形態において説明したと同様なので説明を省略する。また、外部電極形成工程S6は、ベース基板準備工程S1の際に形成しておくことができるので、本発明の必須要件でない。また、S1〜S6は必ずしも製造工程の順番を表すものではなく、蓋体準備工程S3は蓋体設置工程S4の前であればよく、外部電極形成工程S6はどの段階で実施してもよい。   In this manner, the lid body 6 in which the concave portion 5 is formed is bonded to the base substrate 2 on which the optical chip 3 is mounted via the metal bonding material 10. Therefore, the structure is simple, the optical chip 3 can be securely stored, the optical device 1 having high airtightness and excellent weather resistance can be manufactured at low cost. In addition, since each material of the base substrate 2, the lid body 6, the metal bonding material 10, and the base substrate 2 is the same as that described in the first embodiment, the description thereof is omitted. Further, the external electrode formation step S6 is not an essential requirement of the present invention because it can be formed during the base substrate preparation step S1. Further, S1 to S6 do not necessarily represent the order of the manufacturing steps, and the lid body preparation step S3 may be performed before the lid body installation step S4, and the external electrode formation step S6 may be performed at any stage.

以下、図3及び図4を参照して具体的に説明する。以下、ベース基板2としてソーダ石灰ガラスを使用し、蓋体6として粉砕したリン酸塩ガラスが混入するソーダ石灰ガラスを使用する。また、光学チップ3としてフォトダイオードを使用し、ベース基板2と蓋体6との間を超音波接合による封止する例である。   Hereinafter, a specific description will be given with reference to FIGS. 3 and 4. Hereinafter, soda lime glass is used as the base substrate 2, and soda lime glass mixed with pulverized phosphate glass is used as the lid 6. Further, in this example, a photodiode is used as the optical chip 3, and the base substrate 2 and the lid 6 are sealed by ultrasonic bonding.

図3(S1)は、ベース基板準備工程S1におけるベース基板2の断面模式図である。まず、型成形法によりベース基板2を軟化させて貫通孔を形成する。次に、貫通孔に貫通電極11を挿入して貫通電極11とベース基板2とを熱溶着する。貫通電極11は、金属材料、例えばコバール、ステンレス、42アロイ等を使用することができる。次に、ベース基板2を研削又は研磨して、少なくとも蓋体6を接合する側の表面を平坦化する。次に、内部電極9を貫通電極11と重なるように形成して貫通電極11に導通させる。内部電極9は、金属等からなる導電体を蒸着法、スパッタリング法、ディスペンス法或いは印刷法により形成することができる。更に、ベース基板2の蓋体6が接合される領域の表面に第一金属膜10aを形成する。   FIG. 3 (S1) is a schematic cross-sectional view of the base substrate 2 in the base substrate preparation step S1. First, the base substrate 2 is softened by a mold forming method to form a through hole. Next, the through electrode 11 is inserted into the through hole, and the through electrode 11 and the base substrate 2 are thermally welded. The through electrode 11 can be made of a metal material such as Kovar, stainless steel, 42 alloy, or the like. Next, the base substrate 2 is ground or polished to flatten at least the surface to which the lid body 6 is bonded. Next, the internal electrode 9 is formed so as to overlap the through electrode 11 and is electrically connected to the through electrode 11. The internal electrode 9 can be formed of a conductor made of metal or the like by a vapor deposition method, a sputtering method, a dispensing method, or a printing method. Further, the first metal film 10a is formed on the surface of the region where the lid 6 of the base substrate 2 is joined.

第一金属膜10aは、光学チップ3や貫通電極11が形成される領域を取り囲むように形成する。蒸着法、スパッタリング法等により金属膜をベース基板2の表面に堆積し、フォトリソグラフィ及びエッチング法により第一金属膜10aのパターンを形成することができる。また、ディスペンス法や印刷法によりナノ銀粒子膜のパターンを形成し、乾燥・焼成してナノ銀粒子から第一金属膜10aを形成することができる。なお、第一金属膜10aを形成する工程で同時に内部電極9を形成してもよい。   The first metal film 10a is formed so as to surround a region where the optical chip 3 and the through electrode 11 are formed. A metal film can be deposited on the surface of the base substrate 2 by vapor deposition, sputtering, or the like, and the pattern of the first metal film 10a can be formed by photolithography and etching. Moreover, the pattern of a nano silver particle film can be formed by the dispensing method or the printing method, and it can dry and bake and can form the 1st metal film 10a from a nano silver particle. In addition, you may form the internal electrode 9 simultaneously with the process of forming the 1st metal film 10a.

第一金属膜10aは、ベース基板2側に形成する下地層と、その上面に形成する表面層との積層構造とする。例えば、表面層としてAu、Snなどの比較的低温で接合可能な材料を使用し、下地層としてCr、Ni、Ta、Al,Cuのいずれかを含み、下地に対する密着性の高い材料を使用する。第一金属膜10aを、例えば、表面側からAu/Ni/Crの積層構造とすることができる。また、下地層としてCuを約2wt%を含むAl層を約1000Å形成すれば、ガラスに対して密着性を高めることができる。   The first metal film 10a has a laminated structure of a base layer formed on the base substrate 2 side and a surface layer formed on the upper surface thereof. For example, a material that can be bonded at a relatively low temperature, such as Au or Sn, is used as the surface layer, and a material that includes any one of Cr, Ni, Ta, Al, and Cu and has high adhesion to the base is used as the base layer. . For example, the first metal film 10a may have a laminated structure of Au / Ni / Cr from the surface side. In addition, if an Al layer containing about 2 wt% of Cu is formed as a base layer, adhesion to glass can be improved.

図3(S2)は、光学チップ実装工程S2におけるベース基板2及び光学チップ3の断面模式図である。表面に光学活性領域4を有する光学チップ3を光学活性領域4が形成される表面とは反対側の裏面をベース基板2の表面に向けて実装する。本実施形態においては、光学チップ3としてフォトダイオードチップを用い、光学活性領域4が受光面となる。光学チップ3の表面の光学活性領域4より外側には電極パッド12が形成され、この電極パッド12とベース基板2の表面に形成される内部電極9との間をワイヤーボンディングにより金線などからなるワイヤー7を接続する。これにより、光学チップ3と貫通電極11とが電気的に接続される。   FIG. 3 (S2) is a schematic cross-sectional view of the base substrate 2 and the optical chip 3 in the optical chip mounting step S2. The optical chip 3 having the optically active region 4 on the surface is mounted with the back surface opposite to the surface on which the optically active region 4 is formed facing the surface of the base substrate 2. In the present embodiment, a photodiode chip is used as the optical chip 3, and the optically active region 4 serves as a light receiving surface. An electrode pad 12 is formed outside the optically active region 4 on the surface of the optical chip 3, and a gold wire or the like is formed by wire bonding between the electrode pad 12 and the internal electrode 9 formed on the surface of the base substrate 2. Connect the wire 7. Thereby, the optical chip 3 and the through electrode 11 are electrically connected.

図3(S3)は、蓋体準備工程S3における蓋体6の断面模式図である。ガラス板を軟化点以上に加熱し型成形により中央部に凹部5を形成する。次に、凹部5を形成する側壁の上面を研削又は研磨して平坦化する。次に、スパッタリング法又は蒸着法により金属膜を堆積し、パターニングを行って凹部5を形成する側壁の上面に第二金属膜10bを形成する。また、ナノ銀粒子が分散する溶液をディスペンス法やインクジェット印刷法により側壁上面に塗布し、乾燥・焼成を行ってナノ銀粒子による第二金属膜10bを形成することができる。   FIG. 3 (S3) is a schematic cross-sectional view of the lid body 6 in the lid body preparation step S3. The glass plate is heated to a temperature above the softening point, and the concave portion 5 is formed in the central portion by molding. Next, the upper surface of the side wall forming the recess 5 is ground or polished to be flattened. Next, a metal film is deposited by sputtering or vapor deposition, and patterning is performed to form a second metal film 10b on the upper surface of the sidewall on which the recess 5 is formed. Further, a solution in which nano silver particles are dispersed can be applied to the upper surface of the side wall by a dispensing method or an ink jet printing method, and dried and baked to form the second metal film 10b made of nano silver particles.

第二金属膜10bは、蓋体6側に形成する下地層と、その上面に形成する表面層との積層構造とする。例えば、表面層としてAu、Snなどの比較的低温で接合可能な材料を使用し、下地層としてCr、Ni、Ta、Al,Cuのいずれかを含み、下地に対する密着性の高い材料を使用する。また、下地層としてCuを約2wt%を含むAl層を約1000Å形成すれば、ガラスに対して高い密着性を確保することができる。   The second metal film 10b has a laminated structure of a base layer formed on the lid 6 side and a surface layer formed on the upper surface thereof. For example, a material that can be bonded at a relatively low temperature, such as Au or Sn, is used as the surface layer, and a material that includes any one of Cr, Ni, Ta, Al, and Cu and has high adhesion to the base is used as the base layer. . Further, if an Al layer containing about 2 wt% of Cu is formed as a base layer, high adhesion to glass can be secured.

図3(S4)は、蓋体設置工程S4における蓋体6とベース基板2の断面模式図である。光学チップ3を凹部5に収納して蓋体6をベース基板2に設置する。このとき、ベース基板2に形成した第一金属膜10aと蓋体6の凹部5を形成する側壁の上面に形成した第二金属膜10bとを密着させる。   FIG. 3 (S4) is a schematic cross-sectional view of the lid body 6 and the base substrate 2 in the lid body installation step S4. The optical chip 3 is accommodated in the recess 5 and the lid 6 is set on the base substrate 2. At this time, the first metal film 10a formed on the base substrate 2 and the second metal film 10b formed on the upper surface of the side wall forming the recess 5 of the lid 6 are brought into close contact with each other.

図4(S5)は、接合工程S5を説明するための図である。蓋体6を設置したベース基板2をステージ16に設置し、蓋体6側を加圧ヘッド15により加圧し、温度250℃〜300℃に昇温する。そして、ステージ16又は加圧ヘッド15に超音波を印加して第一及び第二金属膜10a、10bに超音波振動を伝達する。これにより、蓋体6の凹部5を形成する側壁の上面とベース基板2の表面とを第一金属膜10a及び第二金属膜10bからなる金属接合材10を介在させて超音波接合する。これにより第一金属膜10aの表面層と第二金属膜10bの表面層とが金属間接合する。なお、超音波接合に代えて表面層どうしを熱溶着させることにより接合してもよいし、第一金属膜10aの表面層と第二金属膜10bの表面層とを半田により接合してもよい。また、ナノ銀粒子により第一又は第二金属膜10a、10b、或いは第一及び第二金属膜10a、10bを形成し、加熱圧着することにより溶着することができる。ナノ銀粒子は反応性が高いので、100℃〜200℃の比較的低温度で接合することができる。   FIG. 4 (S5) is a view for explaining the joining step S5. The base substrate 2 on which the lid body 6 is installed is placed on the stage 16, and the lid body 6 side is pressurized by the pressure head 15, and the temperature is raised to 250 ° C. to 300 ° C. Then, ultrasonic waves are applied to the stage 16 or the pressure head 15 to transmit ultrasonic vibrations to the first and second metal films 10a and 10b. Thereby, the upper surface of the side wall forming the concave portion 5 of the lid 6 and the surface of the base substrate 2 are ultrasonically bonded with the metal bonding material 10 composed of the first metal film 10a and the second metal film 10b interposed. As a result, the surface layer of the first metal film 10a and the surface layer of the second metal film 10b are metal-to-metal bonded. Instead of ultrasonic bonding, the surface layers may be bonded by heat welding, or the surface layer of the first metal film 10a and the surface layer of the second metal film 10b may be bonded by solder. . Further, the first or second metal film 10a, 10b or the first and second metal films 10a, 10b can be formed by nano silver particles, and can be welded by thermocompression bonding. Since nano silver particles have high reactivity, they can be bonded at a relatively low temperature of 100 ° C. to 200 ° C.

図4(S6)は、外部電極形成工程S6における蓋体6とベース基板2の断面模式図である。ベース基板2の外表面に貫通電極11と電気的に接続する外部電極8を形成する。外部電極8は、蒸着法やスパッタリング法により金属膜を堆積し、これをパターニングして形成してもよいし、印刷法により外部電極8のパターンを印刷し、焼成して形成してもよい。   FIG. 4 (S6) is a schematic cross-sectional view of the lid 6 and the base substrate 2 in the external electrode formation step S6. An external electrode 8 that is electrically connected to the through electrode 11 is formed on the outer surface of the base substrate 2. The external electrode 8 may be formed by depositing a metal film by a vapor deposition method or a sputtering method and patterning the metal film, or by printing a pattern of the external electrode 8 by a printing method and baking it.

以上の通り、ベース基板2と蓋体6とを金属接合材10を介在させて接合したので、気密性の高い高信頼性の光学デバイス1を簡便な製造プロセスにより低コストで製造することができる。   As described above, since the base substrate 2 and the lid body 6 are bonded with the metal bonding material 10 interposed, the highly reliable optical device 1 having high airtightness can be manufactured at a low cost by a simple manufacturing process. .

なお、上記実施形態では金属接合材10としてベース基板2に形成した第一金属膜10aと蓋体6に形成した第二金属膜10bとを、超音波接合や半田接合による例について説明したが、本発明はこれに限定されない。金属接合材10として、ベース基板2に形成する第一金属膜10aのみ、又は蓋体6に形成する第二金属膜10bのみとし、金属接合材10を形成した側を陽極に、金属接合材10を形成しない側を陰極にして陽極接合することができる。陽極接合は、接合面を350℃〜450℃に加熱、及び加圧し、400V〜600Vの電圧を印加して行う。金属接合材10として、Al、シリコン等の導電膜を使用することができる。   In the above-described embodiment, the first metal film 10a formed on the base substrate 2 as the metal bonding material 10 and the second metal film 10b formed on the lid 6 have been described as examples by ultrasonic bonding or solder bonding. The present invention is not limited to this. Only the first metal film 10a formed on the base substrate 2 or only the second metal film 10b formed on the lid 6 is used as the metal bonding material 10, and the side on which the metal bonding material 10 is formed serves as the anode, and the metal bonding material 10 It is possible to perform anodic bonding using the side not forming the cathode as a cathode. The anodic bonding is performed by heating and pressurizing the bonding surface to 350 ° C. to 450 ° C. and applying a voltage of 400V to 600V. As the metal bonding material 10, a conductive film such as Al or silicon can be used.

また、上記実施形態は、一個の光学デバイス1を製造する例について説明したが、多数個同時に形成する多数個取りの製造工程とすることができる。即ち、光学チップ実装工程S2は、ベース基板2に複数の光学チップ3を実装する。蓋体準備工程S3は、蓋体6に複数の凹部5を形成する。蓋体設置工程S4は、複数の光学チップ3を複数の凹部5にそれぞれ収納して蓋体6をベース基板2に設置する。そして、接合工程S5の後に、個々の光学デバイス1に分離する分離工程を備える。これにより、多数個の光学デバイス1を同時に製造することができる。   Moreover, although the said embodiment demonstrated the example which manufactures the one optical device 1, it can be set as the manufacturing process of multi-cavity forming many simultaneously. That is, in the optical chip mounting step S <b> 2, a plurality of optical chips 3 are mounted on the base substrate 2. The lid body preparation step S <b> 3 forms a plurality of recesses 5 in the lid body 6. In the lid installation step S <b> 4, the plurality of optical chips 3 are accommodated in the plurality of recesses 5, and the lid 6 is installed on the base substrate 2. And after the joining step S5, a separation step for separating the individual optical devices 1 is provided. Thereby, many optical devices 1 can be manufactured simultaneously.

また、上記実施形態において、ベース基板2及び蓋体6としてガラス材料を用いる例について説明したが、本発明はこれに限定されず、ベース基板2及び蓋体6としてガラスエポキシ樹脂やプラスチック材料等を使用することができる。   Moreover, in the said embodiment, although the example using a glass material as the base substrate 2 and the cover body 6 was demonstrated, this invention is not limited to this, A glass epoxy resin, a plastic material, etc. are used as the base substrate 2 and the cover body 6. Can be used.

1 光学デバイス
2 ベース基板
3 光学チップ
4 光学活性領域
5 凹部
6 蓋体
7 ワイヤー
8 外部電極
9 内部電極
10 金属接合材、10a 第一金属膜、10b 第二金属膜
11 貫通電極
12 電極パッド
DESCRIPTION OF SYMBOLS 1 Optical device 2 Base substrate 3 Optical chip 4 Optical active region 5 Recess 6 Lid 7 Lid 8 External electrode 9 Internal electrode 10 Metal bonding material, 10a First metal film, 10b Second metal film 11 Through electrode 12 Electrode pad

Claims (11)

ベース基板と、
前記ベース基板に実装され、前記ベース基板とは反対側の表面に光学活性領域を有する光学チップと、
凹部を有し、前記凹部に前記光学チップを収容して前記ベース基板に金属接合材を介して接合される透光性の蓋体と、を備える光学デバイス。
A base substrate;
An optical chip mounted on the base substrate and having an optically active region on a surface opposite to the base substrate;
An optical device comprising: a light-transmitting lid that has a recess, accommodates the optical chip in the recess, and is bonded to the base substrate via a metal bonding material.
前記金属接合材は、前記ベース基板の側に形成される第一金属膜と前記蓋体の側に形成される第二金属膜を含み、
前記第一又は第二金属膜は、下地層がCr、Ni、Ta、Al、Cuのいずれかを含む層からなり、表面層がAu、Snのいずれかを含む層からなる積層構造を有する請求項1に記載の光学デバイス。
The metal bonding material includes a first metal film formed on the base substrate side and a second metal film formed on the lid side,
The first or second metal film has a laminated structure in which a base layer is composed of a layer including any one of Cr, Ni, Ta, Al, and Cu, and a surface layer is composed of a layer including any of Au and Sn. Item 2. The optical device according to Item 1.
前記金属接合材は、前記ベース基板の側に形成される第一金属膜と前記蓋体の側に形成される第二金属膜を含み、前記第一又は第二金属膜はナノ銀粒子から形成される請求項1に記載の光学デバイス。   The metal bonding material includes a first metal film formed on the base substrate side and a second metal film formed on the lid body, and the first or second metal film is formed of nano silver particles. The optical device according to claim 1. 前記第一金属膜と前記第二金属膜とは超音波接合又は半田接合により接合される請求項1〜3のいずれか一項に記載の光学デバイス。   The optical device according to any one of claims 1 to 3, wherein the first metal film and the second metal film are bonded by ultrasonic bonding or solder bonding. 前記金属接合材は導電膜を含み、前記ベース基板と前記蓋体6とが陽極接合により接合される請求項1に記載の光学デバイス。   The optical device according to claim 1, wherein the metal bonding material includes a conductive film, and the base substrate and the lid body 6 are bonded by anodic bonding. 前記蓋体は特定の光の波長を透過するフィルター機能を有する請求項1〜5のいずれか一項に記載の光学デバイス。   The optical device according to claim 1, wherein the lid body has a filter function of transmitting a specific wavelength of light. 表面から反対側の裏面に貫通する貫通電極を備えるベース基板を準備するベース基板準備工程と、
表面に光学活性領域を有する光学チップを前記ベース基板の表面に実装する光学チップ実装工程と、
凹部が形成される蓋体を準備する蓋体準備工程と、
前記光学チップを前記凹部に収納して前記蓋体を前記ベース基板に設置する蓋体設置工程と、
前記凹部を形成する側壁の上面と前記ベース基板の表面とを金属接合材を介在させて接合する接合工程と、を備える光学デバイスの製造方法。
A base substrate preparation step of preparing a base substrate including a through electrode penetrating from the front surface to the opposite back surface;
An optical chip mounting step of mounting an optical chip having an optically active region on the surface thereof on the surface of the base substrate;
A lid preparation step for preparing a lid in which a recess is formed;
A lid installation step of housing the optical chip in the recess and installing the lid on the base substrate;
A method for manufacturing an optical device comprising: a bonding step of bonding an upper surface of a side wall forming the recess and a surface of the base substrate with a metal bonding material interposed therebetween.
前記ベース基板準備工程は、前記ベース基板の前記蓋体が接合される領域の表面に第一金属膜を形成する工程と、
前記蓋体準備工程は、前記側壁の上面に第二金属膜を形成する工程と、を含む請求項7に記載の光学デバイスの製造方法。
The base substrate preparation step includes a step of forming a first metal film on a surface of a region where the lid of the base substrate is bonded;
The said cover body preparation process is a manufacturing method of the optical device of Claim 7 including the process of forming a 2nd metal film in the upper surface of the said side wall.
前記接合工程は、前記第一金属膜と前記第二金属膜とを超音波接合又は半田接合により接合する請求項8に記載の光学デバイスの製造方法。   The method of manufacturing an optical device according to claim 8, wherein in the bonding step, the first metal film and the second metal film are bonded by ultrasonic bonding or solder bonding. 前記接合工程は、前記蓋体と前記ベース基板とを陽極接合により接合する請求項7に記載の光学デバイスの製造方法。   The method for manufacturing an optical device according to claim 7, wherein in the bonding step, the lid and the base substrate are bonded by anodic bonding. 前記光学チップ実装工程は、前記ベース基板に複数の前記光学チップを実装する工程であり、
前記蓋体準備工程は、前記蓋体に複数の凹部を形成する工程を含み、
前記蓋体設置工程は、複数の前記光学チップを複数の前記凹部にそれぞれに収納して前記蓋体を前記ベース基板に設置する工程であり、
前記接合工程の後に、個々の光学デバイスに分離する分離工程を備える請求項7〜10のいずれか一項に記載の光学デバイスの製造方法。
The optical chip mounting step is a step of mounting a plurality of the optical chips on the base substrate.
The lid preparation step includes a step of forming a plurality of recesses in the lid,
The lid installation step is a step of storing the plurality of optical chips in the plurality of recesses and installing the lid on the base substrate,
The manufacturing method of the optical device as described in any one of Claims 7-10 provided with the isolation | separation process isolate | separated into each optical device after the said joining process.
JP2012275215A 2012-12-18 2012-12-18 Optical device Active JP6281858B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012275215A JP6281858B2 (en) 2012-12-18 2012-12-18 Optical device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012275215A JP6281858B2 (en) 2012-12-18 2012-12-18 Optical device

Publications (2)

Publication Number Publication Date
JP2014120635A true JP2014120635A (en) 2014-06-30
JP6281858B2 JP6281858B2 (en) 2018-02-21

Family

ID=51175224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012275215A Active JP6281858B2 (en) 2012-12-18 2012-12-18 Optical device

Country Status (1)

Country Link
JP (1) JP6281858B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016092987A1 (en) * 2014-12-12 2016-06-16 アオイ電子株式会社 Semiconductor device and method for manufacturing same
KR20170136421A (en) * 2016-06-01 2017-12-11 엘지디스플레이 주식회사 Method of Fabricating Display Device
JP2018018756A (en) * 2016-07-29 2018-02-01 エルジー ディスプレイ カンパニー リミテッド Method and device for manufacturing display device
JP2018125379A (en) * 2017-01-31 2018-08-09 信越化学工業株式会社 Synthetic quartz glass lid base material, synthetic quartz glass lid and method for manufacturing them
WO2019054368A1 (en) * 2017-09-15 2019-03-21 国立研究開発法人産業技術総合研究所 Method for joining substrates, and sealing structure
JPWO2019038846A1 (en) * 2017-08-23 2020-08-06 日本碍子株式会社 Method for manufacturing optical component and method for manufacturing transparent sealing member
JP2021518666A (en) * 2018-03-23 2021-08-02 オスラム オーエルイーディー ゲゼルシャフト ミット ベシュレンクテル ハフツングOSRAM OLED GmbH Manufacturing method of optoelectronic parts and optoelectronic parts
US11264549B2 (en) 2018-08-02 2022-03-01 Nichia Corporation Method for producing light emitting device, and light emitting device

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10330132A (en) * 1997-04-04 1998-12-15 Hoya Corp Production of glass product and filter
WO2006025139A1 (en) * 2004-09-01 2006-03-09 Matsushita Electric Industrial Co., Ltd. Circuit board, manufacturing method thereof, and electronic parts using the same
JP2006267154A (en) * 2005-03-22 2006-10-05 Ngk Insulators Ltd Optical device and device for optical monitoring
JP2007165503A (en) * 2005-12-13 2007-06-28 Seiko Epson Corp Hermetic seal structure, piezoelectric device and its manufacturing method
JP2009267396A (en) * 2008-03-31 2009-11-12 Asahi Glass Co Ltd Glazing for solid imaging device package
JP2010177375A (en) * 2009-01-28 2010-08-12 Citizen Electronics Co Ltd Light-emitting device and manufacturing method of the same
JP2011037694A (en) * 2009-07-15 2011-02-24 Asahi Glass Co Ltd Method for producing cover glass for optical use and cover glass for optical use
US20120266462A1 (en) * 2009-12-04 2012-10-25 Thales Sealed electronic housing and method for the sealed assembly of such a housing
JP2012216648A (en) * 2011-03-31 2012-11-08 Seiko Instruments Inc Optical sensor and optical sensor manufacturing method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10330132A (en) * 1997-04-04 1998-12-15 Hoya Corp Production of glass product and filter
WO2006025139A1 (en) * 2004-09-01 2006-03-09 Matsushita Electric Industrial Co., Ltd. Circuit board, manufacturing method thereof, and electronic parts using the same
JP2006267154A (en) * 2005-03-22 2006-10-05 Ngk Insulators Ltd Optical device and device for optical monitoring
JP2007165503A (en) * 2005-12-13 2007-06-28 Seiko Epson Corp Hermetic seal structure, piezoelectric device and its manufacturing method
JP2009267396A (en) * 2008-03-31 2009-11-12 Asahi Glass Co Ltd Glazing for solid imaging device package
JP2010177375A (en) * 2009-01-28 2010-08-12 Citizen Electronics Co Ltd Light-emitting device and manufacturing method of the same
JP2011037694A (en) * 2009-07-15 2011-02-24 Asahi Glass Co Ltd Method for producing cover glass for optical use and cover glass for optical use
US20120266462A1 (en) * 2009-12-04 2012-10-25 Thales Sealed electronic housing and method for the sealed assembly of such a housing
JP2012216648A (en) * 2011-03-31 2012-11-08 Seiko Instruments Inc Optical sensor and optical sensor manufacturing method

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016092987A1 (en) * 2014-12-12 2016-06-16 アオイ電子株式会社 Semiconductor device and method for manufacturing same
KR20170136421A (en) * 2016-06-01 2017-12-11 엘지디스플레이 주식회사 Method of Fabricating Display Device
KR101957670B1 (en) * 2016-06-01 2019-03-13 엘지디스플레이 주식회사 Method of Fabricating Display Device
KR20180013697A (en) * 2016-07-29 2018-02-07 엘지디스플레이 주식회사 Method of manufacturing display device and Manufacturing apparatus
KR101940765B1 (en) * 2016-07-29 2019-01-21 엘지디스플레이 주식회사 Method of manufacturing display device and Manufacturing apparatus
JP2018018756A (en) * 2016-07-29 2018-02-01 エルジー ディスプレイ カンパニー リミテッド Method and device for manufacturing display device
JP2018125379A (en) * 2017-01-31 2018-08-09 信越化学工業株式会社 Synthetic quartz glass lid base material, synthetic quartz glass lid and method for manufacturing them
JPWO2019038846A1 (en) * 2017-08-23 2020-08-06 日本碍子株式会社 Method for manufacturing optical component and method for manufacturing transparent sealing member
WO2019054368A1 (en) * 2017-09-15 2019-03-21 国立研究開発法人産業技術総合研究所 Method for joining substrates, and sealing structure
JPWO2019054368A1 (en) * 2017-09-15 2020-12-17 国立研究開発法人産業技術総合研究所 Substrate joining method and sealing structure
JP7028473B2 (en) 2017-09-15 2022-03-02 国立研究開発法人産業技術総合研究所 Substrate joining method and sealing structure
JP2021518666A (en) * 2018-03-23 2021-08-02 オスラム オーエルイーディー ゲゼルシャフト ミット ベシュレンクテル ハフツングOSRAM OLED GmbH Manufacturing method of optoelectronic parts and optoelectronic parts
US11611191B2 (en) 2018-03-23 2023-03-21 Osram Oled Gmbh Optoelectronic component and method for producing an optoelectronic component
JP7279065B2 (en) 2018-03-23 2023-05-22 オスラム オーエルイーディー ゲゼルシャフト ミット ベシュレンクテル ハフツング Optoelectronic components and methods of manufacturing optoelectronic components
US11264549B2 (en) 2018-08-02 2022-03-01 Nichia Corporation Method for producing light emitting device, and light emitting device

Also Published As

Publication number Publication date
JP6281858B2 (en) 2018-02-21

Similar Documents

Publication Publication Date Title
JP6281858B2 (en) Optical device
CN109148670B (en) L ED flip chip packaging substrate and L ED packaging structure
JP6057282B2 (en) Optical device and method for manufacturing optical device
JPWO2006112039A1 (en) Surface-mount optical semiconductor device and manufacturing method thereof
US20090022198A1 (en) Package structure of compound semiconductor device and fabricating method thereof
US20120326175A1 (en) Led package and method for making the same
KR101307436B1 (en) Mems sensor pakiging and the method
US20090242923A1 (en) Hermetically Sealed Device with Transparent Window and Method of Manufacturing Same
TW201340300A (en) Optical sensor device and method for manufacturing the same
JP2022186944A (en) Electronic component package and electronic apparatus
CN107123721B (en) LED packaging structure with lens and packaging method
US20090090544A1 (en) System and Method for Substrate with Interconnects and Sealing Surface
JP5958928B2 (en) Optical device manufacturing method
JP2019096778A (en) Lid and optical device
JP5010199B2 (en) Light emitting device
JP2015211072A (en) Wiring board and electronic device
JP6070933B2 (en) Optical device and method for manufacturing optical device
JP5861356B2 (en) Lead frame with reflecting member for optical semiconductor device, lead frame for optical semiconductor device, lead frame substrate for optical semiconductor device, optical semiconductor device, method for manufacturing lead frame with reflecting member for optical semiconductor device, and optical semiconductor device Production method
JP5915835B2 (en) Lead frame with reflecting member for optical semiconductor device, lead frame for optical semiconductor device, lead frame substrate for optical semiconductor device, optical semiconductor device, method for manufacturing lead frame with reflecting member for optical semiconductor device, and optical semiconductor device Production method
TW201533928A (en) Light emitting diode package and method for forming the same
JP7418484B2 (en) Packages for optical devices and optical devices
JP2012134397A (en) Optical device module
JP2016143783A (en) Electronic device
JP5197436B2 (en) Sensor chip and manufacturing method thereof.
JP2012238666A (en) Optical sensor and method for manufacturing optical sensor

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20151009

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20160613

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160621

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160809

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170110

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170228

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20170801

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20171016

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20171024

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20171226

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20180116

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180116

R150 Certificate of patent or registration of utility model

Ref document number: 6281858

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250