JP2007165503A - Hermetic seal structure, piezoelectric device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an insulation substrate and a piezoelectric device which can effectively prevent cracking and chipping, while attaining a smooth surface condition and a nice chamfered end face without enlarging a cutting groove more than necessary. <P>SOLUTION: The insulation substrate 31 or 33 is used as part of a base material to mount an electronic component therein or integrally join it thereto. The method of manufacturing therefor comprises a masking process wherein a mask 52 having openings formed along the cutting grooves for dividing a wafer substrate 51 into a plurality of insulation substrates is set up with respect to the wafer substrate 51, for forming the plurality of insulation substrates all at the same time; a blasting process wherein blasting is carried out according to the processing pattern of the mask; an etching process of conducting finishing chemical etching with the mask arranged as it is; and a cutting process of dicing the wafer substrate 51 along the cutting grooves after peeling off the mask. In the blasting process, processing is carried out at a larger width than the cutting width of the cutting process by dicing. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to a hermetic sealing structure that hermetically accommodates electronic components, a piezoelectric device, and an improved manufacturing method thereof.

Piezoelectric devices such as piezoelectric vibrators and piezoelectric oscillators in small information devices such as HDDs (hard disk drives), mobile computers, IC cards, and mobile communication devices such as mobile phones, car phones, and paging systems Is widely used.
A piezoelectric device 1 shown in FIG. 8 accommodates a piezoelectric vibrating piece as an electronic component in a package 2.
The lid 3 is a structure that airtightly joins the lid 3 to the package (Patent Document 1, FIGS. 1 and 2).
reference).
The basic component of the package for accommodating such electronic components is an insulating substrate. For example, the lid as the lid body is, for example, an insulating substrate (wafer) having a predetermined size. ) Cut vertically and horizontally.
Further, as shown in FIG. 8, the corner portion and each ridge line portion of the lid 3 constituting the package 2 are likely to be cracked and chipped, and cause damage to the package.
It is preferable to chamfer like each part shown by 1.

JP 7-154183 A

FIG. 9 shows an example of a method for forming such a lid 3.
As shown in FIG. 9, the lid layer 3-1 is a wafer having a size that allows a plurality of the lids 3 of FIG. 8 to be taken simultaneously. The wafer 3-1 is provided with vertical and horizontal cutting grooves, and along the cutting grooves. The rectangular lid 3 shown in FIG. 8 is obtained by cutting and separating.
In this case, as indicated by the symbol C0 in FIG. 9, it is necessary to form a line-shaped fragile portion whose material thickness is previously reduced in the wafer 3-1, in order to form a cutting groove.

When a mask is applied to the position C0 in FIG. 9 so as to have a line width of W1 and wet etching is performed, depending on the wafer material, due to the etching isotropy, a hole is formed inside W2.
As a result, the width of the dicing cutting groove or the fragile portion becomes larger than necessary, and there is a problem that an appropriate chamfered shape cannot be obtained.
Therefore, there is a method of forming the cut grooves by blasting performed by spraying fine particles instead of wet etching.
In this case, the machined surface becomes extremely rough, and in some cases, the surface is “chipped” (
It is also possible that cracks will enter, and the effect of chamfering cannot be obtained.

The present invention has been made in order to solve the above-described problems, and can obtain a chamfered end surface having a smooth and smooth surface state without effectively increasing a cutting groove, and can effectively prevent cracking and chipping. It is an object of the present invention to provide a method for manufacturing an insulating substrate and a piezoelectric device.

According to the first aspect of the present invention, there is provided a manufacturing method for manufacturing an insulating base used as a part of a housing for housing or integrally joining electronic components, wherein a plurality of the insulating bases are provided. A masking process for setting a mask having an opening along a cutting groove for separating the plurality of insulating bases on a wafer substrate to be formed simultaneously, and a blasting process for blasting using the mask processing pattern A process step, an etching step of performing chemical etching for finishing with the mask placed, and a cutting step of dicing along the cutting groove after the mask is peeled off. In the blasting step, cutting by the dicing This is achieved by a method of manufacturing an insulating substrate that is processed with a width larger than the cutting width of the process.

According to the configuration of the first invention, since the blasting process is first performed in processing the cut groove of the wafer substrate in order to separate the insulating base of the product unit, the cut groove is performed as in the case of performing wet etching. As a result, the groove to be formed does not become larger than necessary. In addition, the chemical etching step is performed to finish after the blasting step, so that the surface roughness can be eliminated and the surface can be finished smoothly.
Further, in the blasting process, chamfering is appropriately performed by processing with a width larger than the cutting width of the cutting process by dicing.
Thus, it is possible to provide a method for manufacturing an insulating substrate that can obtain a chamfered end surface with a smooth and clean surface state and can effectively prevent cracks and chips without making the cutting groove larger than necessary. The insulating base formed by this method can be used as a package lid.

According to a second aspect of the present invention, in the configuration of the first aspect, in the masking step, a mask made of a dry film is laminated on the wafer substrate, and the opening of the mask is made larger than the cutting width. It is characterized by being.
According to the structure of 2nd invention, in the said masking process, a mask can be correctly applied by laminating the mask by a dry film with respect to the said wafer board | substrate, and a reliable process is attained. Moreover, since the opening of the mask is made larger than the cutting width, the blasting process can easily realize a process of processing with a width larger than the cutting width of the cutting process by dicing, and chamfering. Processing can be easily realized.

According to a third invention, in the configuration of the second invention, in the masking process, an annealing process is performed after the laminating process.
According to the configuration of the third invention, in the masking step, the mask can be positioned more accurately without causing misalignment by annealing when the mask made of dry film is laminated on the wafer substrate. More reliable processing is possible.

According to a fourth invention, in the configuration of the third invention, the wafer substrate is a glass wafer or a quartz wafer, and the mask is a polyurethane film.
According to the configuration of the fourth invention, by using a polyurethane film as the mask, it can be suitably attached to the wafer substrate by annealing, and the mask is common to the blasting process and the chemical etching process. Can be used as

According to a fifth aspect of the present invention, there is provided a base substrate made of an insulating substrate, a framed vibration piece made of a piezoelectric material, and a lid made of the same material as the insulating substrate. To manufacture a piezoelectric device, as a pre-process, a base substrate layer, which is a wafer substrate having a size for forming a plurality of the base substrates simultaneously, and a plurality of the lids simultaneously. An element in which a lid layer, which is a wafer substrate having a size for forming, and a wafer substrate having a size for simultaneously forming a plurality of the vibrating pieces with frames are etched to form the vibrating pieces with frames. In the step of forming the base substrate layer and the lid layer in the previous step, a cutting groove for separating the plurality of individual products is formed. A masking step of setting a mask having an opening along the cutting groove, the blasting step for blasting the machining pattern of the mask,
An etching step of performing chemical etching for finishing with the mask disposed, and further, as a post-step after the pre-step, sandwiching the element layer between the lid layer and the base substrate layer, A bonding step for bonding, and a cutting step for dicing along the cutting groove after peeling the mask, and the blasting step in the previous step is processed with a width larger than the cutting width of the cutting step by dicing By the manufacturing method of the piezoelectric device to
Achieved.

According to the configuration of the fifth invention, a chamfered end face having a smooth and smooth surface state can be obtained without making the cutting groove larger than necessary, and cracks and chips can be effectively obtained by the same principle as the first invention. Since a large number of piezoelectric devices can be manufactured at the same time, productivity can be greatly improved.

According to a sixth invention, in the configuration of the fifth invention, the steps up to the step of preparing the base substrate layer, the lid layer, and the element layer are a pre-process, and the lid layer and the base substrate are a subsequent process. The masking process, the blasting process, and the etching are performed on the outer surface of each layer with respect to the base substrate layer and the lid layer, with the element layer sandwiched between the layers and the anode process. Each step of the steps is sequentially performed, and the cutting step is further performed.

According to the structure of 6th invention, there exists a big advantage by which formation of solder or a special metal film becomes unnecessary by integrating each layer by anodic bonding. In this case, by forming the cutting grooves after bonding the layers, the current during anodic bonding is appropriately transmitted to the vicinity of the center of the wafer.

According to a seventh invention, in the configuration of the fifth invention, a process up to the step of preparing the base substrate layer, the lid layer, and the element layer is a pre-process, and the lid layer and the base substrate are followed as a subsequent process. The element layer is sandwiched between layers, and the step of eutectic bonding them together, the base substrate layer, and the lid layer, the outer surface of each layer, the masking step, the blasting step, Each step of the etching step is sequentially performed, and the cutting step is further performed.
According to the configuration of the seventh invention, by integrating the layers by eutectic bonding, each component can be taken as an independent component without short-circuiting by the bonding electrode film as in anodic bonding. There is a big advantage. In this case, the characteristics of each element can be measured before cutting. Note that eutectic metals for bonding include AuSn, AuGe, AuSi, and PbSn.

According to an eighth aspect of the invention, in the configuration of the fifth aspect of the invention, the steps up to the step of preparing the base substrate layer, the lid layer, and the element layer are a pre-process, and the lid layer and the base substrate are a subsequent process. The element layer is sandwiched between layers, and the step of surface activation bonding them, and the base substrate layer and the lid layer, the masking step on the outer surface of each layer, the blasting step, Each step of the etching step is sequentially performed, and the cutting step is further performed.
According to the configuration of the eighth invention, the layers are integrated by surface activated bonding, so that the seventh
In addition to the same effects as the present invention, there is an advantage that eutectic metal is not required because the joining can be performed only with the metal thin film. Furthermore, since direct bonding of crystal-crystal, glass-glass, etc. is possible, there is a great advantage that the bonding thin film itself becomes unnecessary and the number of steps can be reduced.

1 and 2 show an embodiment of the piezoelectric device of the present invention, FIG. 1 is a schematic perspective view thereof, and FIG. 2 is a schematic cross-sectional view taken along line AA of FIG.
In these drawings, the piezoelectric device 30 shows an example in which a piezoelectric vibrator is configured, and the piezoelectric device 30 houses a piezoelectric vibrating piece in a package 37.
Specifically, the piezoelectric device 30 includes a base substrate 31 that is an insulating substrate, a framed resonator element 32 that is stacked and fixed on the base substrate 31, and a layered and fixed element on the framed resonator element 32. And a lid 33.

In the piezoelectric device 30, the package 37 contains a piezoelectric vibrating piece in an airtight manner, and includes a base substrate 31, a frame portion of the vibrating piece 32 with a frame, and a lid 33. The base body 31, the frame portion of the framed vibrating piece 32, and the outer shape of the lid 33 are the same.
The base substrate 31 is an insulating substrate and is formed of an insulating material described later. This base substrate 31 forms the bottom of the package 37.

The framed resonator element 32 is made of a piezoelectric material. In this embodiment, quartz is used as the piezoelectric material for forming the framed resonator element 32. In addition to quartz, piezoelectric materials such as lithium tantalate and lithium niobate can be used. In this embodiment, in particular, a wafer made of a quartz Z plate is used.
The vibration piece main body 39 includes a pair of vibrating arms extending in parallel to the right in the drawing from a base portion 38 integrated with the frame portion 36 in FIG. In FIG. 2, only the vibrating arm 35 is shown because of the cross-sectional notation.

For example, a long groove is formed in each vibrating arm, and an excitation electrode (not shown) is formed in the long groove. The excitation electrodes in the long grooves are paired with each other and function as different polarities, and efficiently form electrolysis inside the resonator element main body 39. For example, a lead electrode connected to the excitation electrode is formed at the base of the resonator element main body 39, and the lead electrode is connected to each mounting terminal 4 via a conductive pattern and a conductive through hole (not shown) provided on the base substrate 31.
7 and 48 are electrically connected.

The lid 33 is fixed on the vibrating piece 32 with the frame as will be described later, and hermetically seals the space in which the vibrating piece main body 39 is accommodated.
Particularly in the present embodiment, the lid 33 is preferably made of a material through which light for frequency adjustment (for example, laser light) is transmitted, and a transparent material is suitable. The lid 33 is formed as will be described later. For example, when the lid 33 is formed of a crystal Z plate, the framed vibrating piece 3 as a bonding target
2 can be made of the same material and the linear expansion coefficient is the same, which is preferable.
That is, the lid 33 and the above-described base substrate 31 are flat plates formed of a piezoelectric material that is an insulating material having the same structure. In other words, the insulating base in the present invention can be used for both the base base 31 and the lid 33.

That is, the base substrate 31, the framed vibration piece 32, and the framed vibration piece 32 and the lid 33 are joined by solders 22 and 22, respectively.
That is, a metal layer or a metallized portion (not shown) is formed on the entire sealing surface of the lid 33, a partial region thereof, or at least a sealing portion (region bonded to the solder 22).
The same metal layer is also formed in the sealing portion of the framed vibrating piece 32. Specifically, the sealing portion on the back surface of the framed vibrating piece 32 and the surface of the base substrate 31 are sealed. By forming the same metal layer on the stop portion, solder bonding can be performed with the solder 22 interposed therebetween.

The metal layer has the same structure formed on any member. For example, when the laminated state is briefly described from the side far from the solder 22, at least the base layer and the bonding layer formed on the surface side thereof are provided. Contains.
The underlayer is provided in order to compensate for the weak adhesion of a metal such as Au to glass or quartz, and as the underlayer, for example, Cr (chromium) is formed by sputtering or the like. On top of that, for example, gold is deposited as a bonding layer. Corresponding to the gold bonding layer, gold tin (AuSn), gold germanium (AuGe), or the like is used for the solder.
As will be described later, when each layer is anodically bonded, it is not necessary to form such a metal layer on both of the opposing bonding portions, and it is sufficient to form only one of them, and the solder 22 is unnecessary.

Further, as shown in FIGS. 1 and 2, chamfered portions 21 are formed at the corners of the lid 33 and the corners and ridge lines of the base base 31 based on the steps described later. Thereby, since the package 37 has no sharp corners or ridges, it is difficult for cracks and chips to occur, and breakage of the package is effectively prevented.

The piezoelectric device 30 according to the present embodiment is configured as described above. By bonding the mounting terminals 47 and 48 to a predetermined mounting substrate (not shown) with solder or the like, from the mounting substrate side, The supplied drive voltage is applied to the excitation electrode of the resonator element main body 39, and each vibrating arm is
It is possible to flexurally vibrate at a predetermined frequency so as to approach and separate the tip portions of each other.
And in this piezoelectric device 30, by employ | adopting the manufacturing process demonstrated below,
The chamfered portion 21 of the package 37 can be formed easily and appropriately.

(Piezoelectric device manufacturing method)
Next, a first embodiment of a method for manufacturing the piezoelectric device 30 will be described.
FIG. 3 is a flowchart showing an example of a manufacturing method of the piezoelectric device 30. In this embodiment, the manufacturing process of the piezoelectric device 30 includes a pre-process and a post-process.

(pre-process)
The pre-process in the method of manufacturing the piezoelectric device 30 includes a base base layer forming process, an element layer forming process for forming a framed resonator element, and a lid layer forming process. The substrate base layer forming step, the element layer forming step, and the lid layer forming step are performed separately. That is, the pre-process is an assembly preparation process, and a plurality of processes are performed in parallel.
As already described, the element layer (not shown) for forming the framed resonator element 32 is prepared as a piezoelectric substrate, for example, a quartz wafer (ST30).
For example, etching with a hydrofluoric acid solution can be performed to form the outer shape as described in FIG. 2 (ST31). After that, a necessary metal film is formed on the front and back surface joining portions to enable joining by soldering, and necessary driving electrodes are formed by sputtering or vapor deposition, and formed by photolithography or the like.

Further, the lid layer forming step and the base substrate layer forming step are exactly the same, and the forming steps of these layers will be described in detail as the forming step of the insulating substrate constituting them.
FIG. 4A shows a wafer substrate 51 which is an insulating base layer commonly used for forming a lid layer and a base base layer. When the wafer substrate 51 which is an insulating base layer is cut as described later, individual insulating bases are obtained.

The wafer substrate 51 is a wafer substrate having such a size that a plurality of the lids 33 and the base substrates 31 described with reference to FIG. 2 can be formed at a time. In FIG. 4, the thickness direction is shown in cross section. Yes. If a large number of lids and base substrates are simultaneously formed as in this embodiment, the production efficiency is improved.
The wafer substrate 51 for forming the lid layer 33 needs to be a transparent material capable of transmitting laser light irradiated from the outside in frequency adjustment described later, and quartz or glass can be used. In the case of crystal, the same crystal Z plate as the element layer for forming the framed resonator element is used. In the case of glass, a transparent material that substantially matches the thermal expansion coefficient of the crystal Z plate of 13.8 ppm / once (Celsius) is selected. Examples of such materials include ordinary soda glass, borosilicate glass with a particularly small linear expansion coefficient, that is, Pyrex (
(Registered trademark) glass or the like can be used.

Prior to forming a cutting groove described later, a necessary metal film is formed.
That is, the wafer substrate 51 in FIG. 4A is washed with pure water (ST10), and a base layer and a bonding layer are formed at the bonding portion between the lid layer and the base substrate layer. For example, chromium is formed as a base layer by sputtering, and gold (Au) is formed thereon as a bonding layer by sputtering, for example.
In addition, in Fig.4 (a), the location shown by C1 becomes a location of the cutting groove in a cutting process.

(Masking process)
Next, as shown in FIG. 4B, a film serving as a mask is formed on one surface of the wafer substrate 51. As this film, the dry film 52 is preferable, and as the dry film, for example, a polyurethane film is suitable.
The dry film 52 is laminated on the wafer substrate 51 (ST11) and heated (annealing step).
Preferably, in this laminating process by annealing, after laminating (lamination) at about 80 degrees Celsius (hereinafter, all temperature indications are “degrees Celsius”), further about 30 degrees at about 80 degrees.
About a minute of heating is performed to increase the adhesion of the film to the wafer substrate 51.

Next, as shown in FIG. 4C, a glass mask 53 having an opening where the cut groove C1 is to be formed is placed on the surface of the wafer substrate 51, exposed and developed (ST12, ST13), and the dry substrate is dried. The film 52a is removed.
For example, a NaCO ₃ solution is used as a stripping solution, and a solution of about 1 liter of water is used for the NaCO ₃ (2 to 3 grams) at a temperature of 25 to 30 degrees for 10 to 15 minutes. Perform the process.
As a result, when the opening 52 corresponding to the opening 53 of the glass mask 53 is exposed to the dry film 52 and the unexposed portion is removed, as shown in FIG. 4D, a processing pattern in the next blast processing is obtained. The mask 52 having the opening 52a is left firmly attached to one surface of the wafer substrate 51.

(Blasting process)
As shown in FIG. 4E, from the mask 52 side, for example, by sandblasting, # 60
Particles of 0 to 1000 abrasive grains are jetted at a pressure of 0.35 MPa and blasted (ST14).
As a result, a cutting groove C2 having an entrance groove width W3 is formed. The opening 52a of the mask 52 is made to coincide with the groove width W3. As will be described later, W3 is larger than the cutting width by dicing.
After blasting, it is washed with pure water (ST15), and the remaining abrasive grains are washed. After cleaning with pure water, the dry film 52 expands and changes to the original pattern shape, so the annealing process is performed again. The annealing conditions may be the same as the annealing in the masking process.

(Etching process)
Next, chamfering etching or finishing is performed by chemical etching for finishing, that is, wet etching (ST16).
As shown in FIG. 5A, the etching solution enters from the mask opening 52a with the mask 52 placed, and the wet etching proceeds to form a cutting groove that gradually decreases in width toward the back side. .
Specifically, when the wafer substrate 51 is quartz, the remaining hydrogen peroxide solution (H ₂ O ₂ ) is 11 percent (weight percent) as the etching solution, and the remainder is ammonium hydrogen fluoride (NH _4). Etching is performed in a short time within about 3 minutes at about 30 degrees using a material containing HF ₂ ).

Subsequently, after washing with pure water at room temperature for about 10 minutes and removing the (dry) mask 52, FIG.
The state (b) is reached (ST17).
Preferably, for example, as a cleaning solution, monoethanolamine + water is used, and cleaning is performed for about 15 minutes at about 30 degrees to remove residues of the adhesive layer (ST18).
Further, it is left at about 80 degrees for about 30 minutes to dry the cleaning solution (ST19).
Thus, the cutting groove C3 having a smooth inner surface is formed. In the cutting groove C3, the width W3 of the entrance is larger than the width W4 of the bottom, and a chamfered shape is appropriately formed.
Thus, the pre-process of this embodiment is completed.

(Post-process)
(Joining process)
Next, as shown in FIG. 5C, the element layer 32-1 completed in ST31 is sandwiched between the lid layer 51-1 and the base substrate layer 51-2, which are the same wafer substrate, and face each other. These are polymerized and bonded to the bonding portion to be bonded via solders 22 and 22 such as gold tin or gold germanium which preferably do not contain lead (ST20).
(Cutting process)
Subsequently, by dicing with a predetermined cutting jig with a width of W4 in FIG. 5B, a plurality of piezoelectric devices 30 having chamfered portions 21 as shown in FIG. 4D (see FIG. 1). But,
Many are formed simultaneously.
Since the lid 33 is transparent, as shown in FIG. 2, the laser beam B is externally applied to the excitation electrode in the vicinity of the tip of 39 of the internal resonator element main body, and the frequency adjustment by the mass reduction method can be performed. it can. Next, necessary inspections are performed on individual products, and the piezoelectric device 30 is completed.

(Second Embodiment)
Next, a second embodiment of the manufacturing method will be described with reference to the flowchart of FIG. In FIG. 6, steps denoted by the same reference numerals as those in the flowchart of FIG. 3 are the same steps, and therefore, overlapping description will be omitted and differences will be mainly described.
The second embodiment is different from the first embodiment in that the joining process is performed before the mask laminating process on the wafer substrate 51 in ST11, and thus the preceding process is completed before the joining process. .

That is, as in the first embodiment, the wafer substrate 51 is cleaned (ST10-1),
As shown in FIG. 7, the base substrate layer 51-2 and the lid layer 51- consisting of these wafer substrates 51 are provided.
1 is bonded with the element layer 32-1 in between before forming the cutting groove C3 as described above.
In this case, bonding is performed by anodic bonding as shown in the figure.
That is, the lid layer 51-1 and the base substrate layer 51-2 made of glass or quartz are used.
For example, an element layer 32-1 in which a metal layer is covered at the junction is sandwiched between the lid layer and the base substrate layer with a temperature (100 to 200 degrees) lower than the softening point applied. In addition, between each of the lid layers 51-1 and the base substrate layer 51-2 and the metal layer that is a bonding film,
As shown in the figure, 0.5 to 1.6 k from a DC power source with the metal layer side serving as an anode.
A DC voltage of V is applied.

In other words, anodic bonding is a method in which surfaces are brought into close contact with each other in a solid phase and is a method in which electrostatic attraction between surface atoms is generated between surfaces having smooth surfaces. Therefore, for example, the lid layer made of glass has an action of an applied DC voltage,
The ions move, and a continuously applied voltage is applied to the gap with the metal layer and the space charge layer formed in the vicinity thereof. Then, an electrostatic attractive force is generated between the lid layer and the metal layer, and they adhere to each other, and the strong electric field causes the movement of ions from the glass side to the electrode side, resulting in a covalent bond with atoms on the electrode side at the interface. , It is considered that the coupling is performed.

In the case of eutectic bonding, AuSn, AuGe, PbSn can be used as a bonding metal. At this time, by using AuCr, AuTi, or the like as a base for the bonding metal, it becomes possible to make the eutectic metal adhere to the glass. The bonding temperature is 2 for AuSn alloy.
The bonding time is preferably about 80 to 300 degrees, 360 degrees for the AuGe alloy, and about 180 to 200 degrees for the PbSn alloy. The bonding time is preferably about 5 minutes in relation to the Au erosion of the base metal.

In addition to the anodic bonding and eutectic bonding described above, surface activated bonding can also be applied.
In the surface activation bonding, for example, the bonding surface is activated by plasma treatment performed in an oxygen-free atmosphere using CF ₄ , Ar, or N ₂ gas, and the lid layer 51-1 and the element layer 32 are activated. -1 and the base substrate layer 51-2 are joined.
Further, the plasma treatment, O ₂ gas, a mixed gas of CF ₄ and O _2, or by using a mixed gas of N ₂ and O _2, may be carried out in an atmosphere of oxygen-mediated.
In this surface activated bonding, there are AuCr, AuTi, etc. as bonding thin films. At this time, the Au thickness is preferably 2000 to 20000 angstroms. Also,
It is also possible to directly join glass-glass, quartz-quartz, glass-quartz without using a metal thin film.

In this manner, the lid layer 51-1, the element layer 32-1, and the base substrate layer 51-2 are polymerized and precisely bonded as shown (ST10-2).
In this case, by forming the cutting grooves after bonding the layers, the current during anodic bonding is appropriately transmitted to the vicinity of the center of the wafer.
Subsequently, as a post-process, a cutting groove C3 is formed on the surface of the lid layer 51-1 (upper surface in the drawing) and the surface of the base substrate layer 51-2 (lower surface in the drawing) in the same manner as in the first embodiment. , S
A plurality of piezoelectric devices 30 shown in FIG. 1 can be formed simultaneously by performing the steps T11 to ST19 and performing dicing (ST21).

The present invention is not limited to the above-described embodiment. Each configuration of each embodiment can be appropriately combined or omitted, and can be combined with other configurations not shown.
The present invention is also applicable to all hermetic sealing structures in which an electronic component is bonded to an insulating base and hermetically sealed.
In other words, the method for manufacturing an insulating substrate according to the present invention can be applied to a structure in which a piezoelectric vibrating piece is bonded to the flat insulating substrate described above and sealed with a cap-shaped lid.
Furthermore, as long as it is covered with a package and accommodates a piezoelectric vibrating piece inside, it can be applied to all piezoelectric devices and manufacturing methods regardless of the names of piezoelectric vibrators, piezoelectric oscillators, etc. it can.

The schematic perspective view which shows embodiment of the piezoelectric device of this invention. The AA line schematic sectional drawing of FIG. The flowchart which shows 1st Embodiment of the manufacturing method of the piezoelectric device of FIG. FIG. 2 is a process chart sequentially illustrating a part of the manufacturing process of the piezoelectric device of FIG. 1. FIG. 2 is a process chart sequentially illustrating a part of the manufacturing process of the piezoelectric device of FIG. 1. The flowchart which shows 2nd Embodiment of the manufacturing method of the piezoelectric device of FIG. The figure which shows a part of manufacturing process of the piezoelectric device of FIG. The schematic perspective view which shows an example of the conventional piezoelectric device. FIG. 9 is a schematic cross-sectional view showing a manufacturing process of the lid of the piezoelectric device of FIG. 8.

Explanation of symbols

30 ... Piezoelectric device, 31 ... Base substrate, 32 ... Vibrating piece with frame, 33 ...
· Lid, 37 ··· Package, 39 ··· Vibrating piece main body, 51-1 ··· Base substrate layer, 32 · 1 · · · Element layer, 51-2 · · · Lid layer, 51 · · Substrate, 52 ...
mask

Claims (8)

A manufacturing method for manufacturing an insulating substrate used as part of a container for housing or integrally joining electronic components,
A masking step of setting a mask having an opening along a cutting groove for separating the plurality of insulating bases from a wafer substrate for simultaneously forming a plurality of the insulating bases;
A blasting process for performing blasting according to the mask processing pattern;
An etching step of performing chemical etching of the finish while the mask is disposed;
A step of dicing along the cutting groove after peeling the mask,
In the said blasting process, it processes with a width | variety larger than the cutting width of the cutting process by the said dicing. The manufacturing method of the insulation base | substrate characterized by the above-mentioned. 2. The insulating substrate according to claim 1, wherein in the masking step, a mask made of a dry film is laminated on the wafer substrate, and the opening of the mask is made larger than the cutting width. Manufacturing method. The method for manufacturing an insulating substrate according to claim 2, wherein an annealing process is performed after the laminating process in the masking process. 4. The method of manufacturing an insulating substrate according to claim 3, wherein the wafer substrate is a glass wafer or a quartz wafer, and the mask is a polyurethane film. A method of manufacturing a piezoelectric device by joining a base substrate made of an insulating substrate having the same outer shape, a framed vibrating piece made of a piezoelectric material, and a lid made of the same material as the insulating substrate,
As a pre-process,
A base substrate layer that is a wafer substrate having a size for simultaneously forming a plurality of the base substrates; a lid layer that is a wafer substrate having a size for simultaneously forming a plurality of the lids; Etching a wafer substrate having a size for forming a plurality of attached vibrating pieces at the same time, and preparing each element layer formed with the framed vibrating piece,
In the step of forming the base substrate layer and the lid layer in the previous step,
A masking step of setting a mask having an opening along the cutting groove to form a cutting groove for separating the plurality of individual products;
A blasting process for performing blasting according to the mask processing pattern;
An etching step of performing chemical etching for finishing with the mask being disposed,
Furthermore, as a post-process after the pre-process,
A bonding step of bonding the element layer between the lid layer and the base substrate layer and bonding them;
A step of dicing along the cutting groove after peeling the mask,
The method for manufacturing a piezoelectric device, wherein the blasting step in the previous step is performed with a width larger than a cutting width of the cutting step by dicing. Up to the step of preparing the base substrate layer, the lid layer, and the element layer as a pre-process,
As a subsequent process,
A bonding step of sandwiching the element layer between the lid layer and the base substrate layer and anodic bonding them;
The masking step, the blasting step, and the etching step are sequentially performed on the outer surface of each layer with respect to the base substrate layer and the lid layer, and the cutting step is further performed. Item 6. A method for manufacturing a piezoelectric device according to Item 5. Up to the step of preparing the base substrate layer, the lid layer, and the element layer as a pre-process,
As a subsequent process,
A bonding step in which the element layer is sandwiched between the lid layer and the base substrate layer and these are eutectic bonded;
The masking step, the blasting step, and the etching step are sequentially performed on the outer surface of each layer with respect to the base substrate layer and the lid layer, and the cutting step is further performed. Item 6. A method for manufacturing a piezoelectric device according to Item 5. Up to the step of preparing the base substrate layer, the lid layer, and the element layer as a pre-process,
As a subsequent process,
A bonding step in which the element layer is sandwiched between the lid layer and the base substrate layer, and surface activation bonding is performed between them;
The masking step, the blasting step, and the etching step are sequentially performed on the outer surface of each layer with respect to the base substrate layer and the lid layer, and the cutting step is further performed. Item 6. A method for manufacturing a piezoelectric device according to Item 5.

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