JP2013520007A - Printed circuit board and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a method of manufacturing a printed circuit board having a cavity and a structure of the printed circuit board according to the method.
A manufacturing method includes a first step of forming a base circuit board having an internal circuit layer including a cavity circuit pattern on a surface of the substrate, and a second stage of forming a laser stopper layer on the cavity circuit pattern. The third step of forming at least one or more external circuit layers on the base circuit board, and the fourth step of forming the cavity region by removing the external circuit layer above the laser stopper layer.
According to the present invention, when manufacturing a multilayer printed circuit board having a cavity in the circuit board, a laser stopper layer is formed on the upper surface of the cavity circuit pattern, and a rapid and precise cavity is formed by laser processing. Therefore, it is possible to precisely control the cavity depth and to realize a manufacturing process that does not affect the circuit formed in the cavity in advance.
[Selection] Figure 2

Description

  The present invention relates to a printed circuit board manufacturing process in which a cavity is formed in a region of a substrate, and a printed circuit board structure manufactured thereby.

  A printed circuit board (PCB) is a circuit board pattern printed on a conductive material such as copper on an electrically insulating board, and is a board (Board) just before mounting electronic components. is there. That is, it means a circuit board in which various electronic components are densely mounted on a flat plate, the mounting positions of the respective components are determined, and circuit lines (line patterns) for connecting the components are printed and fixed on the flat plate surface. In general, the printed circuit board includes a single-layer PCB and a build-up board in which PCBs are formed in multiple layers, that is, a multilayer PCB board.

  Recently, system integration technology has been demanded for making electronic products lighter, thinner, and shorter. As a corresponding technology, an embedded printed circuit board (embedded PCB) and a cavity type printed circuit board (cavity PCB) are manufactured. Technology is drawing attention. Embedded printed circuit boards (Embedded PCBs) have the advantage of fully embedding the components to be mounted on the surface during the PCB process and having a high degree of freedom in wiring design around the built-in components. There is a problem that compatibility and rework for defective parts are difficult, and there are restrictions in the part inspection method.

  In the case of a cavity printed circuit board (Cavity PCB), the degree of freedom of design is reduced by mounting in a cavity (cavity) in which a part is not completely embedded and a space is formed in the direction in which the chip is mounted. Although there are disadvantages, there is a technical advantage that is very efficient in component rework and component inspection, which are problems that occur in embedded printed circuit boards (Embedded PCB).

  However, in the case of a cavity printed circuit board (Cavity PCB), many techniques have been applied in a technique in which an LTCC (Low Temperature co-fired ceramic) substrate molding process (Mold Process) is applied. There are very few application examples in PCB which is a -layer) technology. The reason for this is that it is difficult to accurately process the cavity region, and the internal circuit of the cavity is damaged in the process such as plating, image, etching, etc. that occurs during the PCB process. This is because it is difficult to form.

  1 and 2 are conceptual diagrams schematically illustrating a cavity forming process of a cavity printed circuit board according to a conventional technique.

  As shown in the figure, a plurality of circuit patterns 1a, 1b, 2a, 3a, 4a, and 6 are formed between insulators in a structure in which multiple insulating layers 1, 2, 3, 4, and 5 are laminated. Forming the cavity C, which is the position where the electronic element chip is mounted on the printed circuit board, corresponds to a very difficult technique.

  That is, as shown in FIG. 1, a method of selectively processing the position of the cavity C using a milling bit (M) on a printed circuit board on which a finished product is laminated is often used. However, in this method, the processing accuracy must be managed at ± 5 μm, but in reality, it is managed at about 50 μm to 100 μm. However, in reality, machining is very difficult, and variation in machining accuracy becomes very large, which becomes a fatal problem in product reliability during mass production, and appears as a problem in mass production.

  Alternatively, as shown in FIG. 2, a method of selectively forming a cavity by precisely punching the position of the cavity with a punching machine P in a finished product state can be applied. However, in such a system, since the C-stage substrate is punched by the punching blade, the outer wall of the cavity is inevitably damaged. Such damage to the outer wall of the cavity is caused by CAF (Cathode due to moisture absorption). Anode Filament) shot (development where the glass filament in the prepreg creates a gap by punching and electrical shots are generated between vias inside the PCB), delamination, and damage to the cavity bottom surface As a result, the manufacturing cost of the punching machine P increases, leading to problems that the degree of freedom in cavity design becomes very narrow.

  The present invention has been devised to solve this problem, and the object of the present invention is to provide an upper surface of a cavity circuit pattern when a multilayer printed circuit board having cavities in the circuit board is manufactured. A laser stopper layer is formed on the surface, and laser processing enables rapid and precise cavities to be formed, enabling precise control of the cavity depth, and a circuit pre-formed inside the cavity. It is to provide a manufacturing process that does not affect the manufacturing process.

  In addition, another object of the present invention is to provide a flow (flow) so that a metal pattern layer can be formed and fixed in the upper part of an empty space when a multilayer printed circuit board having a cavity in the circuit board is manufactured. The cavities are processed by using the prepreg without), and can be used as an interlayer insulator, so that the precise depth of the cavity can be managed, and the circuit pre-formed inside the cavity It is to provide a manufacturing process that does not affect the manufacturing process.

  As a means for solving this problem, the present invention provides a first step of forming a base circuit board having an internal circuit layer including a cavity circuit pattern on the surface of the substrate, and a laser stopper layer on the cavity circuit pattern. A second step of forming a cavity region, a third step of forming at least one external circuit layer on the base circuit board, and a step of removing the external circuit layer above the laser stopper layer to form a cavity region. The manufacturing method of the printed circuit board including the cavity which consists of four steps can be provided.

  Also, unlike the manufacturing process described above, a first step of forming a base circuit board having an internal circuit pattern including a cavity circuit pattern on the surface of the substrate, an opening region above the cavity circuit pattern on the base circuit board And a third step of removing a cover metal layer corresponding to the cavity region of the cavity circuit layer, and a method of manufacturing the printed circuit board including the cavity. It is also possible to embody.

  According to the present invention, when manufacturing a multilayer printed circuit board having a cavity in the circuit board, a laser stopper layer is formed on the upper surface of the cavity circuit pattern, and a rapid and precise cavity is formed by laser processing. Therefore, it is possible to precisely control the depth of the cavity, and it is possible to implement a manufacturing process that does not affect the circuits previously formed in the cavity.

  In particular, for the efficiency of cavity processing, a general-purpose insulating material can be used without selecting a separate prepreg, and the surface treatment mode and cavity of the cavity circuit pattern can be used when using the laser stopper layer. It also has the effect of ensuring the freedom of tea design.

  In addition, according to the present invention, when a multi-layer printed circuit board having a cavity in the circuit board is manufactured, a metal pattern layer is formed on the upper portion of the empty space so that the flow can be fixed. By using a prepreg that is not processed, the cavity can be processed and used as an interlayer insulator, allowing precise control of the cavity depth and affecting the circuits that are pre-formed inside the cavity. There is an effect that it is possible to implement a manufacturing process that does not affect.

It is a conceptual diagram regarding the manufacturing process of the printed circuit board which concerns on a prior art. It is a conceptual diagram regarding the manufacturing process of the printed circuit board which concerns on a prior art. It is a flow chart and a process diagram of a manufacturing process of a printed circuit board provided with a cavity according to the present invention. It is a flow chart and a process diagram of a manufacturing process of a printed circuit board provided with a cavity according to the present invention. It is a flow chart and a process diagram of a manufacturing process of a printed circuit board provided with a cavity according to the present invention. It is a flow chart and a process diagram of a manufacturing process of a printed circuit board provided with a cavity according to the present invention. It is a section conceptual diagram showing the structure of the printed circuit board concerning the present invention. The present invention relates to a manufacturing process of a printed circuit board having a cavity according to the present invention. The present invention relates to a manufacturing process of a printed circuit board having a cavity according to the present invention.

  In the manufacturing process of a printed circuit board having a cavity, after forming a multilayer printed circuit board using a laser stopper, the cavity region is processed to increase the degree of freedom of cavity processing. The gist of the invention is to provide a manufacturing process capable of protecting the circuit.

To this end, a base circuit board having an internal circuit layer including a cavity circuit pattern is formed on the surface of the substrate, a laser stopper layer is formed on the cavity circuit pattern, and at least one or more on the base circuit board. It can be implemented by a step of forming an external circuit layer and a step of forming a cavity region by removing the external circuit layer above the laser stopper layer.
〔Example〕

The configuration and operation according to the present invention will be specifically described below with reference to the accompanying drawings. In the configuration of the invention described below, the same components are denoted by the same reference numerals in common in different drawings, and the repeated description thereof is omitted. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the above terms. The above terms are only used to distinguish one component from another.
[ First embodiment]

  3 to 4 show a flow chart and process diagrams of the manufacturing process of the first embodiment according to the present invention.

The manufacturing process according to the present invention is broadly divided into a first step of forming a base circuit board having an internal circuit layer including a cavity circuit pattern on the surface of the substrate, and a first step of forming a laser stopper layer on the cavity circuit pattern. The second stage includes a third stage in which at least one external circuit layer is formed on the base circuit board, and a fourth stage in which the external circuit layer above the laser stopper layer is removed to form a cavity region.
A specific example of each stage will be described with reference to the drawings.
(1) Internal circuit layer (cavity circuit pattern) formation process

  In the first stage, as shown in FIG. 2b, first, via holes H for electrical conduction between layers of the copper foil composite in which the metal layers 110 are formed on both surfaces of the insulating material 120 are processed (S1 stage). Subsequently, the copper foil is patterned to form an internal circuit pattern 111 (step S2). In this case, the internal circuit pattern 111 includes a cavity circuit pattern 112 disposed below a cavity region C where a cavity on which a chip is mounted is formed later (including the cavity circuit pattern on the insulating layer). The structure in which the internal circuit layer is formed is defined as “base circuit board”).

  Next, a solder resist (PSR; 130) is printed in the cavity region C (step S3), the solder resist 130 in the cavity region C is exposed, and the solder resist is interposed between the cavity circuit patterns 112 as illustrated. The pattern 131 may be formed (step S4). In addition, in the cavity region C, a laser stopper step portion T, which is a metal pattern exposed to the outside of the cavity circuit pattern 112, that is, the edge portion of the cavity region, can be formed during circuit processing. The stepped portion becomes an end portion where the laser stopper layer is laminated in the cavity region C, and thereafter, a part of the stepped portion is exposed in the cavity region.

Next, a process of forming a surface treatment layer 113 by oxidizing the surface of the cavity circuit pattern 112 may be added. The surface treatment layer 113 is not only formed by oxidation treatment, but also any one of Cu, Ni, Pd, Au, Sn, Ag, Co, or a binary or ternary alloy thereof. It is also possible to form by plating.
(2) Laser stopper layer formation process

  In step S5, a laser stopper step T is provided at the edge of the cavity region C, and in step S6, a heat resistant laser stopper layer 140 having a weak adhesive force is formed in the cavity region C.

The laser stopper layer 140 is a layer that serves as a stopper that automatically stops the laser when the cavity region is processed later with a laser drill, and is made of a heat-resistant material having a weak adhesive force as described above. Can be formed. Particularly preferably, in order to facilitate the process, it is preferably configured in a tape shape so that it can be easily detached. For example, it can be formed as an insulating layer using any one of epoxy, phenol resin, prepreg, polyimide, and ABF, and is more preferably formed of the tape material described above. As a preferred example, the laser stopper layer can be easily formed by attaching a PI (polyimide) tape.
(3) External circuit layer lamination process

  After step S5, at least one insulating layer 150 and a metal circuit layer 160 are stacked on the upper or lower portion of the base substrate to sequentially form patterned metal circuit patterns (step S7).

  Assume that the drawing structure shown in the step S8 is A, and in the subsequent process, a normal insulating layer and metal layer are laminated on the A substrate and a circuit forming process is performed. That is, it is possible to perform a normal stacking process (Build up process) for forming via holes H1 and H2 that are electrically connected to the internal circuit pattern and other circuit patterns. A substrate on which processing such as a via hole has been performed is referred to as A ′.

Next, a large number of insulating layers and metal circuit layers were formed on the top of the A ′ substrate (identification code B), and after forming a circuit pattern using each metal circuit, processes such as via hole processing and surface treatment were completed. Thereafter, a multilayer printed circuit board having a structure as in step S9 is formed.
(4) Cavity region formation process

Subsequent steps will be described with reference to FIGS. 5 and 6 as follows.
In the process after the structure of the multilayer printed circuit board is formed, a cavity processing process is performed. The cavity processing aligns the position where the cavity is processed using a laser drill (L), and the above laser Processing is started in the direction corresponding to the stopper step T, and thereafter, when the laser stopper layer 140 is reached, laser processing automatically stops (step S10). Thereafter, the processed portion of the insulating layer and the metal layer are removed, and finally the laser stopper layer 140 is removed, thereby completing the cavity processing (step S11).

  The above-mentioned process can form a quick and precise cavity by laser processing performed on the basis of the laser stopper layer, enables precise control of the cavity depth, and is pre-formed inside the cavity. Without affecting the circuit being used, general-purpose general insulation can be used without selecting a separate prepreg for processing efficiency according to the characteristics of cavity processing such as alkali etching, In using the laser stopper layer, the surface treatment form of the cavity circuit pattern and the degree of freedom in the cavity design can be ensured.

Below, the structure of the printed circuit board manufactured by the manufacturing process mentioned above is demonstrated.
Referring to FIG. 7, this shows the structure of the printed circuit board according to the present invention from which the laser stopper layer of step S11 is removed.

  The printed circuit board according to the present invention includes a base circuit board including an internal circuit layer 111 electrically connected to the embedded circuit pattern. The internal circuit layer 111 has a structure including a cavity circuit pattern 112 formed below the cavity region. In addition, a cavity region C where the cavity circuit pattern 112 is exposed is provided on the surface of the base circuit board, and the cavity region C provides a space where an electronic device chip can be mounted later.

  In addition, a solder resist pattern 113 as described in the manufacturing process is formed between the cavity circuit patterns 112 to protect the circuit patterns, and a surface treatment layer 113 is formed on the surface of the cavity circuit patterns 112. Can be formed. In particular, at least one circuit pattern P is exposed on the side wall surface of at least one insulating layer constituting the cavity region C of the printed circuit board according to the present invention.

In the printed circuit board, the metal step T is exposed on the surface of the lower edge portion of the cavity region C, and the surface treatment layer 113 formed on the cavity circuit pattern oxidizes the exposed surface of the cavity circuit pattern. (Oxide) is an oxide layer formed by treatment, or any one of Cu, Ni, Pd, Au, Sn, Ag, Co, or a binary or ternary alloy thereof. It can be formed as a plated layer of structure.
Second embodiment

  In this embodiment, in the manufacturing process of the printed circuit board having a cavity, a manufacturing process in which the efficiency of forming the cavity is increased by using an insulating layer having almost no flow and a cover metal layer formed on the insulating layer, The gist of the invention is to form a highly reliable printed circuit board structure manufactured in this manner.

7 to 8 show a flow chart and process diagrams of the manufacturing process of the second embodiment according to the present invention.
The manufacturing process according to the present invention is broadly divided into a first step of forming a base circuit board having an internal circuit pattern including a cavity circuit pattern on the surface of the substrate, and an upper part of the cavity circuit pattern on the internal circuit pattern. It consists of a second step of forming a cavity circuit layer that is free of a region, and a third step of removing the cover metal layer corresponding to the cavity region of the cavity circuit layer.
(1) Internal circuit pattern formation process

  Specifically, in the first stage (Q1 stage), first, via holes H for interlayer electrical conduction are processed in the copper foil composite CCL in which the copper foil 210 is formed on both surfaces of the insulating layer 220 (Q11). Next, the copper foil 210 is patterned to form an internal circuit pattern 211 (Q12). The internal circuit pattern 211 includes a cavity circuit pattern 212 that is exposed to the lower surface of the cavity later.

Next, a solder resist 230 is applied to the cavity circuit pattern 212 to form a solder resist pattern 231 as a protective pattern (Q13 to Q14), and the surface of the cavity circuit pattern on which the solder resist pattern 231 is not formed is formed. Can perform a surface treatment to form a plating layer. For this reason, the plating masking layer 240 is formed in the region where the plating layer is not formed, and the surface treatment layer 213 is formed by plating. The surface treatment layer can be formed as a single layer or multiple layers using any one of Cu, Ni, Pd, Au, Sn, Ag, Co, or a binary or ternary alloy thereof. Thereafter, the plating masking layer 240 is removed (Q15 to Q17).
(2) Cavity circuit layer formation process

Next, the second stage (Q2 stage) is performed.
In the second step, an insulating layer 250 having an opening in one region is stacked so that a vacant space is basically formed above the cavity circuit pattern 212, and the upper portion is stacked with a metal thin film 260. (In the present invention, an insulating layer having an opening in such a region is defined as a “cavity insulating layer”).

  Next, in step Q3, the metal thin film 260 is patterned to form the cover metal layer C1 and other circuit patterns 261. Thereafter, the same process as described above, that is, the cavity circuit pattern is formed on the cover metal layer C1. An insulating layer 270 having an opening corresponding to the region is applied, and a metal thin film layer 271 is further applied thereon, followed by patterning to form a second cover metal layer C2 and other circuit patterns 272. To do. The steps as described above can be repeated several times, and as the repeated steps continue, the height of the cavity formed later can be formed higher. It is preferable that the cavity insulating layers 260 and 270 that form an open space above the cavity circuit pattern have a characteristic that there is almost no flow. This is because a thermocompression bonding process is performed after laminating with the central region opened so as to have a certain space so as to form a space where the upper part of the cavity circuit pattern 231 is vacant later. This is because it is preferable that the prepreg used for the cavity insulating layer does not flow into the cavity region.

  In addition, a normal insulating layer 252 and a metal layer 261 are laminated on the half-facing surface where the cavity insulating layer and the metal thin film layer are formed.

  Further, the cover metal layer 212 formed in the lamination process is preferably formed longer than the opening regions P1 and P2 of the respective insulating layers. In order to prevent the cover metal layer from collapsing toward the opening region in the continuous process, it is preferable that the region where the end of the cover metal layer is in contact with the upper surface of the opening region is formed in the range of 25 μm to 100 μm at a minimum. . This is because when the contact area X is 25 μm or less, it tends to collapse, and when it is 100 μm or more, there is a problem that the degree of freedom in design is reduced. Therefore, it is preferable to embody a region where both ends of the cover metal layer are in contact with each other in a range of 50 μm to 200 μm.

  Next, as shown in the Q3 process, the cavity C can be formed by the process of removing the cover metal layers C1 and C2. In general, the cover metal layer removing step is preferably performed by alkali etching in order to remove the cover metal layer formed of Cu. This is because the surface-treated plating layer on the other circuit pattern surface is not affected by the etching.

  The structure of the printed circuit board provided with the cavity according to the present invention that can be formed by the manufacturing process as described above is as follows (described with reference to the Q3 stage drawing).

  The printed circuit board according to the present invention includes a cavity C in which the cavity circuit pattern 212 is exposed on the surface of the substrate including an outer circuit pattern 271 electrically connected to a plurality of embedded circuit patterns. The embedded circuit pattern is a concept including a pattern 261 formed on each insulating layer. In particular, at least one or more circuit patterns Y1 and Y2 are exposed on the side wall surface of at least one or more insulating layers constituting the cavity C, and the same circuit is also formed on the side wall surface beyond the circuit pattern thus exposed. The pattern is exposed.

  Further, the surface of the cavity circuit pattern has a single-layer or multi-layer surface treatment layer using any one of Cu, Ni, Pd, Au, Sn, Ag, Co, or a binary or ternary alloy thereof. 213 may be formed, and a solder resist pattern layer 231 may be formed in a region of the cavity circuit pattern.

  In the foregoing detailed description of the present invention, specific examples have been described. However, various modifications can be made without departing from the scope of the present invention. The technical idea of the present invention should not be limited to the embodiments described in the present invention, but should be determined not only by the claims but also by their equivalents.

Claims (21)

Forming a base circuit board comprising an internal circuit layer including a cavity circuit pattern on a surface of the substrate;
A second step of forming a laser stopper layer on the cavity circuit pattern;
A third step of forming at least one or more external circuit layers on the base circuit board;
Removing the external circuit layer above the laser stopper layer to form a cavity region;
The manufacturing method of the printed circuit board which has a cavity including this. The first stage includes
a1) forming an electrically conductive internal circuit layer on both sides of the first insulating layer;
a2) forming at least one solder resist pattern on the cavity circuit pattern of the internal circuit layers;
The manufacturing method of the printed circuit board of Claim 1 containing this. The step a2)
Forming a solder resist pattern so that the cavity circuit pattern is exposed;
The method of manufacturing a printed circuit board according to claim 2, further comprising performing a surface treatment on the exposed cavity circuit pattern. The third stage includes
3. The method according to claim 2, wherein the at least one insulating layer and the metal circuit pattern are sequentially formed on the base circuit board, and a via hole that is electrically connected to the internal circuit pattern and the other circuit pattern is formed. Manufacturing method of printed circuit board. The fourth stage includes
b1) processing the upper insulating layer and metal layer of the cavity circuit pattern with a laser drill until the laser stopper layer is exposed;
b2) removing the processed insulating layer and metal layer to form a cavity region;
b3) removing the laser stopper layer;
The manufacturing method of the printed circuit board of Claim 1 containing this. A base circuit board having an internal circuit pattern electrically connected to the embedded circuit pattern;
A cavity region where a cavity circuit pattern is exposed on a surface of the base circuit board;
A solder resist pattern formed between the cavity circuit patterns,
A printed circuit board, wherein at least one circuit pattern is exposed on a side wall surface of at least one insulating layer constituting the cavity region. The printed circuit board is:
The printed circuit board according to claim 6, further comprising a surface treatment layer formed on a surface of the cavity circuit pattern.   The printed circuit board according to claim 6, wherein the surface of the lower edge portion of the cavity region includes a cavity in which the metal stepped portion T is exposed. The surface treatment layer is
The printed circuit board according to claim 7, wherein an exposed surface of the cavity circuit pattern is oxidized. The surface treatment layer is
On the surface of the cavity circuit pattern, a single-layer or multi-layer plating layer using any one of Cu, Ni, Pd, Au, Sn, Ag, Co or a binary or ternary alloy thereof is used. The printed circuit board according to claim 7. A cavity region formed in the depth direction of the base circuit board and embodying a chip mounting region;
On the surface of the lower edge portion of the cavity region, a structure in which the metal step portion T is exposed,
Including a printed circuit board. The base circuit board includes an internal circuit pattern electrically connected to the embedded circuit pattern,
The printed circuit board of claim 11, wherein a cavity circuit pattern is exposed on a surface of the base circuit board on a lower surface of the cavity region.   The printed circuit board according to claim 12, further comprising a solder resist pattern formed between the cavity circuit patterns.   The printed circuit board according to claim 13, wherein at least one circuit pattern is exposed on a side wall surface of at least one insulating layer constituting the cavity region. The printed circuit pattern is:
The printed circuit board according to claim 14, further comprising a surface treatment layer formed on a surface of the cavity circuit pattern. Forming a base circuit board having an internal circuit pattern including a cavity circuit pattern on a surface of the substrate;
Forming a cavity circuit layer including an open region on the cavity circuit pattern on the base circuit board;
Removing a cover metal layer corresponding to a cavity region of the cavity circuit layer;
The manufacturing method of the printed circuit board which has a cavity including this. The first stage includes
a1) forming an electrically conductive outer circuit pattern on both sides of the first insulating layer;
a2) forming at least one solder resist pattern on the cavity circuit pattern among the outer circuit patterns;
a3) performing a surface treatment plating after performing plating masking on a region other than the cavity circuit pattern;
a4) removing the plating masking;
The manufacturing method of the printed circuit board of Claim 16 containing this. The second stage includes
b1) laminating a cavity insulating layer having a partial area opened on the outer circuit pattern;
b2) forming a metal thin film layer covering the entire surface of the cavity insulating layer and performing patterning,
Repeating steps b1) to b2) one or more times,
17. The method of manufacturing a printed circuit board according to claim 16, wherein the patterning in the step b2) forms a circuit pattern in an area excluding an upper cover metal layer corresponding to the cavity circuit pattern. The third stage includes
19. The method of manufacturing a printed circuit board according to claim 18, wherein the method is performed by removing at least one cover metal layer formed on the cavity circuit pattern by alkali etching. Including a cavity region where the cavity circuit pattern is exposed on a surface of the substrate including an outer circuit pattern electrically connected to the embedded circuit pattern;
The printed circuit board according to claim 1, wherein at least one circuit pattern is exposed on a side wall surface of at least one insulating layer constituting the cavity region.   The printed circuit board according to claim 20, wherein a solder resist pattern layer is formed in a region of the cavity circuit pattern.

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