KR102466204B1 - Printed circuit board and method of manufacturing the same - Google Patents

Abstract

A printed circuit board and a method for manufacturing the printed circuit board are disclosed. A printed circuit board according to one aspect of the present invention includes a laminate, a cavity formed in the laminate, a connection terminal formed in the laminate and protruding into the cavity, and an exposed surface of the connection terminal exposed to the cavity to prevent etching of the connection terminal. It includes an etch-stop layer covering the.

Description

Printed circuit board and manufacturing method of printed circuit board {PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME}

The present invention relates to a printed circuit board and a method for manufacturing the printed circuit board.

In accordance with the miniaturization of electronic products, a light, thin and compact package or module in which electronic components are mounted on a printed circuit board is required.

Since there is a problem in that the thickness of the package or module increases when the electronic component is mounted on the surface of the printed circuit board, a cavity may be formed in the printed circuit board and the electronic component may be mounted in the cavity.

Korean Patent Publication No. 10-2014-0104909 (published on August 29, 2014)

According to an embodiment of the present invention, a printed circuit board having a cavity having more precise dimensions can be provided.

1 is a view showing a printed circuit board according to an embodiment of the present invention.
Figure 2 is an enlarged view of part A of Figure 1;
3, 9 to 16 are views sequentially showing manufacturing processes to explain a manufacturing method of a printed circuit board according to an embodiment of the present invention.
4 to 8 are views sequentially illustrating a method of manufacturing a dummy used in a method of manufacturing a printed circuit board according to an embodiment of the present invention.

Terms used in this application are only used to describe specific embodiments, and are not intended to limit the present invention. Singular expressions include plural expressions unless the context clearly dictates otherwise. In this application, the terms "include" or "have" are intended to designate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification, but one or more other features It should be understood that the presence or addition of numbers, steps, operations, components, parts, or combinations thereof is not precluded. And, throughout the specification, "on" means to be located above or below the target part, and does not necessarily mean to be located on the upper side with respect to the direction of gravity.

In addition, coupling does not mean only the case of direct physical contact between each component in the contact relationship between each component, but another configuration intervenes between each component so that the component is in the other configuration. It should be used as a concept that encompasses even the case of contact with each other.

Since the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of description, the present invention is not necessarily limited to the shown bar.

Hereinafter, embodiments of a printed circuit board and a printed circuit board according to the present invention will be described in detail with reference to the accompanying drawings, and in the description with reference to the accompanying drawings, the same or corresponding components are given the same reference numerals, Redundant descriptions thereof will be omitted.

printed circuit board

1 is a diagram showing a printed circuit board according to an embodiment of the present invention. FIG. 2 is an enlarged view of part A of FIG. 1 .

Referring to FIGS. 1 and 2 , a printed circuit board 1000 according to an embodiment of the present invention includes a laminate 100, a cavity (CV), a connection terminal 200, and an anti-etching layer 300.

Conductor patterns P1 are formed in the laminate 100, and an insulating material is formed between the conductor patterns P1 to insulate the conductor patterns P1 from each other. That is, the laminate 100 is formed by alternately stacking the conductor pattern P1 and the insulating material layer. In addition, vias V1 penetrating the insulating material are formed in the laminate 100 to electrically connect at least a portion of the conductive patterns P1 formed in different layers to each other.

Each of the conductor pattern P1 and the via V1 may be formed of an electrically conductive material. For example, the conductor pattern may be formed of copper (Cu), but is not limited thereto, and may be formed of various electrically conductive materials such as nickel (Ni) and aluminum (Al). The conductor pattern P1 and the via V1 may be formed of the same electrically conductive material, but are not limited thereto and may be formed of different electrically conductive materials.

The insulating material may be a prepreg (PPG) in which an insulating resin is impregnated with glass fibers or a build-up film in which an inorganic filler is contained in an insulating resin, but is not limited thereto. That is, any electrical insulating material falls within the scope of the present invention.

The cavity (CV) is formed in the laminate 100 and is a space in which the electronic device 400 to be described later is mounted in the laminate 100 . The cavity CV may be formed in the multilayer body 100 in various shapes or depths according to the thickness of the electronic device 400 or a design need.

Here, the laminate 100 includes the first insulating layer 110 in which the accommodating groove 111 is formed, and the filling part 121 formed in the accommodating groove 111 to form a cavity (CV) in the accommodating groove 111. It may include a support part 123 supporting the filling part 121 and a second insulating layer 120 covering the first insulating layer 110 . That is, the laminate 100 may include the first insulating layer 110 and the second insulating layer 120, the receiving groove 111 is formed in the first insulating layer 110, and the filling part 121 ) And the second insulating layer 120 including the support part 123 covers the first insulating layer 110 . At this time, the filling part 121 of the second insulating layer 120 may fill at least a part of the receiving groove 111 to form a cavity CV in the receiving groove 111 .

Since the cavity CV is formed inside the accommodating groove 111, the diameter of the accommodating groove 111 is larger than that of the cavity CV. Here, the diameter of the receiving groove 111 may mean the length of the longest straight line among the straight lines passing through the cross section of the receiving groove 111 . The diameter of the cavity CV may also have the same meaning.

The first insulating layer 110 includes a first reinforcing material SF1 , and the first reinforcing material SF1 may be exposed to an inner circumferential surface of the receiving groove 111 . By forming the accommodating groove 111 in the first insulating layer 110 including the first reinforcing material SF1, the first reinforcing material SF1 is exposed to the inner circumferential surface of the accommodating groove 111. As an example, the first insulating layer 110 may be a prepreg (PPG) in which glass fibers, which are the first reinforcing material SF1, are impregnated with an insulating resin. In this case, the first reinforcing material SF1, glass fibers The cross section is exposed to the inner circumferential surface of the receiving groove 111.

The second insulating layer 120 includes the second reinforcing material SF2, and the weight ratio (wt%) of the second reinforcing material SF2 contained in the filling part 121 with respect to the filling part 121 is the support part 123 It may be smaller than the weight ratio (wt%) of the second reinforcing material SF2 contained in the support part 123 . That is, the amount of the second reinforcing material SF2 contained in the filling part 121 may be less than the amount of the second reinforcing material SF2 contained in the support part 123 . As an example, the second insulating layer 120 may be a prepreg in which glass fiber, which is the second reinforcing material SF2, is impregnated with an insulating resin, and fills the receiving groove 111 to form a cavity (CV). The amount of glass fibers included in the defined filling part 121 may be less than the amount of glass fibers included in the support part 123 .

The second insulating layer 120 may cover the first insulating layer 110 by using prepreg (PPG) in a semi-hardened state (B-stage) having fluidity. That is, the second insulating layer 120 fills the space between the inner circumferential surface of the receiving groove 111 and the surface of the dummy (D in FIG. 3 or the like) disposed in the receiving groove 111 . Since the fluidity of the second reinforcing material SF2 is lower than that of the insulating resin, the insulating resin forms the filling part 121 . The dummy (D in FIG. 3, etc.) will be described in detail in the method of manufacturing a printed circuit board according to an embodiment of the present invention.

A conductor pattern P2 and a via V2 may be formed in the second insulating layer 120 . The conductor pattern P2 formed on the second insulating layer 120 may be electrically connected to the conductor pattern P1 formed on the first insulating layer 110 or the connection terminal 200 to be described later through the via V2.

The connection terminal 200 is formed in the laminate 100 and protrudes into the cavity CV. The connection terminal 200 protrudes from the cavity CV and electrically connects an electronic device 400 mounted in the cavity CV to be described below and the laminate 100 . The shape of the connection terminal 200 and the pitch between the connection terminals 200 may be variously changed in consideration of the shape of the external terminal formed on the electronic device 400 to be mounted in the cavity CV and the pitch between the external terminals. .

The connection terminal 200 may be formed of an electrically conductive material. For example, the connection terminal 200 may be formed of copper (Cu), but is not limited thereto, and may be formed of various electrically conductive materials such as nickel (Ni) and aluminum (Al).

The anti-etching layer 300 covers the exposed surface of the connection terminal 200 exposed to the cavity (CV) to prevent the connection terminal 200 from being etched. That is, the anti-etching layer 300 covers all exposed surfaces of the connection terminals 200 in forming the cavity (CV) and the connection terminals 200 in the laminate 100 by etching the dummy (D in FIG. 3 ). Therefore, the connection terminal 200 is prevented from being etched.

The anti-etching layer 300 is formed of a material that does not react to an etchant used to etch the dummy (D in FIG. 3 ). Specifically, when the dummy (D in FIG. 3, etc.) is formed of copper (Cu), it is formed of a material that does not react to a copper etchant.

The anti-etching layer 300 may be formed of a material containing gold (Au). Since gold (Au) is a material with low ionization tendency, various etchants can be selected during dummy etching (D in FIG. 3, etc.) and oxidation of the connection terminal 200 can be prevented. In addition, since gold (Au) is a metal with excellent ductility and electrical conductivity, when designing the connection terminal 200 and the external terminal of the electronic device 400, an allowable error range may increase, and signal loss may occur less. .

The anti-etching layer 300 may include a first cover layer covering the exposed surface of the connection terminal 200 and a second cover layer covering the first cover layer. That is, the anti-etching layer 300 may be formed in a multi-layer structure. In this case, the material forming the first cover layer and the second cover layer may be selected in consideration of the combination with the material forming the connection terminal 200 and the first cover layer, respectively.

The first cover layer may include nickel (Ni), and the second cover layer may include gold (Au). When the connection terminal 200 is formed of copper (Cu), the first cover layer may be formed of nickel (Ni) and the second cover layer may be formed of gold (Au). 200) and the second cover layer may be used as a bonding layer.

The electronic device 400 may be an active device such as a capacitor or an inductor and/or a passive device such as an IC. The electronic device 400 may be mounted in the cavity CV.

Manufacturing method of printed circuit board

3, 9 to 16 are views sequentially showing manufacturing processes to explain a manufacturing method of a printed circuit board according to an embodiment of the present invention.

4 to 8 are views sequentially illustrating a method of manufacturing a dummy used in a method of manufacturing a printed circuit board according to an embodiment of the present invention.

Referring to FIG. 3 , the method of manufacturing a printed circuit board according to the present embodiment includes the steps of forming an accommodating groove in a first insulating layer, and disposing a dummy in which connection terminals and an anti-etching layer are buried from one surface in the accommodating groove. It includes steps to

First, an accommodation groove 111 is formed in the first insulating layer 110 . The first insulating layer 110 may be a prepreg (PPG) including a first reinforcing material SF1 such as glass fiber.

The accommodating groove 111 may be formed by removing a portion of the first insulating layer 110 by etching or drilling. For example, an etching resist is formed on one surface of the first insulating layer 110 to open a region corresponding to the region where the receiving groove 111 is to be formed and close the remaining region of one surface of the first insulating layer 110. After that, the receiving groove 111 may be formed by etching an open area where no etch resist is formed.

The first conductor pattern P1 may be formed on the first insulating layer 110 . After the first conductor pattern P1 is formed on the first insulating layer 110 , the receiving groove 111 may be formed. The receiving groove 111 may be formed first, and then the first conductor pattern P1 may be formed. The first conductor pattern P1 may be formed on the first insulating layer 110 using at least one of conventional circuit pattern forming methods. As an example, the first conductor pattern P1 may be formed on the first insulating layer 110 using a copper clad laminate (CCL) and a subtractive method, but is not limited thereto, and the first The conductor pattern P1 may be formed on the first insulating layer 110 by an additive method, a semi-additive method, or a modified semi-additive method. have.

When the first conductor patterns P1 are formed on both surfaces of the first insulating layer 110, at least a portion of each of the first conductor patterns P1 formed on both surfaces of the first insulating layer 110 is connected to each other. A first via V1 may be formed in the first insulating layer 110 . The first via V1 may be formed in the first insulating layer 110 by processing a via hole in the first insulating layer 110 and forming an electrically conductive material in the via hole. The via hole may be formed in the first insulating layer 110 by drilling (including mechanical drilling and laser drilling). The first via V1 may be formed by filling the via hole with conductive paste or plating the via hole with a conductive material. When the first via V1 is formed by plating, the first via V1 and the first conductor pattern P1 may be simultaneously formed in the same plating process.

Meanwhile, although FIG. 3 shows that the first insulating layer 110 is a single layer, the first insulating layer 110 may be formed in multiple layers depending on the depth of the cavity (CV) to be designed or formed. In this case, the first conductor pattern P1 may also be formed in multiple layers.

Next, the first insulating layer 110 in which the receiving groove 111 and the first conductor pattern P1 are formed is attached to one surface and the other surface of the detach core 10, respectively. 3 and the like show a case in which the first insulating layer 110 is formed on both the top and bottom of the detach core 10 for process efficiency, but since this is only an example, the top or bottom of the detach core 10 Forming the first insulating layer 110 only on the lower surface is within the scope of the present invention. In addition, as long as a member temporarily supporting the first insulating layer 110 in which the receiving groove 111 is formed, such as the detach core 10, is used, it falls within the scope of the present invention.

Next, the dummy D is placed in the receiving groove 111 of the first insulating layer 110 . At this time, the connection terminal 200 and the anti-etching layer 300 are formed to be buried in one surface of the dummy D.

Hereinafter, a method of manufacturing the dummy D applied to the present embodiment will be briefly described with reference to FIGS. 4 to 8 .

First, as shown in FIG. 4, a carrier 20 having a metal foil 30 formed on one surface thereof is prepared. The carrier 20 may have a carrier metal foil 22 formed on a carrier film 21 . The metal foil 30 may be formed of copper (Cu), but is not limited thereto and may be formed of various electrically conductive materials such as aluminum (Al) and nickel (Ni).

Next, as shown in FIG. 5, a connection terminal 200 is formed on one surface of the metal foil 30. The connection terminal 200 may be formed by any one of methods such as forming a patterned mask on the metal foil 30 using dry film, filling the conductive material along the mask, plating the conductive material, or depositing the conductive material. can In this embodiment, the connection terminal 200 is formed by electrolytic copper plating using the dry film as a plating resist and the metal foil 30 as a seed layer, but is not limited thereto.

Next, as shown in FIG. 6 , after removing the mask formed on one surface of the metal foil 30 , an anti-etching layer 300 is formed on the exposed surface of the connection terminal 200 . The anti-etching layer 300 may be formed by electroplating or electroless plating, but is not limited thereto. When the dummy D is formed of copper (Cu), the anti-etching layer 300 may be formed of a material that does not react to a copper etchant. In addition, the anti-etching layer 300 may be formed in a multi-layer structure. In this case, the anti-etching layer 300 of the multi-layer structure may be formed through a plurality of plating processes using different plating solutions. The outer layer may be formed of a material that does not react with the copper etchant.

Next, as shown in FIG. 7 , a dummy D is formed on one surface of the metal foil 30 so that the anti-etching layer 300 and the connection terminal 200 are buried. The shape of the dummy D corresponds to the shape of the receiving groove 111 and the diameter of the dummy D is smaller than the diameter of the receiving groove 111, and has an opening corresponding to the shape and size of the dummy D. The dummy D may be formed by forming a plating resist on one surface of the metal foil 30 and then performing plating. The dummy D may be formed by electrolytic copper plating.

Then, as shown in FIG. 8, the dummy D applied to the present embodiment is manufactured by separating the dummy D from one side of the metal foil 30. FIG. 8 shows first separating the metal foil 30 from the carrier 20 . However, this may be changed in various ways according to design or process needs. In this embodiment, the metal foil 30 is separated from the carrier 20 and the metal foil 30 is removed from the dummy (D).

Referring to FIG. 9 , the method of manufacturing a printed circuit board according to the present embodiment includes forming a first insulating layer and a second insulating layer on one surface of the dummy to fill a gap between the inner surface of the receiving groove and the surface of the dummy. include

The second insulating layer 120 may be a prepreg (PPG) in which glass fibers as the second reinforcing material SF2 are impregnated with an insulating resin. Since the prepreg (PPG) in the semi-cured state (B-stage) has fluidity, the prepreg (PPG) in the semi-cured state is laminated on the first insulating layer 110 and one side of the dummy (D). In this case, the insulating resin is filled between the inner surface of the receiving groove 111 and the surface of the dummy (D).

Meanwhile, as shown in FIG. 9 , for easy handling of the second insulating layer 120 in a semi-cured state, a single-sided metal laminate having a semi-cured second insulating layer 120 formed on one surface may be used. For example, the second insulating layer 120 may be formed on the first insulating layer 110 and one surface of the dummy D by using RCC (Resin Coated Copper) in which an insulating material in a semi-cured state is formed on one surface of the copper foil. .

Referring to FIGS. 10 and 11 , the method of manufacturing a printed circuit board according to the present embodiment includes forming a second via and a second conductor pattern in the second insulating layer. First, via holes VH are formed in the second insulating layer 120 . The via hole VH may be formed in the second insulating layer 120 through laser drilling or mechanical drilling. When the second insulating layer 120 is a photosensitive insulating resin, the via hole VH may be formed through a photolithography process. Next, the second via V2 and the second conductor pattern P2 are formed through plating.

Referring to FIG. 12 , the method of manufacturing a printed circuit board according to the present embodiment includes separating a laminate including a dummy from a detach core. Hereinafter, for convenience of explanation, the lower laminate 100 separated from the detach core 10 will be described, but the same description is applied to the upper laminate 100.

Referring to FIGS. 13 and 14 , the method of manufacturing a printed circuit board according to the present embodiment includes forming a patterned solder resist (SR) and a surface treatment layer 40 on the laminate 100 .

First, as shown in FIG. 13 , openings are formed on both sides of the laminate 100 , that is, a patterned solder resist SR is formed. The patterned solder resist SR may be formed by applying photolithography or laser drilling after applying the solder resist SR on both surfaces of the laminate 100 . The opening may be formed only in the external connection pad of the first conductor pattern P1 and the second conductor pattern P2.

Next, as shown in FIG. 14, a surface treatment layer 40 is formed in the opening of the solder resist SR. In the manufacturing method of the printed circuit board according to the present embodiment, the surface treatment layer 40 may be formed of a material that does not react to an etchant used to etch the dummy D. That is, the surface treatment layer 40 may be formed of a material containing gold (Au).

Meanwhile, in this embodiment, it has been described that the surface treatment layer 40 is formed after first forming the patterned solder resist (SR), but after forming the surface treatment layer 40 first, the patterned solder resist (SR) is can also be formed.

Referring to FIG. 15 , the method of manufacturing a printed circuit board according to the present embodiment includes exposing an anti-etching layer by etching the dummy. That is, the cavity CV is formed in the laminate 100 by removing the dummy D. In the manufacturing method of the printed circuit board according to the present embodiment, since the dummy (D) is formed of copper (Cu), the dummy (D) is removed using a copper etchant. Since the copper etchant does not react with the anti-etch layer 300, the connection terminal 100 protected by the anti-etch layer 300 is not removed from the cavity CV.

Referring to FIG. 16, an electronic device is mounted in a cavity. The connection terminal 200 formed in the cavity CV and the external terminal of the electronic element 400 are electrically connected.

In the above, one embodiment of the present invention has been described, but those skilled in the art can add, change, or delete components within the scope not departing from the spirit of the present invention described in the claims. It will be possible to modify and change the present invention in various ways, which will also be said to be included within the scope of the present invention.

CV: Cavity
D: dummy
P1: first conductor pattern
P2: second conductor pattern
SF1: first reinforcement
SF2: second reinforcement
SR: solder resist
V1: first via
V2: second via
VH: via hole
10: Detach Core
20: carrier
21: carrier film
22: carrier metal foil
30: metal foil
40: surface treatment layer
100: laminate
110: first insulating layer
111: receiving groove
120: second insulating layer
121: filling part
123: support
200: connection terminal
300: anti-etching layer
400: electronic device
1000: printed circuit board

Claims (10)

laminate;
a cavity formed in the laminate;
a connection terminal formed in the laminate and protruding into the cavity; and
an anti-etching layer covering an exposed surface of the connection terminal exposed to the cavity to prevent etching of the connection terminal; Including,
The laminate includes a first insulating layer in which an accommodating groove is formed and a second insulating layer in which the cavity is formed,
The second insulating layer covers at least a portion of each of one surface and the other surface of the first insulating layer and fills a part of the receiving groove,
The cavity has a shape penetrating a part of the second insulating layer from one surface of the second insulating layer,
At least a portion of each of a bottom surface and a wall surface of the cavity is formed on the second insulating layer.
According to claim 1,
The anti-etching layer includes gold (Au), the printed circuit board.
According to claim 1,
The anti-etching layer is
A first cover layer covering the exposed surface of the connection terminal and
A printed circuit board comprising a second cover layer covering the first cover layer.
According to claim 3,
The first cover layer includes nickel (Ni),
The second cover layer includes gold (Au), the printed circuit board.
According to claim 1,
The second insulating layer includes a filling part formed in the accommodating groove to form the cavity in the accommodating groove and a support part supporting the filling part.
According to claim 5,
The first insulating layer includes a first reinforcing material,
The first reinforcing member is exposed to the inner circumferential surface of the receiving groove, the printed circuit board.
According to claim 5,
The second insulating layer includes a second reinforcing material,
The weight ratio (wt%) of the second reinforcing material contained in the filling part to the filling part is smaller than the weight ratio (wt%) of the second reinforcing material contained in the support part to the supporting part.
According to claim 1,
an electronic device mounted in the cavity; Including more,
The electronic device is disposed spaced apart from the wall surface of the cavity, the printed circuit board.
Forming a receiving groove in the first insulating layer;
arranging a dummy in the receiving groove, in which the connection terminal and the anti-etching layer are buried;
forming a second insulating layer on the first insulating layer and one surface of the dummy to fill a gap between the inner surface of the receiving groove and the surface of the dummy; and
etching the dummy to expose the etch stop layer;
Method for manufacturing a printed circuit board comprising a.
According to claim 9,
After forming the second insulating layer,
forming vias connected to the connection terminals and external connection pads connected to the vias in the second insulating layer;
Method for manufacturing a printed circuit board further comprising a.

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