JP5908003B2 - Printed circuit board and printed circuit board manufacturing method - Google Patents

Description

  The present invention relates to a printed circuit board and a method for manufacturing the printed circuit board.

  Usually, a printed circuit board is made by wiring with copper foil on one or both sides of a board made of various thermosetting synthetic resins, and then placing or fixing an IC or electronic component on the board and electrically connecting them The wiring is embodied and coated with an insulator.

  In recent years, with the development of the electronic industry, there has been a rapid increase in demands for higher functionality, lighter, thinner, and smaller electronic components. High-density wiring and thin plates are also required for printed circuit boards on which such electronic components are mounted. Yes.

  The printed circuit board can include through vias. The through via is for connecting the interlayer wiring of the double-sided printed circuit board or the multilayer printed circuit board.

  Conventionally, circuit patterns and through vias formed on both surfaces of a printed circuit board are formed simultaneously, and the thickness of the circuit pattern and the thickness of the inner wall of the through via are the same (see, for example, Patent Document 1).

  In this case, if the plating thickness is reduced for miniaturization of the circuit pattern, the thickness of the inner wall of the through via is also reduced, so that the reliability of transmission of the power signal is lowered. Further, if the plating is made thick for a sufficient thickness of the inner wall of the through via, both the circuit patterns are formed thick, making it difficult to form a fine pattern.

US Pat. No. 6,316,738

  According to one aspect of the present invention, it is an object to provide a printed circuit board including a through via having an inner wall thicker than a circuit pattern, and a method for manufacturing the printed circuit board.

  It is another object of the present invention to provide a printed circuit board and a method of manufacturing the printed circuit board that can realize the reliability of power signal transmission together with a fine circuit pattern.

  According to an embodiment of the present invention, a base substrate, a through via formed through the base substrate, a circuit pattern formed on one side and the other side of the base substrate and formed thinner than an inner wall of the through via, A printed circuit board is provided.

  The printed circuit board according to the embodiment of the present invention may further include an insulating layer formed on the through via and the circuit pattern.

  The inside of the through via can be filled with an insulating material.

  The circuit pattern formed on one side of the base substrate may be composed of a first seed layer and a first plating layer.

  The circuit pattern formed on the other side of the base substrate may include a third seed layer and a second plating layer.

  The inner wall of the through via can be composed of a second seed layer and a plating layer.

  The plating layer may be formed in a double structure including a first plating layer and a second plating layer.

  The printed circuit board according to the embodiment of the present invention may further include an insulating film formed on both sides of the base substrate.

  The insulating film may include at least one of polyimide, epoxy resin, acrylate resin, BCB (benzocycle), silicone (silicones), PBO (polybenzoxole), and ABF (Ajinomoto Build up). it can.

  According to another embodiment of the present invention, a step of providing a base substrate, a step of forming a through via hole in the base substrate, and a first plating layer on one side of the base substrate and the inner wall of the through via hole are provided. Forming a circuit pattern; and forming a second circuit pattern and a through via by forming a second plating layer on the other side of the base substrate and the first plating layer of the through via hole. A manufacturing method is provided.

  Forming the first circuit pattern includes forming a first seed layer on one side of the base substrate, forming a second seed layer on the inner wall of the through via hole, and a first opening on the first seed layer. Forming a first plating resist having a portion formed thereon, forming a first plating layer on an inner wall of the first opening and the through via hole, and removing the first plating resist. .

  The first seed layer may be formed by a sputtering method.

  The second seed layer can be formed by an electroless plating method.

  The first plating layer can be formed by an electrolytic plating method.

  The step of forming the second circuit pattern includes forming a third seed layer on the other side of the base substrate, forming a second plating resist having a second opening formed on the third seed layer, The method may include forming a second plating layer on the first plating layer of the second opening and the through via hole and removing the second plating resist.

  The third seed layer may be formed by a sputtering method.

  The second plating layer can be formed by an electrolytic plating method.

  The inner wall of the through via hole can be formed thicker than the first circuit pattern and the second circuit pattern.

  The method for manufacturing a printed circuit board according to another embodiment of the present invention may further include forming an insulating layer on the first circuit pattern and the second circuit pattern.

  The inside of the through via can be filled with an insulating material.

  The step of providing the base substrate may further include forming an insulating layer on both sides of the base substrate.

  The insulating film may include at least one of polyimide, epoxy resin, acrylate resin, BCB (benzocycle), silicone (silicones), PBO (polybenzoxole), and ABF (Ajinomoto Build up). it can.

  The printed circuit board and the method of manufacturing the printed circuit board according to the embodiment of the present invention can realize the reliability of power signal transmission together with the fine circuit pattern.

1 is an exemplary view showing a printed circuit board according to an embodiment of the present invention; 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 is an exemplary view showing a method of manufacturing a printed circuit board according to an embodiment of the present invention.

  Objects, specific advantages and novel features of the present invention will become more apparent from the following detailed description and preferred embodiments with reference to the accompanying drawings. In this specification, it should be noted that when adding reference numerals to the components of each drawing, the same components are given the same number as much as possible even if they are shown in different drawings. I must. The terms “one side”, “other side”, “first”, “second” and the like are used to distinguish one component from another component, and the component is the term It is not limited by. Hereinafter, in describing the present invention, detailed descriptions of known techniques that may obscure the subject matter of the present invention are omitted.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

(Printed circuit board)
FIG. 1 is an exemplary view illustrating a printed circuit board according to an embodiment of the present invention.

  Referring to FIG. 1, the printed circuit board 100 includes a base substrate 110, an insulating film 120, a first circuit pattern 151, a second circuit pattern 152, a through via 153, and an insulating layer 160.

  The base substrate 110 can be formed of a composite polymer resin that is usually used as an interlayer insulating material.

  For example, by using the prepreg to form the base substrate 110, the printed circuit board can be made thinner. Alternatively, by forming the base substrate 110 using ABF (Ajinomoto Build up Film), a fine circuit can be easily realized. In addition, the base substrate can be formed using an epoxy resin such as FR-4 and BT (Bismaleimide Triazine), but is not particularly limited thereto.

  Further, a copper clad laminate (CCL) can be used as the base substrate 110. In the embodiment of the present invention, the case where the base substrate 110 is formed of a single insulating layer is illustrated, but the present invention is not limited to this. That is, the base substrate 110 may be a build-up layer composed of a multilayer or single-layer insulating layer, a circuit layer, and a via.

  The insulating film 120 can be formed on both side surfaces of the base substrate 110 in order to improve the flatness of the base substrate 110.

  Accordingly, the insulating film 120 can be formed of an insulating material having low roughness, for example, polyimide, epoxy resin, acrylate resin, BCB (benzocyclobutylene), silicone (silicones), PBO (polybenzoxazole). ), And ABF (Ajinomoto Build up Film).

  As described above, when the insulating film 120 is formed over the base substrate 110 to improve the flatness, a fine pattern can be easily formed. In the embodiment of the present invention, the insulating film 120 is formed on the base substrate 110, but this may be omitted according to the selection of those skilled in the art.

  The first circuit pattern 151 can be formed on one side of the base substrate 110. The first circuit pattern 151 may include a first seed layer 131 and a first plating layer 141. The first plating layer 141 can be formed on the first seed layer 131 formed on one side of the base substrate 110.

  The first seed layer 131 and the first plating layer 141 can be formed of an electrically conductive material, and can be formed of a material normally used for forming a circuit pattern, such as copper, nickel, or gold. . The first seed layer 131 and the first plating layer 141 may be formed of the same material or different materials.

  The second circuit pattern 152 can be formed on the other side of the base substrate 110. The second circuit pattern 152 may include a third seed layer 133 and a second plating layer 142. The second plating layer 142 may be formed on the third seed layer 133 formed on the other side of the base substrate 110.

  The third seed layer 133 and the second plating layer 142 can be formed of an electrically conductive material, for example, a material commonly used for forming a circuit pattern, such as copper, nickel, or gold. . The third seed layer 133 and the second plating layer 142 may be formed of the same material or different materials. Here, the first plating layer 141 and the second plating layer 142 are not formed simultaneously, but can be formed individually.

  The through via 153 can be formed to penetrate the base substrate 110.

  The inner wall of the through via 153 can be composed of the second seed layer 132, the first plating layer 141, and the second plating layer 142. The first plating layer 141 constituting the inner wall of the through via 153 can be formed on the second seed layer 132. The first plating layer 141 of the through via 153 can be formed simultaneously with the first plating layer 141 of the first circuit pattern 151. Further, the second plating layer 142 of the through via 153 can be formed simultaneously with the second plating layer 142 of the second circuit pattern 152.

  That is, the inner wall of the through via 153 may have a double structure of the first plating layer 141 and the second plating layer 142. The inner wall of the through via 153 having such a double structure can be formed thicker than the first circuit pattern 151 and the second circuit pattern 152. The inside of the through via 153 can be filled with the insulating layer 160. Alternatively, the inside of the through via 153 can be filled with an insulating material different from that of the insulating layer 160.

  The insulating layer 160 can be formed on both sides of the base substrate 110. Alternatively, the insulating layer 160 can also be formed inside the through via hole 115 (see FIG. 13). The insulating layer 160 can be formed of a composite polymer resin that is usually used as an interlayer insulating material.

  For example, the insulating layer 160 can be formed of an epoxy non-photosensitive resin such as a prepreg, ABF (Ajinomoto Build up Film), FR-4, or BT (Bismaleimide Triazine).

  In addition, the insulating layer 160 may be formed of a photosensitive resin including at least one of polyimide, epoxy resin, acrylate resin, BCB (benzocycle), silicone, and PBO (polybenzoxole). Can do.

  The printed circuit board 100 according to the embodiment of the present invention includes a through via 153 having inner walls thicker than the first circuit pattern 151 and the second circuit pattern 152.

  That is, even when the first circuit pattern 151 and the second circuit pattern 152 are implemented in a fine pattern, the inner wall of the through via 153 is formed in a double structure, so that a sufficient thickness for power signal transmission is provided. Can have.

(Printed circuit board manufacturing method)
2 to 14 are exemplary views illustrating a method of manufacturing a printed circuit board according to an embodiment of the present invention.

  First, referring to FIG. 2, a base substrate 110 may be provided.

  The base substrate 110 can be formed of a composite polymer resin that is usually used as an interlayer insulating material.

  For example, by using the prepreg to form the base substrate 110, the printed circuit board can be made thinner. Alternatively, by forming the base substrate 110 using ABF (Ajinomoto Build up Film), a fine circuit can be easily realized. In addition, the base substrate can be formed using an epoxy resin such as FR-4 and BT (Bismaleimide Triazine), but is not particularly limited thereto.

  Further, a copper clad laminate (CCL) can be used as the base substrate 110. In the embodiment of the present invention, the case where the base substrate 110 is formed of a single insulating layer is illustrated, but the present invention is not limited to this. That is, the base substrate 110 may be a build-up layer composed of a multilayer or single-layer insulating layer, a circuit layer, and a via.

  In addition, the insulating film 120 can be formed over the base substrate 110. The insulating film 120 can be formed on both side surfaces of the base substrate 110 in order to improve the flatness of the base substrate 110.

  Accordingly, the insulating film 120 can be formed of an insulating material having low roughness, for example, polyimide, epoxy resin, acrylate resin, BCB (benzocyclobutylene), silicone (silicones), PBO (polybenzoxazole). ), And ABF (Ajinomoto Build up Film).

  As described above, when the insulating film 120 is formed on the base substrate 110 to improve the flatness, a fine pattern can be easily formed. In the embodiment of the present invention, the insulating film 120 is formed on the base substrate 110, but this may be omitted according to the selection of those skilled in the art.

  A through via hole 115 can be formed in the base substrate 110.

  According to the embodiment of the present invention, the through via hole 115 may be formed so as to penetrate all the surfaces of the base substrate 110. Inside the through via hole 115 thus formed, a through via for electrically connecting between circuit layers formed on both surfaces of the base substrate 110 later can be formed. For example, the through via hole 115 can be formed by a physical method such as a CNC drill or a laser drill.

  Next, referring to FIG. 3, the first seed layer 131 may be formed on one side of the base substrate 110.

  The method for forming the first seed layer 131 is not particularly limited, and the first seed layer 131 can be formed by a normal method known in the art.

  In the embodiment of the present invention, the first seed layer 131 may be formed by a sputtering method. The first seed layer 131 formed by the sputtering method is for improving adhesion with a circuit pattern to be formed later. In addition, since the first seed layer 131 is formed by a sputtering method, the adhesion can be improved even with low roughness, which is advantageous for forming a fine pattern.

  The first seed layer 131 can be formed of a conductive material, and for example, can be formed of a material that is normally used for forming a circuit pattern, such as copper, nickel, or gold.

  Next, referring to FIG. 4, the second seed layer 132 may be formed on the inner wall of the through via hole 115.

  In the embodiment of the present invention, the second seed layer 132 may be formed by an electroless plating method. The second seed layer 132 can be formed of a conductive material, and can be formed of a material normally used for forming a circuit pattern, such as copper, nickel, or gold.

  Next, referring to FIG. 5, a first plating resist 210 may be formed on the first seed layer 131.

  The first opening 215 can be patterned in the first plating resist 210. The first opening 215 can be formed such that a region where a circuit pattern is formed and a region where a through via is formed are opened.

  Next, referring to FIG. 6, the first plating layer 141 may be formed.

  The first plating layer 141 can be formed in the first opening 215 of the first plating resist 210. That is, the first plating layer 141 can be formed on the first seed layer 131 exposed through the first opening 215 of the first plating resist 210 and the second seed layer 132 of the through via hole 115.

  The first plating layer 141 can be formed by an electrolytic plating method. The first plating layer 141 can be formed of an electrically conductive material, and can be formed of a material normally used for forming a circuit pattern, such as copper, nickel, or gold.

  Next, referring to FIG. 7, the first plating resist (210 in FIG. 6) can be removed.

  By removing the first plating resist (210 in FIG. 6), a part of the first seed layer 131 can be exposed to the outside.

  Next, referring to FIG. 8, the first seed layer 131 exposed by removing the first plating resist (210 in FIG. 6) can be removed. Accordingly, the first circuit pattern 151 including the first seed layer 131 and the first plating layer 141 can be formed. Further, the through via hole 115 can be primarily composed of the second seed layer 132 and the first plating layer 141.

  Next, referring to FIG. 9, the third seed layer 133 may be formed on the other side of the base substrate 110.

  The method for forming the third seed layer 133 is not particularly limited, and the third seed layer 133 can be formed by an ordinary method known in the art.

  In the embodiment of the present invention, the third seed layer 133 may be formed by a sputtering method. The first seed layer 131 formed by the sputtering method is for improving adhesion with a circuit pattern to be formed later. Further, by forming the first seed layer 131 by a sputtering method, the adhesion can be improved even with low roughness, which is advantageous for forming a fine pattern.

  The third seed layer 133 can be formed of a conductive material, and can be formed of a material normally used for forming a circuit pattern, such as copper, nickel, or gold.

  In the embodiment of the present invention, the third seed layer 133 is formed under the base substrate 110. However, the step after the formation of the third seed layer 133 can be performed on the inverted base substrate 110 after the base substrate 110 is inverted.

  Further, the third seed layer 133 can be formed simultaneously with the formation of the first seed layer 131. That is, the first seed layer 131 can be simultaneously formed on both sides of the base substrate 110. As described above, when the first seed layer 131 is simultaneously formed on both sides of the base substrate 110, the step of individually forming the third seed layer 133 can be omitted.

  Next, referring to FIG. 10, a second plating resist 220 may be formed on the third seed layer 133.

  The second opening 225 can be patterned in the second plating resist 220. The second opening 225 can be formed such that a region where a circuit pattern is formed and a region where a through via is formed are opened.

  Next, referring to FIG. 11, the second plating layer 142 may be formed.

  The second plating layer 142 can be formed in the second opening 225 of the second plating resist 220. That is, the second plating layer 142 may be formed on the third seed layer 133 exposed through the second opening 225 of the second plating resist 220 and the first plating layer 141 of the through via hole 115.

  The second plating layer 142 can be formed by an electrolytic plating method. The second plating layer 142 can be formed of an electrically conductive material, and can be formed of a material that is normally used for forming a circuit pattern, such as copper, nickel, or gold.

  Next, referring to FIG. 12, the second plating resist (220 in FIG. 11) can be removed. By removing the second plating resist (220 in FIG. 11), a part of the third seed layer 133 can be exposed to the outside.

  Next, referring to FIG. 13, the third seed layer 133 exposed by removing the second plating resist (220 in FIG. 11) can be removed. Thereby, the second circuit pattern 152 including the third seed layer 133 and the second plating layer 142 can be formed.

  In addition, the through via hole 115 may have a thick inner wall by further forming a second plating layer 142 on the first seed layer 132 and the first plating layer 141 that are primarily formed.

  Next, referring to FIG. 14, an insulating layer 160 may be formed.

  The insulating layer 160 can be formed of a composite polymer resin that is generally used as an interlayer insulating material. For example, an epoxy system such as a prepreg, ABF (Ajinomoto Build up Film), FR-4, or BT (Bismaleimide Triazine). It can be made of a photosensitive resin.

  In addition, the insulating layer 160 may be formed of a photosensitive resin including at least one of polyimide, epoxy resin, acrylate resin, BCB (benzocycle), silicone, and PBO (polybenzoxole). Can do.

  In the embodiment of the present invention, the insulating layer 160 may be formed on both sides of the base substrate 110 and inside the through via hole 115. Alternatively, although not shown, the insulating layer 160 may be formed on both sides of the base substrate 110 after the through via hole 115 is filled with an insulating material of a different material. Thus, the through via 153 can be formed by filling the inside of the through via hole 115 with the insulating layer 160 or an insulating material (not shown).

  According to the embodiment of the present invention, the first circuit pattern 151 and the second circuit pattern 152 can be individually formed. At this time, when plating is performed to form the first circuit pattern 151 and the second circuit pattern 152, the inner wall of the through via 153 can also be plated. Thereby, since the inner wall of the through via 153 is plated twice, it can have a thick inner wall. Therefore, the printed circuit board manufacturing method according to the embodiment of the present invention can implement a fine pattern and a through via 153 having a sufficient thickness for power signal transmission.

  As described above, the present invention has been described in detail based on the specific embodiments. However, the present invention is only for explaining the present invention, and the present invention is not limited thereto. It will be apparent to those skilled in the art that modifications and improvements within the technical idea of the present invention are possible.

  All simple variations and modifications of the present invention belong to the scope of the present invention, and the specific scope of protection of the present invention will be apparent from the appended claims.

  The present invention is applicable to printed circuit boards and printed circuit board manufacturing methods.

DESCRIPTION OF SYMBOLS 100 Printed circuit board 110 Base board 115 Through-via hole 120 Insulating film 131 1st seed layer 132 2nd seed layer 133 3rd seed layer 141 1st plating layer 142 2nd plating layer 151 1st circuit pattern (circuit pattern)
152 Second circuit pattern (circuit pattern)
153 Through-hole via hole 160 Insulating layer 210 First plating resist 215 First opening 220 Second plating resist 225 Second opening

Claims (21)

A base substrate;
A through via formed through the base substrate;
A circuit pattern formed on one side and the other side of the base substrate and formed thinner than an inner wall of the through via, and
It said circuit pattern formed on one side of the base substrate including Muga the first plating layer, not including the second plating layer,
The circuit pattern formed on the other side of the base substrate including Muga the second plating layer, not including the first plating layer,
The printed circuit board includes a plating layer formed in a double structure including an inner wall of the through via including a first plating layer and a second plating layer.   The printed circuit board according to claim 1, further comprising an insulating layer formed on the through via and the circuit pattern.   The printed circuit board according to claim 1, wherein an inside of the through via is filled with an insulating material. 2. The circuit pattern formed on one side of the base substrate includes a first seed layer disposed on the base substrate and the first plating layer disposed on the first seed layer. A printed circuit board according to claim 1. The circuit pattern formed on the other side of the base substrate includes a third seed layer disposed on the base substrate and the second plating layer disposed on the third seed layer. A printed circuit board according to claim 1. 2. The inner wall of the through via is configured by a second seed layer disposed on a surface of the through via hole , and the first plating layer and the second plating layer disposed on the second seed layer. A printed circuit board according to claim 1.   The printed circuit board according to claim 1, further comprising an insulating film formed on both sides of the base substrate.   The insulating film includes at least one of polyimide, epoxy resin, acrylate resin, BCB (benzocycle), silicones, PBO (polybenzoxole), and ABF (Ajinomoto Build up). The printed circuit board according to claim 7. Providing a base substrate;
Forming a through via hole in the base substrate;
Forming a first circuit pattern by forming a first plating layer on one side of the base substrate and the inner wall of the through via hole;
Forming a second circuit pattern and a through via by forming a second plating layer on the other side of the base substrate and the first plating layer of the through via hole. Forming the first circuit pattern comprises:
Forming a first seed layer on one side of the base substrate;
Forming a second seed layer on the inner wall of the through via hole;
Forming a first plating resist having a first opening formed on the first seed layer;
Forming a first plating layer on an inner wall of the first opening and the through via hole;
The method for manufacturing a printed circuit board according to claim 9, further comprising: removing the first plating resist.   The method of claim 10, wherein the first seed layer is formed by a sputtering method.   The method of manufacturing a printed circuit board according to claim 10, wherein the second seed layer is formed by an electroless plating method.   The method of manufacturing a printed circuit board according to claim 10, wherein the first plating layer is formed by an electrolytic plating method. Forming the second circuit pattern comprises:
Forming a third seed layer on the other side of the base substrate;
Forming a second plating resist having a second opening formed on the third seed layer;
Forming a second plating layer on the second opening and the first plating layer of the through via hole;
The method for manufacturing a printed circuit board according to claim 9, further comprising: removing the second plating resist.   The method of claim 14, wherein the third seed layer is formed by a sputtering method.   The method of manufacturing a printed circuit board according to claim 14, wherein the second plating layer is formed by an electrolytic plating method.   The method of manufacturing a printed circuit board according to claim 9, wherein an inner wall of the through via hole is formed thicker than the first circuit pattern and the second circuit pattern.   The method of manufacturing a printed circuit board according to claim 9, further comprising forming an insulating layer on the first circuit pattern and the second circuit pattern.   The method of manufacturing a printed circuit board according to claim 9, wherein the inside of the through via is filled with an insulating material.   The method of manufacturing a printed circuit board according to claim 9, further comprising forming an insulating film on both sides of the base substrate in providing the base substrate.   The insulating film includes at least one of polyimide, epoxy resin, acrylate resin, BCB (benzocycle), silicones, PBO (polybenzoxole), and ABF (Ajinomoto Build up). The method for manufacturing a printed circuit board according to claim 20.

Images