JP2013235940A - ウェーハの加工方法 - Google Patents
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/782—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element
- H01L21/784—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element the substrate being a semiconductor body
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
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- B—PERFORMING OPERATIONS; TRANSPORTING
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Abstract
【解決手段】デバイス領域(602)とデバイス領域(602)の周囲の外周余剰領域(603)とが設けられたウェーハ(W)の表面に対し、外周領域にリング状粘着層(612)が設けられたリング粘着テープ(611)を貼着する。リング粘着テープ(611)の外周領域がウェーハ(W)の外周余剰領域(603)に位置付けられることで、リング状粘着層(612)がデバイス領域(602)に付着されることがない。ウェーハ(W)内部への改質層形成後にリング粘着テープ(611)を剥離する際に、リング状粘着層(612)の粘着力によってデバイス領域(602)が破損することを防止する。
【選択図】図1
Description
102 チャックテーブル(保持テーブル)
103 研削ユニット(研削手段)
200 レーザ加工装置
202 チャックテーブル(保持テーブル)
203 レーザ加工ユニット
300 拡張装置
301 基台
302 環状テーブル
303 拡張ドラム
400 ブレーキング装置
402 環状テーブル
403 押圧刃
405 支持刃
500 ピックアップコレット
601 デバイス
602 デバイス領域
603 外周余剰領域
611 リング粘着テープ
612 リング状粘着層
641 改質層
651 保護テープ
661 デバイスチップ
671 支持基板
W ウェーハ
W1 表面
W2 裏面
Claims (3)
- 複数の分割予定ラインにより区画された領域に複数のデバイスが形成されたデバイス領域と前記デバイス領域を囲繞する外周余剰領域とから表面が構成されるウェーハを加工するウェーハの加工方法であって、
外周領域のみにリング状粘着層を有しウェーハの表面全面を覆うリング粘着テープをウェーハ表面の前記外周余剰領域に前記リング状粘着層を位置付けて、ウェーハの表面に前記リング粘着テープを貼着するテープ貼着工程と、
前記テープ貼着工程の後に、前記リング粘着テープ側を保持テーブルに保持して、ウェーハの裏面からウェーハに対して透過性を有する波長のレーザビームを前記分割予定ラインに沿って照射して、前記分割予定ラインに沿ってウェーハ内部に改質層を形成する改質層形成工程と、
前記改質層形成工程の後に、ウェーハの裏面側に保護テープを貼着するとともに前記ウェーハ表面から前記リング粘着テープを剥離するリング粘着テープ剥離工程と、
前記リング粘着テープ剥離工程の後に、ウェーハに外力を付与して前記改質層を起点にウェーハを前記分割予定ラインに沿って個々のデバイスに分割する分割工程と、
から構成されるウェーハの加工方法。 - 前記テープ貼着工程の後で前記改質層形成工程の前に、前記リング粘着テープ側を保持テーブルに保持して、研削手段によりウェーハ裏面を研削し、研磨手段によりウェーハ裏面を研磨する研削研磨工程を含む、請求項1記載のウェーハの加工方法。
- 前記リング粘着テープ剥離工程における前記保護テープはエキスパンド性を有する部材で形成されており、
前記分割工程の後に、前記保護テープを拡張して隣接する前記デバイスの間隔を拡張するエキスパンド工程を含む、請求項1又は2記載のウェーハの加工方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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JP2012106940A JP5770677B2 (ja) | 2012-05-08 | 2012-05-08 | ウェーハの加工方法 |
US13/870,490 US8815644B2 (en) | 2012-05-08 | 2013-04-25 | Wafer processing method |
DE102013208352A DE102013208352A1 (de) | 2012-05-08 | 2013-05-07 | Waferbearbeitungsverfahren |
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JP2012106940A JP5770677B2 (ja) | 2012-05-08 | 2012-05-08 | ウェーハの加工方法 |
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JP2013235940A true JP2013235940A (ja) | 2013-11-21 |
JP5770677B2 JP5770677B2 (ja) | 2015-08-26 |
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JP2012106940A Active JP5770677B2 (ja) | 2012-05-08 | 2012-05-08 | ウェーハの加工方法 |
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US (1) | US8815644B2 (ja) |
JP (1) | JP5770677B2 (ja) |
DE (1) | DE102013208352A1 (ja) |
Cited By (10)
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JP2014165233A (ja) * | 2013-02-22 | 2014-09-08 | Disco Abrasive Syst Ltd | 積層ウェーハの加工方法および粘着シート |
JP2015228475A (ja) * | 2014-06-03 | 2015-12-17 | 株式会社ディスコ | ウェーハの加工方法 |
JP2016174146A (ja) * | 2015-03-16 | 2016-09-29 | 株式会社ディスコ | ウェハを分割する方法 |
JP2017050536A (ja) * | 2015-08-31 | 2017-03-09 | 株式会社ディスコ | ウェハを処理する方法 |
CN108074805A (zh) * | 2016-11-11 | 2018-05-25 | 株式会社迪思科 | 晶片的加工方法 |
JP2018122596A (ja) * | 2018-02-28 | 2018-08-09 | 三星ダイヤモンド工業株式会社 | パターニング基板のブレイク方法並びにブレイク装置 |
JP2019034330A (ja) * | 2017-08-21 | 2019-03-07 | 株式会社ディスコ | チップの製造方法 |
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JP2019212780A (ja) * | 2018-06-06 | 2019-12-12 | 株式会社ディスコ | テープ貼着装置 |
JP2021118260A (ja) * | 2020-01-27 | 2021-08-10 | 株式会社ディスコ | 被加工物の分割方法 |
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JP5926632B2 (ja) * | 2012-06-28 | 2016-05-25 | 株式会社ディスコ | 半導体チップの樹脂封止方法 |
US9346671B2 (en) * | 2014-02-04 | 2016-05-24 | Freescale Semiconductor, Inc. | Shielding MEMS structures during wafer dicing |
JP6360411B2 (ja) * | 2014-10-09 | 2018-07-18 | 株式会社ディスコ | ウエーハの加工方法 |
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- 2013-05-07 DE DE102013208352A patent/DE102013208352A1/de active Pending
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Also Published As
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US20130302969A1 (en) | 2013-11-14 |
US8815644B2 (en) | 2014-08-26 |
DE102013208352A1 (de) | 2013-11-14 |
JP5770677B2 (ja) | 2015-08-26 |
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