JP2013004794A - Pickup device of semiconductor chip, pickup method, die bonding device, die bonding method and method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve reliability of pickup processing of a semiconductor chip.SOLUTION: A pickup method related to this invention includes: creating map data including arrangement data of a plurality of semiconductor chips formed in predetermined arrangement on a wafer held by a holding jig and separated into individual pieces and quality data indicating quality of individual semiconductor chips; recognizing two or more target dies arranged on the wafer and at least one reference chip 18 arranged between two target dies among the plurality of semiconductor chips; identifying position coordinates of the plurality of semiconductor chips in the semiconductor coordinate system; performing pickup processing of the semiconductor chips other than the reference chip 18 on the basis of the map data by using the identified position coordinates of the semiconductor chips; and performing pickup processing of the reference chip after the completion of the pickup processing of the semiconductor chips other than the reference chip 18.

Description

  The present invention relates to a semiconductor chip pickup apparatus, a pickup method, a die bonding apparatus, a die bonding method, and a semiconductor device manufacturing method.

  In the manufacturing process of a semiconductor device, a semiconductor chip (hereinafter referred to as a chip) is cut out from a wafer on which a plurality of chips are formed. Chip cutting is performed in a state where a wafer is attached to a sheet which is a chip holding jig. The cut chip is pushed up from below, peeled off from the sheet, and picked up.

  Prior to this pick-up process, a chip quality inspection is performed. In recent years, in order to reduce the manufacturing cost of semiconductor devices, defective marking for identifying defective chips in a wafer has been abolished, and unmarked wafers in which good / bad determination of chips is performed based on map data have become mainstream. The map data includes pass / fail data indicating pass / fail of each chip and array data indicating the position of the chip on the wafer.

  Of the chips obtained by dicing and dividing the wafer, only good products are picked up and mounted on the substrate in a die bonding process. In the chip pick-up process, in order to identify a good chip based on the map data, it is necessary to accurately grasp the position coordinates of the chip in the wafer.

  Patent Documents 1 and 2 describe a technique for picking up chips held in a predetermined arrangement by a chip holding jig.

  In Patent Document 1, in order to specify the position of a chip on a wafer in the coordinate system of the pickup apparatus, the position coordinates corresponding to the first reference chip that is referred to first is manually taught, and the first reference chip The subsequent second and third reference chips are obtained by automatic detection by image recognition based on the position coordinates, the chip arrangement data, and the reference chip position in the arrangement data. For this reason, it is not necessary to make a special chip exclusively for position reference in the wafer.

  In Patent Document 2, when the number of chips formed in two adjacent rows is different and a step is generated in the chip arrangement, the deviation between the position calculated based on the map data at the time of a line break and the actual chip position is reduced. In order to change the pickup order. In a long array row, jump over the chip from the end of the long array in the reverse order without jumping from chip to end corresponding to the chip at the end of the short array row adjacent to it. By picking up, the moving distance at the time of line feed is reduced.

JP 2006-332417 A JP 2010-212358 A

  Normally, three or more special chips for position reference, called target dies, are provided in the wafer. By recognizing the target die, the actual position of the chip on the wafer in the coordinate system of the pickup device is specified. Based on this identified position, a pickup process is executed using the map data.

  In general, before the pick-up process is performed, an expanding process is performed in which a sheet as a chip holding jig is stretched to form a gap between the chips. Thereby, at the time of pick-up, a positional deviation occurs between the position calculated based on the map data and the actual chip position. For this reason, there is a case where a non-defective chip that must be picked up is mistakenly picked up as a defective chip, that is, a so-called left-over problem occurs. Moreover, contrary to the leftover, there is a possibility that a problem of picking up defective chips that do not need to be picked up may occur.

  In order to correct this positional deviation, a chip existing during the movement for recognizing the target die is recognized as a reference chip for position correction, and position correction is performed. However, when the pick-up process is executed halfway and the re-pickup process of the collected wafer is performed, since the chip has already been picked up, there is no chip in the middle of movement, and the position cannot be corrected. For this reason, the exact coordinates of the chip on the wafer cannot be recognized, and there is a concern about the positional deviation of the chip that starts the pickup process.

  Japanese Patent Application Laid-Open No. 2004-228561 describes that when there is a step in the chip arrangement, the positions of a plurality of chips that have jumped over without being picked up are recognized and the position data of each chip is corrected. However, Patent Document 2 does not describe the realignment of the wafer collected during the pickup process although the chip position data during the continuous pickup operation is corrected. Therefore, even in Patent Document 2, when the chip position on the wafer that has been picked up halfway is specified using the target die again, the position cannot be corrected because no chip exists during the movement.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The pickup device according to the first aspect of the present invention includes two or more target dies provided on a wafer held by a holding jig, and a plurality of target dies formed in a predetermined arrangement on the wafer and separated into individual pieces. Among the semiconductor chips, using a recognition unit that recognizes at least one reference chip disposed between the two target dies, and using the two or more target dies and the reference chip recognized by the recognition unit, Based on map data including a correction unit that specifies position coordinates of the plurality of semiconductor chips in the apparatus coordinate system, pass / fail data indicating pass / fail of each semiconductor chip, and array data indicating an array of individual semiconductor chips in the wafer, Using the position coordinates of the semiconductor chip specified by the correction unit, pick-up of the semiconductor chip other than the reference chip is performed. After the treatments pickup process of the semiconductor chip other than the reference chip is completed, in which and a pickup unit for executing pickup processing of the reference chip.

  The pick-up method according to the second aspect of the present invention provides an array data of a plurality of semiconductor chips formed in a predetermined array on a wafer held by a holding jig and separated into individual pieces, and pass / fail indicating each semiconductor chip pass / fail. Map data including data is generated, and at least one reference chip arranged between the two target dies is recognized among two or more target dies provided on the wafer and the plurality of semiconductor chips. Then, using the recognized two or more target dies and the reference chip, the position coordinates of the plurality of semiconductor chips in an apparatus coordinate system are specified, and the position coordinates of the specified semiconductor chips are used, Based on the map data, the semiconductor chip other than the reference chip is picked up, and the semiconductor chip other than the reference chip After the pick-up process is completed, it executes the pickup process of the reference chip.

  A die bonding apparatus according to a third aspect of the present invention transports a semiconductor device picked up by the above-described pickup device onto a substrate, and die-bonds the semiconductor chip onto the substrate.

  In a die bonding method according to a fourth aspect of the present invention, a semiconductor chip picked up by the pickup method described above is transferred onto a substrate, and the semiconductor chip is die bonded to the substrate.

  A method of manufacturing a semiconductor device according to a fifth aspect of the present invention creates map data including array data of a plurality of semiconductor chips formed in a predetermined array on a wafer and pass / fail data indicating pass / fail of each semiconductor chip. The wafer is held by a holding jig, and the wafer is divided into individual semiconductor chips while being held by the holding jig, and two or more target dies provided on the wafer, and the semiconductor Recognizing at least one reference chip disposed between the two target dies among the chips, and using the two or more recognized target dies and the reference chip, the plurality of semiconductor chips in the apparatus coordinate system A position coordinate is specified, and the semiconductor chip other than the reference chip is used based on the map data using the specified position coordinate of the semiconductor chip. It performs the pickup process, after the pick-up process of the semiconductor chip other than the reference chip is completed, executes the pickup process of the reference chip.

  According to the present invention, the pick-up process for the semiconductor chip other than the reference chip is performed, and the pick-up process for the reference chip is executed after the pick-up process for the semiconductor chip other than the reference chip is completed. For this reason, even when picking up a wafer in the middle of processing is resumed, the target die can be accurately recognized using the reference chip remaining on the wafer, and the position coordinates of the semiconductor chip can be specified. Thereby, the coordinate shift of the semiconductor chip of the pick-up process can be reduced, and the reliability of the pick-up process can be improved.

  According to the present invention, it is possible to reduce erroneous pickup when picking up a semiconductor chip from a wafer and improve the reliability of pickup processing.

It is a figure explaining the state by which the wafer in which the several semiconductor chip was formed was hold | maintained at the holding jig. It is a figure which shows an example of map data. 1 is a diagram showing a configuration of a semiconductor device manufacturing system according to a first embodiment. 1 is a diagram illustrating a configuration of a die bonding apparatus using a semiconductor chip pickup device according to a first embodiment. It is a figure which shows the example of arrangement | positioning of the target die on a semiconductor wafer. It is a figure for demonstrating the expansion process in the die-bonding apparatus which concerns on Embodiment 1. FIG. 6 is a cross-sectional view showing an example of a mounting structure of a semiconductor device manufactured by the manufacturing method according to Embodiment 1. FIG. It is a figure for demonstrating the problem at the time of picking up a semiconductor chip. 6 is a diagram for explaining a semiconductor chip pickup method according to the first embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to the first embodiment; FIG. It is a figure which shows an example of the quality data of the semiconductor chip contained in map data. It is a figure for demonstrating the problem at the time of picking up a semiconductor chip. It is a figure for demonstrating the problem at the time of picking up a semiconductor chip. 6 is a diagram for explaining a semiconductor chip pickup method according to the first embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to the first embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to the first embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to the first embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to the first embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to a second embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to a second embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to a second embodiment; FIG. 6 is a diagram for explaining a semiconductor chip pickup method according to a second embodiment; FIG.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description will be omitted. In addition, the following description will be divided into a plurality of embodiments, but unless otherwise specified, they are not irrelevant to each other, and one is a modification, details, and supplements of a part or all of the other. There is a relationship such as explanation.

  Also, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), particularly when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and it may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including element steps) are not necessarily indispensable unless otherwise specified and clearly considered essential in principle. Needless to say.

Embodiment 1 FIG.
Embodiment 1 of the present invention will be described with reference to the drawings. First, the configuration of a wafer on which a plurality of semiconductor chips to be picked up are formed will be described with reference to FIG. FIG. 1 is a view showing a state in which a wafer 1 is held by a holding jig.

  As shown in FIG. 1, a plurality of semiconductor chips 2 are formed in a matrix on a wafer 1. In FIG. 1, an array extending in the left-right direction is referred to as a row, and an array extending in the up-down direction is referred to as a column. The same applies to the following drawings and description. In the example shown in FIG. 1, the number of semiconductor chips 2 formed in the first and second rows from the bottom and the first and second rows from the top is reduced due to restrictions due to the shape of the wafer 1. The wafer 1 is divided into individual semiconductor chips 2 by dicing.

  In the present embodiment, no mark indicating the non-defective chip / defective chip determined by the pass / fail inspection performed in the previous stage is attached to the semiconductor chip 2. That is, the wafer 1 is a non-marking wafer. Thereby, the process for marking for defective chip identification can be reduced, and the manufacturing cost of the semiconductor device can be reduced.

  In the present embodiment, the holding jig for holding the wafer 1 includes a sheet 3 and a ring 4. The wafer 1 is attached to the ring 4 by the sheet 3. The sheet 3 is provided with an adhesive layer, and the individual semiconductor chips 2 are stuck and held on the sheet 3 by the adhesive layer. The ring 4 is provided on the outer periphery of the seat 3. That is, the ring 4 is disposed so as to surround the region of the sheet 3 where the wafer 1 is attached. Further, as will be described later, by extending the sheet 3, gaps can be formed between the individual semiconductor chips 2 to facilitate the pick-up process.

  A wafer ID 5 is provided at the end of the wafer 1. A bar code 6 is provided on the ring 4. The wafer ID 5 and the barcode 6 are used to search for map data including arrangement data of the semiconductor chips 2 on the wafer 1 and pass / fail data indicating pass / fail of each semiconductor chip 2. The wafer ID 5 and the barcode 6 are stored in association with each other. As a result, even when the wafer ID 5 cannot be read due to dicing, the map data corresponding to the wafer 1 can be searched by reading the bar code 6 of the ring 4.

  As described above, since the mark indicating the non-defective chip / defective chip is not attached to the semiconductor chip 2, the pick-up process is executed while confirming the position of the semiconductor chip 2 to be picked up using the map data during the pick-up process. The FIG. 2 shows an example of map data. As shown in FIG. 2, the map data includes arrangement data of the semiconductor chips 2 on the wafer 1, that is, position coordinates of the semiconductor chips 2. The map data also includes data indicating the state of the space of the wafer 1 and the like. In the example shown in FIG. 2, “FF” indicates the outside of the wafer area, “11” indicates a defective chip, and “00” indicates a non-defective chip.

  FIG. 3 shows a semiconductor device manufacturing system that employs a pickup device that picks up the semiconductor chip 2 not marked with a pass / fail test result using map data as shown in FIG. It is. In FIG. 3, the example provided with the die bonding apparatus 15 which performs a die bonding process among the manufacturing processes of a semiconductor device is shown.

  As shown in FIG. 3, the manufacturing system according to the present embodiment includes a server 13, a wafer mount device 14, and a die bonding device 15. In the previous process, each semiconductor chip 2 on the wafer 1 is inspected, and the non-defective / defective product of each semiconductor chip 2 is determined. The server 13 stores pass / fail data indicating pass / fail of each semiconductor chip 2 performed in the previous process and map data including the array data of the semiconductor chips 2. The map data is stored in the server 13 for each wafer 1 and is identified by the wafer ID 5 printed on the wafer 1. That is, the server 13 is a storage unit that stores the map data in association with the wafer ID 5 that is the identification information of the wafer 1.

  The wafer mount device 14 attaches the wafer 1 on which the semiconductor chip 2 is formed to the ring 4 using the sheet 3. The wafer 1 is divided into individual wafers 1 by a dicing apparatus (not shown) in a state of being attached to the sheet 3.

  Further, the wafer mount device 14 associates the wafer ID 5 on the wafer 1 and the barcode 6 on the ring 4 and transmits them to the server 13. Thus, even if the wafer ID 5 cannot be read by dicing, the map data corresponding to the wafer 1 can be retrieved by reading the barcode 6 provided on the ring 4. The die bonding apparatus 15 picks up each divided semiconductor chip 2 and mounts it on the substrate.

  Here, a method for manufacturing the semiconductor device according to the present embodiment will be described. In the manufacturing system shown in FIG. 3, first, map data in units of lots transmitted from the previous process is stored in the server 13. Although not shown here, a processing device for processing map data may be separately provided in accordance with a case where lots are divided or lots are integrated.

  On the other hand, the wafer 1 is transferred to the wafer mount device 14 from the previous process. The wafer mount device 14 reads the wafer ID 5 printed on the wafer 1 and confirms with the server 13 whether or not there is map data corresponding to the read wafer ID 5. Further, the wafer mount device 14 creates a barcode 6 from the read wafer ID 5. The barcode 6 is stored in the server 13 in association with the wafer ID 5.

  Further, the wafer mounting device 14 attaches the wafer 1 to the ring 4 using the sheet 3 and attaches the created barcode 6 to the ring 4. The wafer 1 is sent to a dicing apparatus (not shown) together with the holding jig including the ring 4 and the sheet 3.

  In the dicing apparatus, dicing of the wafer 1 attached to the holding jig is performed. Thereafter, the diced wafer 1 attached to the holding jig is conveyed to a die bonding apparatus 15 having a pickup device. The die bonding apparatus 15 reads the wafer ID 5 by reading the barcode 6, transmits the wafer ID 5 to the server 13, and requests map data corresponding to the wafer ID 5.

  The server 13 transmits map data corresponding to the sent wafer ID 5 to the die bonding apparatus 15. Based on the map data sent from the server 13, the die bonding apparatus 15 performs pick-up processing for only non-defective chips among the semiconductor chips 2.

  Here, a detailed configuration of the die bonding apparatus 15 will be described with reference to FIG. FIG. 4 is a diagram showing a schematic configuration of the die bonding apparatus 15 including the pickup device for the semiconductor chip 2 according to the present embodiment. As shown in FIG. 4, the die bonding apparatus 15 includes a recognition camera 7, a pickup unit 8, and a correction unit 9.

  The recognition camera 7 recognizes an image of a target die and a reference chip formed in the semiconductor chip 2 formed on the wafer 1. The target die and the reference chip are used for specifying the position coordinates of each semiconductor chip 2 in the apparatus coordinate system of the die bonding apparatus 15. FIG. 5 shows an example of the arrangement of target dies on the wafer 1.

  In the example shown in FIG. 5, three target dies 16a, 16b, and 16c are provided. The target die is a characteristic pattern formed on the wafer 1 and is formed in the manufacturing process of the semiconductor chip 2. These three target dies 16 a, 16 b and 16 c are arranged in the vicinity of the outer periphery of the wafer 1. The target dies 16a and 16b are respectively arranged at both ends of the same row. The target dies 16b and 16c are disposed at both ends of the same row.

  The target die is not limited to this, and it is also possible to search for a semiconductor chip 2 that can be unique to other semiconductor chips 2 and set it as the target die. As the unique semiconductor chip 2, for example, a chip that is not shot for opening the pad can be used.

  In the present embodiment, in the same column as the target dies 16a and 16b, these two target dies are arranged in the same row as the five semiconductor chips 2 and the target dies 16b and 16c arranged between the two target dies. Six semiconductor chips 2 arranged between them are used as reference chips.

  The die bonding apparatus 15 reads the bar code 6 of the ring 4 to which the wafer 1 is attached, and reads map data corresponding to the wafer 1 existing on the server 13. Then, as will be described later, the die bonding apparatus 15 specifies position coordinates of the plurality of semiconductor chips 2 in the apparatus coordinate system, and performs a pickup process based on the map data read using the position coordinates.

  The die bonding apparatus 15 further includes an expander 12 that stretches the sheet 3 to form a gap between the semiconductor chips 2 in order to perform a stable pickup process. With reference to FIG. 6, an expansion process for extending the sheet 3 by the expander 12 will be described. As shown in FIG. 6, the die bonding apparatus 15 further includes a push-up unit 10, a push-up pin 11, an expander 12, and a support base 17.

  The sheet 3 to which the wafer 1 is attached is placed on the support base 17. The back side of the surface of the sheet 3 to which the semiconductor chip 2 is attached contacts the support base 17. In this state, the sheet 3 can be stretched by pushing down the ring 4 provided on the outer peripheral portion of the sheet 3 by the expander 12 below the surface of the support 17 that contacts the sheet 3. Thereby, a gap can be formed between the individual semiconductor chips 2.

  The push-up unit 10 having the suction function moves to the back side of the semiconductor chip 2 to be picked up. The push-up pin 11 pushes up the back surface side of the semiconductor chip 2 through the sheet 3. Thereby, the semiconductor chip 2 can be reliably picked up by the pickup unit 8.

  As shown in FIG. 4, the semiconductor chip 2 picked up by the pickup unit 8 is transferred onto the substrate 30 and die bonded to the substrate 30. Here, an example of a semiconductor device manufactured by the manufacturing method according to the present embodiment will be described with reference to FIG. FIG. 7 is a cross-sectional view showing an example of a mounting structure of a semiconductor device to be manufactured.

  As shown in FIG. 7, the semiconductor chip 2 is mounted on a substrate 30 using a mount material 31. Bumps 32 are formed on the back side of the surface of the substrate 30 on which the semiconductor chip 2 is mounted. The bump 32 is used when a semiconductor device on which the semiconductor chip 2 is mounted is mounted on an electronic device. An electrode 33 connected to a part of the bump 32 is formed on the substrate 30. The semiconductor chip 2 and the electrode 33 are connected via a bonding wire 34. The semiconductor chip 2, the mount material 31, and the bonding wire 34 are sealed with a resin 35.

  Here, with reference to FIGS. 8 to 16, a method of picking up the semiconductor chip 2 from the wafer 1 after dicing in the die bonding process which is a part of the manufacturing process of the semiconductor device will be described in detail. 8, 12 and 13 are diagrams for explaining problems in picking up a semiconductor chip. 9, 10, and 14 to 18 are diagrams for explaining the semiconductor chip pickup method according to the first embodiment. FIG. 11 is a diagram illustrating an example of map data transmitted to the die bonding apparatus 15.

  In the die bonding process, it is necessary to pick up only non-defective chips among the semiconductor chips 2 in the unmarked wafer, so it is necessary to grasp the coordinates of the semiconductor chips 2 in the wafer 1 corresponding to the map data. However, in actuality, there is a possibility that the coordinates may be deviated from the theoretical value due to the θ deviation when the wafer 1 is supplied to the die bonding apparatus 15 or the gap between the semiconductor chips 2 due to the expansion process.

  Therefore, the position coordinates of the semiconductor chip 2 in the coordinate system of the die bonding apparatus 15 are identified by recognizing three characteristic target dies (16a, 16b, 16c) formed on the wafer 1 shown in FIG. Do.

  First, the first target die 16a is recognized after the wafer is loaded, and thereafter, the target die 16b is recognized by moving linearly to the second target die 16b formed in the same row as the target die 16a. Thereafter, the target die 16c is recognized by moving linearly to the third target die 16c formed in the same row as the target die 16b.

  In this way, the actual movement amount in the die bonding apparatus 15 can be obtained by recognizing it by moving between the three target dies 16a, 16b, and 16c. Using this amount of movement, the coordinates of the semiconductor chip 2 to be picked up are corrected, and the exact position coordinates of the semiconductor chip 2 in the coordinate system of the die bonding apparatus 15 are specified. This specified position coordinate becomes the pickup position of the semiconductor chip 2.

  At this time, when the θ shift is large as shown in FIG. 8, when moving from the first target die 16a to the second target die 16b, the next target die 16b may not be recognized. . In this embodiment, when specifying the position coordinates of the semiconductor chip 2 using the target die, the position coordinates are corrected using the normal semiconductor chip 2 formed between the target dies as a reference chip.

  Here, an example of the position coordinate correction operation in the pickup method according to the first embodiment will be described with reference to FIG. As shown in FIG. 9, in order to accurately search the target dies 16a and 16b, the semiconductor chip 2 existing in the middle of movement is recognized from the target die 16a and moved to the target die 16b while performing position correction. . The semiconductor chip 2 used for position correction during movement is referred to as a reference chip 18.

  In the example shown in FIG. 9, all of the five reference chips 18 between the target dies 16a and 16b are recognized by the recognition camera 7, and position correction is executed. As a result, the position coordinates of the semiconductor chip 2 to be picked up in the coordinate system of the die bonding apparatus 15 can be specified more accurately. It is not necessary to recognize all the semiconductor chips 2 between the target dies. For example, every other semiconductor chip 2 may be recognized.

  As described above, the target dies 16 a, 16 b, and 16 c are disposed in the vicinity of the outer periphery of the wafer 1. For this reason, the moving distance on the wafer 1 can be increased, and the number of reference chips arranged between two target dies can be increased. As a result, the position coordinates of the semiconductor chip 2 can be corrected more accurately.

  In the present embodiment, the target dies 16a and 16b are respectively disposed at both ends of the same column, and the target dies 16b and 16c are respectively disposed at both ends of the same row. This makes it possible to accurately correct the position coordinates of the semiconductor chip 2 on the wafer 1 in the row direction and the column direction.

  When the recognition of the target dies 16a, 16b, and 16c is completed, the target die 16a, 16b, and 16c are moved to coordinates that are designated based on the map data shown in FIG. In the example shown in FIG. 10, pick-up processing is sequentially performed from the leftmost semiconductor chip 2 to the right end of the first row.

  Further, the pickup unit 8 moves from the right end of the first row to the right end of the second row in order to reduce the moving distance at the time of line feed. In the second line, pick-up processing is sequentially executed from the left end to the right end. As described above, it is possible to suppress positional deviation due to movement by reducing the movement distance at the time of line feed. The pickup order is not limited to this.

  In the manufacturing system of FIG. 3, when map data is requested from the die bonding apparatus 15 to the server 13, the data transmitted from the server 13 includes the coordinates (X, Y) of the semiconductor chip 2 to be picked up and the number of effective columns. (X number), valid row number (Y number), and pass / fail data. For example, the data transmitted from the server 13 when the first line is read from the left end to the right end is as shown in FIG. As shown in FIG. 11, data are transmitted in the order of (8, 8) from the position (0, 8) shown in FIG.

  At this time, if the pass / fail data is “00” indicating that the semiconductor chip 2 is a non-defective chip, the semiconductor chip 2 is picked up, and if the pass / fail data is “11” indicating that it is a defective chip, no pick-up is performed. Therefore, the defective chip is left on the sheet 3, and the next non-defective chip is picked up in the pickup order. Therefore, when the semiconductor chip 2 is picked up partway through the wafer 1, target dies 16a, 16b, 16c, defective chips and still pick-up processing are still being performed on the wafer 1, as shown in FIG. No semiconductor chip 2 is left.

  When non-defective chips remain on the wafer 1 when die bonding in a predetermined assembly lot is completed and switched to another product, the wafer 1 is removed from the die bonding apparatus 15 and stored together with the holding jig. When the pick-up process is interrupted and the pick-up process of the wafer 1 in the process of being removed from the die bonding apparatus 15 is resumed, the position coordinates of the semiconductor chip 2 in the apparatus coordinate system are specified using the target die again. There is a need to.

  However, as shown in FIG. 13, if a non-defective semiconductor chip 2 existing while moving from the target die 16a toward the target die 16b has already been picked up, the positional coordinate deviation cannot be corrected, There is a problem that the target die 16b cannot be recognized. Therefore, in the pickup method according to the present embodiment, the position coordinates of the semiconductor chip 2 in the apparatus coordinate system can be accurately specified even for the wafer 1 that has been picked up halfway.

  14 to 18, a dot-hatched chip is referred to as a reference chip 18, a cross-hatched chip is referred to as a defective chip 19, and a non-hatched chip is referred to as a non-defective chip 20. First, after specifying the position coordinates of the semiconductor chip 2 in the apparatus coordinate system as described above, pickup is sequentially performed from the left end of the first row as shown in FIG. At this time, as shown in FIG. 15, the defective chip 19 jumps over without performing the pick-up process, and the pick-up process for only the non-defective chip 20 is performed. After the pickup processing for the first row is completed, the semiconductor chip 2 is picked up from the right end after moving to the second row.

  Further, as shown in FIG. 16, the reference chip 18 existing between the target dies is not limited to a defective chip, and even if it is determined to be a non-defective chip, the sheet is not picked up. Leave on top of 3. That is, in the case of the reference chip 18, the pick-up process is skipped without performing the pick-up process, and the pick-up process of the next non-defective chip 20 is performed. That is, when the non-defective chip 20 other than the reference chip 18 remains on the wafer 1, the reference chip 18 is not picked up.

  In the die bonding apparatus 15, the coordinates (X, Y) of the target dies 16a, 16b, and 16c and the coordinates of the reference chip 18 existing between them are stored in order to skip the pick-up process of the reference chip 18. . When the semiconductor chip 2 to be picked up coincides with the coordinates of the reference chip 18, the order is skipped and the picking up process of the next good chip 20 is executed.

  Of the reference chips 18 existing between the target dies 16a, 16b, and 16c, a normal good chip that is not the reference chip 18 is used in the die bonding apparatus 15 or the server 13 so that the pick-up processing is not performed for the good chips. The map data may be corrected so as to be distinguished from 20. The corrected map data is data that can distinguish a non-defective chip existing between the target dies 16a, 16b, and 16c from other non-defective chips. Therefore, the corrected map data includes data of the target dies 16a, 16b, and 16c, the defective chip 19, the non-defective chip 20, and the non-defective chips existing between the target dies.

  With reference to FIG. 17, a case will be described in which the pick-up process is performed again on the wafer 1 in the middle of the process in which the non-defective chip 20 remains without executing the pick-up process in the last row. In this case, it is necessary to specify the position coordinates of the semiconductor chip 2 in the apparatus coordinate system again. Therefore, first, the recognition camera 7 recognizes the image of the target die 16a, and then moves linearly to the second target die 16b formed in the same row as the target die 16a to recognize the target die 16b. To do.

  With respect to the non-defective chips existing between the target dies, even if the order of picking up comes in the normal operation, the order is skipped without performing picking up processing. Therefore, the reference chip 18 remains on the wafer 1. Accordingly, the reference chip 18 in the middle of moving from the target die 16a toward the target die 16b is image-recognized by the recognition camera 7, and the position coordinates of the semiconductor chip 2 are corrected.

  Thereafter, the target die 16b is linearly moved from the target die 16b to the third target die 16c formed in the same row to recognize the target die 16c. During this movement, the reference chip 18 between the target die 16b and the target die 16c is image-recognized by the recognition camera 7, and the position coordinates of the semiconductor chip 2 are corrected.

  After specifying the position coordinates, the first semiconductor chip 2 in the re-pickup process is moved. In the example illustrated in FIG. 17, the pickup moves to the semiconductor chip 2 at the left end of the last row, and sequentially performs a pickup process toward the right end. Thus, in the present embodiment, the position coordinates of the semiconductor chip 2 in the apparatus coordinate system can be accurately specified even for the wafer 1 that has been picked up halfway. For this reason, the pickup process can be executed more accurately, and the reliability can be improved.

  When the pickup of the normal good chip 20 that is not the reference chip 18 is completed, only the target dies 16a, 16b, 16c, the reference chip 18, and the defective chip 19 are left on the wafer 1. After the normal pick-up process of the non-defective chip 20 is completed, the die bonding apparatus 15 automatically sets the operation so as to execute the pick-up process of the non-defective chip existing between the target dies. And it moves to the non-defective chip in the reference chip 18 closest to the non-defective chip 20 picked up last. As a result, the moving distance can be shortened and the positional deviation can be reduced.

  In the example shown in FIG. 18, when the pickup of the non-defective chip 20 at the right end of the last row is completed, the reference chip 18 is moved to the reference chip 18 on the first line in the same column as the non-defective chip 20. Then, pick-up processing is sequentially performed to the left from the reference chip 18, that is, in a direction from the target die 16c to the target die 16b.

  After the pick-up process of the reference chip 18 adjacent to the right of the target die 16b is completed, the reference chip 18 is moved to the adjacent reference chip 18 on one row of the target die 16b. Pickup processing is performed sequentially from the reference chip 18 in the direction from the target die 16b to the target die 16a. At this time, if the reference chip 18 is a good chip, it is picked up, and if it is a defective chip, it is not picked up. Note that the above-described embodiment is an example, and the order of pickup is not limited to the above description.

  As described above, according to the present embodiment, the target die is accurately recognized even when the wafer 1 being processed is set again in the die bonding apparatus 15 and the position of the semiconductor chip 2 in the apparatus coordinate system is specified. The position coordinates of the semiconductor chip 2 can be specified. As a result, it is possible to reduce the coordinate shift of the semiconductor chip 2 that is the start of the pickup process, and it is possible to improve the reliability of the pickup process of the semiconductor chip 2.

Embodiment 2. FIG.
A semiconductor chip pick-up method according to the second embodiment of the present invention will be described with reference to FIGS. 19 to 22 are diagrams for explaining the pickup method according to the present embodiment. 19 to 22, the dot-hatched chip is the reference chip 18, the cross-hatched chip is the defective chip 19, and the non-hatched chip is the non-defective chip 20.

  Note that a pickup apparatus that employs the pickup method according to the present embodiment is used in the die bonding apparatus 15 in the semiconductor manufacturing system described above. Since these systems and devices have the same configuration as that of the first embodiment, description thereof will be omitted.

  In this embodiment, an example in which two target dies are provided will be described. In the example shown in FIG. 19, two target dies 16a and 16c are provided. These two target dies 16 a and 16 c are arranged in the vicinity of the outer periphery of the wafer 1, and are arranged symmetrically about the approximate center of the wafer 1. That is, the straight line connecting the target dies 16a and 16c passes through the approximate center of the wafer 1, and the distance from the center to the target die 16a is substantially equal to the distance to the target die 16c.

  In the present embodiment, the semiconductor chip 2 existing between the target dies 16 a and 16 c is used as the reference chip 18. Twelve semiconductor chips 2 on the path along which the broken line shown in FIG. 19 passes become reference chips. The target dies 16 a and 16 c and the reference chip 18 are used to specify the position coordinates of the semiconductor chip 2 in the apparatus coordinate system of the die bonding apparatus 15.

  After the introduction of the wafer, first, the recognition camera 7 recognizes the first target die 16a, and then moves to the target die 16c to recognize the target die 16c. In this way, the actual amount of movement in the die bonding apparatus 15 can be obtained by recognizing by moving between the two target dies 16a and 16c. Using this amount of movement, the coordinates of the semiconductor chip 2 to be picked up are corrected, and the exact position coordinates of the semiconductor chip 2 in the coordinate system of the die bonding apparatus 15 are specified.

  Further, during the movement from the target die 16a to the target die 16c, the reference chip 18 existing in the middle of movement is recognized at regular intervals and the position is corrected. As a result, the target dies 16a and 16b can be searched accurately, and the position coordinates can be specified accurately. In the present embodiment, all twelve reference chips 18 are recognized by the recognition camera 7.

  In the present embodiment, between the target dies 16a and 16c, the reference chip 18 adjacent in the X direction (direction in which rows extend) or the Y direction (direction in which columns extend) is recognized for each chip. Specifically, the reference chip 18 adjacent to the right of the target die 16a is recognized, and then the reference chip 18 adjacent below (−Y direction) the reference chip 18 is recognized.

  That is, as shown in FIG. 19, the recognition camera 7 moves between the target die 16 a and the target die 16 c in a stepwise manner for each chip and recognizes each reference chip 18. Thereby, it is possible to correct the position coordinates in both the X and Y directions.

  As described above, the target dies 16 a and 16 c are arranged near the outer periphery of the wafer 1. For this reason, the moving distance on the wafer 1 can be increased, the number of reference chips arranged between two target dies can be increased, and position coordinates can be corrected more accurately. .

  When the recognition of the target dies 16a and 16c is completed, the target die 16a and 16c are moved to the coordinates where the non-defective semiconductor chip 2 to be picked up specified based on the map data shown in FIG. In the example shown in FIG. 19, pick-up processing is sequentially executed from the leftmost semiconductor chip 2 in the first row to the right end. At this time, if the pass / fail data is “00” indicating that the semiconductor chip 2 is a non-defective chip, the semiconductor chip 2 is picked up, and if the pass / fail data is “11” indicating that it is a defective chip, no pick-up is performed.

  Further, as shown in FIG. 20, the reference chip 18 existing between the target dies is not limited to the case where it is determined to be a defective chip, and even if it is determined to be a non-defective chip, the sheet is not picked up. Leave on top of 3. That is, in the case of the reference chip 18, the pick-up process is skipped without performing the pick-up process, and the pick-up process of the next non-defective chip 20 is performed.

  As shown in FIG. 21, when the pick-up process is performed again on the wafer 1 in the middle of the process in which the non-defective chip 20 remains, the position coordinates of the semiconductor chip 2 in the apparatus coordinate system are specified again. In this case, first, the recognition camera 7 recognizes the image of the target die 16a, and then moves from the target die 16a to the target die 16c to recognize the target die 16c.

  During the previous pick-up process, the non-defective chips existing between the target dies are skipped without performing the pick-up process even if the pick-up order comes in the normal operation. Therefore, the reference chip 18 remains on the wafer 1.

  Accordingly, the reference chip 18 that is in the process of moving from the target die 16a toward the target die 16c is image-recognized by the recognition camera 7, and the position coordinates of the semiconductor chip 2 are corrected. After the specification of the position coordinates is completed, the position is moved to the first semiconductor chip 2 in the re-pickup process, and the pickup process is sequentially executed. In the example shown in FIG. 21, the non-defective chip 20 adjacent to the target die 16c is first picked up, and then picked up sequentially toward the left as indicated by the broken arrow.

  As described above, in the present embodiment, even for the wafer 1 that has been picked up halfway, the position coordinates of the semiconductor chip 2 in the apparatus coordinate system can be accurately specified, and the picking up process can be executed more accurately. It becomes possible.

  When the pickup of the normal good chip 20 that is not the reference chip 18 is completed, only the target dies 16 a and 16 c, the reference chip 18, and the defective chip 19 are left on the wafer 1. After the normal pick-up process of the non-defective chip 20 is completed, the die bonding apparatus 15 executes the pick-up process of the non-defective chip existing between the target dies. Then, the reference chip 18 moves to a non-defective chip closest to the non-defective chip 20 picked up last.

  In the example shown in FIG. 22, when the pickup of the non-defective chip 20 at the right end of the last row is completed, the reference chip 18 is moved to the reference chip 18 on the first line in the same column as the non-defective chip 20. Then, pick-up processing is sequentially executed in a direction in which the path moved from the reference chip 18 to the target die 16c from the target die 16a is reversed. At this time, if the reference chip 18 is a good chip, it is picked up, and if it is a defective chip, it is not picked up.

  Note that the pickup order is not limited to this example. Further, the reference chip 18 is not limited to the example shown in FIG. For example, the semiconductor chip 2 existing on a straight line connecting the target dies 16a and 16c may be used as the reference chip 18.

  Thus, according to the present embodiment, even when the pick-up process of the wafer 1 being processed is resumed, the target die can be accurately recognized and the position coordinates of the semiconductor chip 2 can be specified. Thereby, the coordinate shift of the semiconductor chip 2 in the pickup process can be reduced, and the reliability of the pickup process of the semiconductor chip 2 can be improved.

  If the semiconductor chip to be picked up is a chip with a non-defective chip / defective chip mark, map data may or may not be used during pick-up processing. . When map data is not used, the recognition camera 7 may recognize the mark attached on the semiconductor chip and determine whether or not to pick up.

  As mentioned above, although this invention was demonstrated based on embodiment, said embodiment is an illustration, and unless it deviates from the main point of this invention, you may add various change and increase / decrease. It will be understood by those skilled in the art that modifications to which these changes and increases / decreases are also within the scope of the present invention. The present invention is not limited to the above-described die bonding process, but is also suitable for an electronic device assembly process in which a semiconductor chip is picked up.

1 Wafer 2 Semiconductor chip 3 Sheet 4 Ring 5 Wafer ID
6 Barcode 7 Recognition Camera 8 Pickup Unit 9 Correction Unit 10 Push-up Unit 11 Push-up Pin 12 Expander 13 Server 14 Wafer Mount Device 15 Die Bonding Device 16 Target Die 17 Supporting Stand 18 Reference Chip 19 Defective Chip 20 Non-Quality Chip 30 Substrate 31 Mounting material 32 Bump 33 Electrode 34 Bonding wire 35 Resin

Claims (38)

Among two or more target dies provided on a wafer held by a holding jig, and a plurality of semiconductor chips formed in a predetermined arrangement on the wafer and separated into individual pieces, between the two target dies A recognition unit for recognizing at least one reference chip disposed;
Using the two or more target dies recognized by the recognition unit and the reference chip, a correction unit that specifies position coordinates of the plurality of semiconductor chips in an apparatus coordinate system;
Based on pass / fail data indicating pass / fail of individual semiconductor chips and map data including array data indicating the arrangement of individual semiconductor chips on the wafer, the reference coordinates are used, using the position coordinates of the semiconductor chips specified by the correction unit. A pick-up processing unit that performs pick-up processing of the semiconductor chip other than the chip, and executes the pick-up processing of the reference chip after the pick-up processing of the semiconductor chip other than the reference chip is completed;
A pickup device comprising:   The pick-up processing unit starts pick-up processing from the reference chip arranged in the vicinity of the last semiconductor chip that has undergone pick-up processing among the semiconductor chips other than the reference chip when picking up the reference chip. The pickup device according to claim 1, wherein   The recognition unit recognizes the reference chip existing between these target dies while moving to the next target die after moving and recognizing on one target die. Item 3. The pickup device according to Item 1 or 2.   The pickup device according to claim 1, wherein a plurality of the reference chips are provided.   5. The pickup device according to claim 1, wherein the pickup processing unit picks up a non-defective chip and does not pick up a defective chip. 6.   The pickup apparatus according to claim 1, further comprising an expansion processing unit that extends the holding jig to form a gap between individual semiconductor chips. The holding jig is
A sheet for attaching and holding the plurality of semiconductor chips;
A ring provided on the outer periphery of the seat;
A pickup device according to any one of claims 1 to 6.   The pickup device according to claim 1, further comprising a storage unit that stores the map data in association with identification information of the wafer.   9. The pickup device according to claim 1, further comprising a push-up portion that pushes up the semiconductor chip from the back side of the semiconductor chip to be picked up via the holding jig.   The pickup device according to claim 1, wherein the two or more target dies are arranged in the vicinity of the outer periphery of the wafer. The plurality of semiconductor chips are formed in a matrix on the wafer,
The pickup device according to claim 1, wherein the two or more target dies are arranged in the same row or the same column of the plurality of semiconductor chips.   The pickup device according to claim 11, wherein the two or more target dies are respectively disposed at both ends of the same row or the same column.   The pickup device according to claim 1, wherein the two or more target dies are arranged symmetrically about a substantially center of the wafer. Create map data including array data of a plurality of semiconductor chips formed in a predetermined array on a wafer held by a holding jig and separated into pieces, and pass / fail data indicating pass / fail of individual semiconductor chips,
Recognizing two or more target dies provided on the wafer and at least one reference chip arranged between the two target dies among the plurality of semiconductor chips;
Using the recognized two or more target dies and the reference chip, the position coordinates of the plurality of semiconductor chips in an apparatus coordinate system are specified,
Using the specified position coordinates of the semiconductor chip, based on the map data, perform a pick-up process of the semiconductor chip other than the reference chip,
A pick-up method for executing the pick-up process for the reference chip after the pick-up process for the semiconductor chip other than the reference chip is completed.   The position coordinate in the apparatus coordinate system is specified by using the two or more target dies and the reference chip again in the wafer in the middle of a process in which non-defective chips remain among the semiconductor chips. Item 15. The pickup method according to Item 14.   15. When picking up the reference chip, pick-up processing is started from the reference chip arranged in the vicinity of a semiconductor chip that has been picked up last among the semiconductor chips other than the reference chip. Or the pick-up method of 15.   16. After moving and recognizing on one target die, the reference chip existing between these target dies is recognized while moving on the next target die. 16. The pickup method according to 16.   18. The pickup method according to claim 14, wherein a plurality of reference chips are recognized to identify position coordinates in the apparatus coordinate system.   The pickup method according to any one of claims 14 to 18, wherein, in the pickup process, pickup is performed for a non-defective chip and pickup is not performed for a defective chip. Stretching the holding jig holding the wafer, forming a gap between individual semiconductor chips,
The pickup method according to claim 14, wherein the pickup process is performed in a state where a gap is formed between the semiconductor chips.   21. The pick-up method according to claim 14, wherein the wafer is diced while being held by the holding jig, and is divided into individual semiconductor chips.   The pickup method according to any one of claims 14 to 21, wherein the semiconductor chip is pushed up from the back side of the semiconductor chip to be picked up via the holding jig.   23. The pickup method according to claim 14, wherein the two or more target dies are arranged in the vicinity of the outer periphery of the wafer. The plurality of semiconductor chips are formed in a matrix on the wafer,
The pickup method according to any one of claims 14 to 23, wherein the two or more target dies are arranged in the same row or the same column of the plurality of semiconductor chips.   25. The pickup method according to claim 24, wherein the two or more target dies are respectively disposed at both ends of the same row or the same column.   The pickup method according to any one of claims 14 to 23, wherein the two or more target dies are arranged symmetrically about a substantially center of the wafer. A semiconductor device picked up by the pickup device according to claim 1 is conveyed onto a substrate,
A die bonding apparatus for die bonding the semiconductor chip onto the substrate. A semiconductor chip picked up by the pick-up method according to any one of claims 14 to 26 is transferred onto a substrate,
A die bonding method of die bonding the semiconductor chip to the substrate. Create map data including array data of a plurality of semiconductor chips formed in a predetermined array on a wafer and pass / fail data indicating pass / fail of individual semiconductor chips,
Holding the wafer in a holding jig;
In a state of being held by the holding jig, the wafer is divided into individual semiconductor chips,
Recognizing two or more target dies provided on the wafer and at least one reference chip arranged between the two target dies among the semiconductor chips;
Using the recognized two or more target dies and the reference chip, the position coordinates of the plurality of semiconductor chips in an apparatus coordinate system are specified,
Using the specified position coordinates of the semiconductor chip, based on the map data, perform a pick-up process of the semiconductor chip other than the reference chip,
A method of manufacturing a semiconductor device, wherein a pickup process for the reference chip is performed after a pickup process for the semiconductor chip other than the reference chip is completed.   The position coordinate in the apparatus coordinate system is specified by using the two or more target dies and the reference chip again in the wafer in the middle of a process in which non-defective chips remain among the semiconductor chips. Item 30. A method for manufacturing a semiconductor device according to Item 29.   30. When picking up the reference chip, the pick-up process is started from the reference chip disposed in the vicinity of the semiconductor chip that has been picked up last among the semiconductor chips other than the reference chip. Or 30. A method of manufacturing a semiconductor device according to 30.   The reference chip existing between these target dies is recognized while moving to the next target die after moving and recognizing on one target die. 31. A method for manufacturing a semiconductor device according to 31.   33. The method of manufacturing a semiconductor device according to claim 29, wherein a plurality of reference chips are recognized and position coordinates in the device coordinate system are specified.   34. The method of manufacturing a semiconductor device according to any one of claims 29 to 33, wherein, in the pick-up process, a non-defective chip is picked up and a defective chip is not picked up. Stretching the holding jig holding the wafer, forming a gap between individual semiconductor chips,
35. The method of manufacturing a semiconductor device according to claim 29, wherein the pickup process is performed in a state where a gap is formed between the semiconductor chips.   36. The method of manufacturing a semiconductor device according to any one of claims 29 to 35, wherein the wafer is diced while being held by the holding jig and divided into individual semiconductor chips.   37. The method of manufacturing a semiconductor device according to claim 29, wherein the semiconductor chip is pushed up from the back side of the semiconductor chip to be picked up through the holding jig.   The method for manufacturing a semiconductor device according to any one of claims 29 to 37, wherein the picked-up semiconductor chip is die-bonded on a substrate.

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