KR20110069214A - Method of confirming a position of a wafer and method of separating a semiconductor chip using the same - Google Patents
Method of confirming a position of a wafer and method of separating a semiconductor chip using the same Download PDFInfo
- Publication number
- KR20110069214A KR20110069214A KR1020090125843A KR20090125843A KR20110069214A KR 20110069214 A KR20110069214 A KR 20110069214A KR 1020090125843 A KR1020090125843 A KR 1020090125843A KR 20090125843 A KR20090125843 A KR 20090125843A KR 20110069214 A KR20110069214 A KR 20110069214A
- Authority
- KR
- South Korea
- Prior art keywords
- wafer
- marking pattern
- stage
- camera
- image
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67271—Sorting devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Abstract
Description
The present invention relates to a wafer positioning method and a semiconductor chip separation method using the same. More particularly, the present invention relates to a method for locating a wafer seated on a stage for separating semiconductor chips individually cut in a manufacturing process of a semiconductor device from an adhesive sheet and a semiconductor chip separation method using the same.
In general, in the manufacturing process of a semiconductor device, a plurality of semiconductor chips as unit devices are formed by a series of semiconductor manufacturing processes on a silicon wafer used as a semiconductor wafer.
Such semiconductor chips are individually cut through a sawing process in a state where they are adhered to an adhesive sheet to facilitate cutting of the semiconductor wafer. Thereafter, the cut semiconductor chips are supplied to the die bonding process, and the individual semiconductor chips are separated from the semiconductor wafer in the die bonding process and mounted on the lead frame or the substrate. At this time, a chip separating apparatus for separating the semiconductor chips individually is used.
The conventional semiconductor chip separating apparatus includes a stage for supporting a wafer having a plurality of sawing completed semiconductor chips, a holder for holding an adhesive sheet attached to the lower surface of the wafer, and a picker for picking the semiconductor chips. It is required to mount the wafer in the correct position on the stage. Therefore, it is necessary to confirm the position of the wafer seated on the stage.
The present invention provides a wafer positioning method for checking the position of a wafer seated on a stage.
The present invention provides a semiconductor chip separation method using the wafer positioning method.
In order to achieve the object of the present invention, in the wafer positioning method according to the present invention, the center of the stage for supporting the wafer on which the marking pattern is formed and the optical axis of the camera disposed on the top of each other, the stage Move relative to the camera with a predetermined movement amount to position the camera on top of the marking pattern. Thereafter, the camera photographs the marking pattern to obtain a captured image, and compares the captured image and a reference image with respect to the marking pattern when the wafer is in position. Here, the marking pattern may be formed on an upper portion of the die disposed on the periphery of the wafer. In addition, comparing the picked-up image and the reference image overlaps the picked-up and reference images, calculates the image overlapping amount by matching the picked-up and reference images with each other using the overlapped image, and then stores the image overlapped amount. Can be performed by comparing with a reference value.
In the separation method of the semiconductor chip according to the present invention in order to achieve the object of the present invention, the wafer with the marking pattern and the die is seated on the stage, the optical axis of the camera disposed on the center of the stage and the top of the stage Match each other. Subsequently, the stage is moved relative to the camera with a predetermined movement amount to position the camera on top of the marking pattern, and the camera captures the specific pattern to obtain a captured image. After comparing the captured image and the input reference image, it is determined whether the wafer position is good, and when the wafer position is normal, the die is separated from the wafer.
The method for locating a wafer according to the present invention configured as described above uses a marking pattern on a wafer to compare a captured image and a reference image of a marking pattern, and compares an image overlap amount with a reference value to perform a subsequent pick-up process. do. When the mirror die is disposed on a separate wafer, a process of checking the positions of the plurality of mirror dies may be performed, but the wafer positioning method according to the present invention may identify the wafer position in one process, and further, the mirror die Deterioration of wafer process yield can be suppressed due to poor die
Hereinafter, a wafer positioning method and a semiconductor chip separating apparatus according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings. As the inventive concept allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to the specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention. Like reference numerals are used for like elements in describing each drawing. In the accompanying drawings, the dimensions of the structures are enlarged to illustrate the invention, and are actually shown in a smaller scale than the actual dimensions in order to explain the schematic configuration. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprises", "having", and the like are used to specify that a feature, a number, a step, an operation, an element, a part or a combination thereof is described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.
On the other hand, unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.
1 is a flowchart illustrating a wafer positioning method according to an embodiment of the present invention. FIG. 2 is a plan view illustrating the wafer on which the marking pattern of FIG. 1 is formed. 3 is a plan view for explaining a step of comparing the captured image and the reference image of FIG. 1.
1 to 3, in the wafer positioning method according to the embodiments of the present invention, the center of the stage and the optical axis of the camera coincide with each other (S110).
In order to perform the step S110, the stage supporting the wafer is moved to coincide with the center of the stage and the optical axis of the camera.
The
Subsequently, the camera is positioned above the marking pattern by moving the stage (S120). For example, a driving unit (not shown) for driving the stage moves the stage on which the wafer is seated to position the camera on the
The
In an embodiment of the present disclosure, the captured
Subsequently, the captured
That is, for example, when the reference value is 95%, when the overlap amount 25 between the captured
Accordingly, the wafer position can be confirmed by using the overlapping
4 is a flowchart illustrating a semiconductor chip separation method according to an embodiment of the present invention.
2 to 4, the
Subsequently, the center of the stage and the optical axis of the camera coincide with each other (S220). In order to perform the step S220, the stage supporting the wafer is moved to coincide with the center of the wafer positioned at the center of the stage and the optical axis of the camera.
Subsequently, the camera is positioned on the marking pattern by moving the stage (S230). For example, a driving unit (not shown) for driving the stage moves the stage on which the wafer is seated to position the camera on the marking pattern. The movement amount of the stage may be calculated using location information on the marking
The imaging pattern for the marking pattern is obtained by imaging the marking pattern (S240).
Subsequently, the captured
Subsequently, when the wafer position is normal, the die is separated from the wafer (S260). In this case, a picker (not shown) may be disposed above each of the semiconductor dies by vacuum adsorption to separate the semiconductor die from the adhesive sheet separately.
As described above, the wafer positioning method and the chip separation method according to the present invention use a marking pattern formed on the die instead of a mirror die to compare the picked-up image and the reference image of the marking pattern to confirm the position of the wafer. Can be. As a result, the wafer positioning process can be improved in time compared to using a conventional mirror die. In addition, when the marking pattern is used instead of the mirror die, the problem may be improved because the wafer die is a bad die and the wafer process yield is deteriorated. The wafer position correction method of the present invention can be applied to a die bonding apparatus. Further, those skilled in the art will appreciate that the alignment of other wafers and their correction may be applied to semiconductor manufacturing apparatuses that require them.
While the present invention has been described in connection with what is presently considered to be practical and exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
1 is a flowchart illustrating a wafer positioning method according to an embodiment of the present invention.
FIG. 2 is a plan view illustrating the wafer on which the marking pattern of FIG. 1 is formed.
3 is a plan view for explaining a step of comparing the captured image and the reference image of FIG. 1.
4 is a flowchart illustrating a method of separating a semiconductor chip according to an embodiment of the present invention.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020090125843A KR20110069214A (en) | 2009-12-17 | 2009-12-17 | Method of confirming a position of a wafer and method of separating a semiconductor chip using the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020090125843A KR20110069214A (en) | 2009-12-17 | 2009-12-17 | Method of confirming a position of a wafer and method of separating a semiconductor chip using the same |
Publications (1)
Publication Number | Publication Date |
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KR20110069214A true KR20110069214A (en) | 2011-06-23 |
Family
ID=44401073
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020090125843A KR20110069214A (en) | 2009-12-17 | 2009-12-17 | Method of confirming a position of a wafer and method of separating a semiconductor chip using the same |
Country Status (1)
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KR (1) | KR20110069214A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH706426A1 (en) * | 2012-04-24 | 2013-10-31 | Esec Ag | Method for preparing and monitoring mounting of semiconductor chips, involves superimposing calculated result of data of virtual semiconductor chip with wafer map image and displaying as combined image on screen |
KR20170132441A (en) * | 2016-05-24 | 2017-12-04 | 세메스 주식회사 | Method of forming a recipe of a die bonging process |
-
2009
- 2009-12-17 KR KR1020090125843A patent/KR20110069214A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH706426A1 (en) * | 2012-04-24 | 2013-10-31 | Esec Ag | Method for preparing and monitoring mounting of semiconductor chips, involves superimposing calculated result of data of virtual semiconductor chip with wafer map image and displaying as combined image on screen |
KR20170132441A (en) * | 2016-05-24 | 2017-12-04 | 세메스 주식회사 | Method of forming a recipe of a die bonging process |
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