CN108666238B - Chip mounting device and method for manufacturing semiconductor device - Google Patents
Chip mounting device and method for manufacturing semiconductor device Download PDFInfo
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- CN108666238B CN108666238B CN201810258963.XA CN201810258963A CN108666238B CN 108666238 B CN108666238 B CN 108666238B CN 201810258963 A CN201810258963 A CN 201810258963A CN 108666238 B CN108666238 B CN 108666238B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
Abstract
Provided is a chip mounting device capable of determining a preliminary maintenance period without complicating the device structure of the chip mounting device. The die bonding device includes a bonding unit for bonding a bare chip supplied from a bare chip supply unit to a substrate supplied from a substrate supply unit, and a control unit for controlling the bonding unit. The control unit performs the following operations: (a) recognizing the position of the substrate by imaging the substrate with an imaging device, (b) recognizing the positions of the substrate and the bare chip mounted on the substrate by imaging the substrate and the bare chip mounted on the substrate with the imaging device, and checking the relative positions of the substrate and the bare chip, (c) diagnosing the fixed state of the substrate based on the position of the substrate recognized in the (a) and the position of the substrate recognized in the (b).
Description
Technical Field
The present invention relates to a die bonding device (die bonding device), and can be applied to a die bonding device having a self-diagnostic function, for example.
Background
A part of a manufacturing process of a semiconductor device includes a step of mounting a semiconductor chip (hereinafter, referred to as a "bare chip") on a wiring substrate, a lead frame, or the like (hereinafter, referred to as a "substrate") to form a package (package), and a part of the step of forming the package includes a step of dividing the bare chip from a semiconductor wafer (hereinafter, referred to as a "wafer") (a dicing step) and a mounting step of mounting the divided bare chip on the substrate. The semiconductor manufacturing apparatus used in the mounting process is a die mounter such as a die mounter.
Documents of the prior art
Patent document
Patent document 1: japanese laid-open patent publication No. 7-141021
Disclosure of Invention
In a conventional chip mounter, a trouble of the device operation is not known until a defective product is generated. Therefore, in order to prevent mounting failure due to a failure in the operation of the apparatus, the preliminary maintenance of the chip mounter is performed periodically or according to the number of productions. However, in this method, since it is necessary to increase the safety margin in order to completely prevent the failure, the number of times of maintenance is increased and the throughput (throughput) is reduced.
The invention aims to provide a chip mounting device which can judge the pre-maintenance period without complicating the device structure of the chip mounting device.
Other problems and novel features will be apparent from the description of the present specification and the accompanying drawings.
A brief description of a typical configuration of the present invention is as follows.
That is, the die bonding apparatus includes: a bare chip supply section; a substrate supply unit; a mounting portion for mounting the bare chip supplied from the bare chip supply portion on the substrate supplied from the substrate supply portion or on the bare chip already mounted on the substrate; and a control unit for controlling the bare chip supply unit, the substrate supply unit, and the mounting unit. The mounting portion includes: a mounting head having a collet (collet) for adsorbing the bare chip; and a first imaging device capable of imaging the substrate and the bare chip mounted on the substrate. The control unit performs the following operations: (a) the method includes (a) recognizing a position of the substrate by imaging the substrate with the first imaging device, (b) recognizing positions of the substrate and the bare chip mounted on the substrate by imaging the substrate and the bare chip mounted on the substrate with the first imaging device, and checking relative positions of the substrate and the bare chip, (c) diagnosing a fixed state of the substrate based on the position of the substrate recognized in the (a) and the position of the substrate recognized in the (b).
Effects of the invention
According to the above chip mounting device, the preliminary maintenance period can be judged without complicating the device structure of the chip mounting device.
Drawings
Fig. 1 is a schematic plan view showing a chip mounter according to an embodiment.
Fig. 2 is a schematic side view for explaining the operation of the mounting head and the like as viewed from the direction of arrow a shown in fig. 1.
Fig. 3 is a perspective view showing an external appearance of the bare chip supply unit.
Fig. 4 is a schematic cross-sectional view showing a main part of the bare chip supply section.
Fig. 5 is a flowchart showing the mounting operation of fig. 1.
Fig. 6 is a diagram showing the result of substrate recognition before and after mounting.
Fig. 7 is a flowchart showing the mounting operation in modification 1.
Fig. 8 is a flowchart showing the mounting operation in modification 2.
Fig. 9 is a diagram showing the result of bare chip identification before and after mounting.
Fig. 10 is a schematic plan view of the whole chip mounter according to modification 3.
Fig. 11 is a schematic side view for explaining the operation of the pickup head, the mounting head, and the like as viewed from the direction of arrow a shown in fig. 10.
Description of the reference numerals
1 … bare chip supply section, 11 … wafer, 12 … wafer holding table, 13 … pusher unit, 2 … pick-up section, 21 … pick-up head, 22 … collet, Y drive section of 23 … pick-up head, 3 … aligning section, 31 … intermediate stage, 32 … stage recognition camera, 4 … mounting section, 41 … mounting head, 42 … collet, Y drive section of 43 … mounting head, 44 … substrate recognition camera, 5 … transfer section, 51 … transfer line, 6 … substrate supply section, 7 … substrate carry-out section, 8 … control section, 9 … substrate, 10 … chip mounting machine, BS … stage, D … bare chip, P … package area.
Detailed Description
The inventors studied a method for determining the pre-maintenance timing with high accuracy, and as a result, obtained the following findings: this period can be judged by diagnosing a mechanism or the like that affects mounting accuracy using the recognition result in continuous operation (in production). The present invention has been made based on this new insight.
For example, in the case where the substrate cannot be normally fixed, mounting accuracy is unstable. Whether the substrate is fixed normally can be judged by two or more identifications. Further, the poor processing (process) is limited by comparing the position and stability of the die before mounting with the appearance result of the die after mounting.
Specifically, for example, it is common to identify the substrate before and after mounting (visual inspection), compare the front and rear to diagnose the substrate fixing state, or monitor the position of the bare chip on the back surface of the bare chip before mounting to diagnose the pick-up state and mounting state of the bare chip.
Thus, defects of a mechanism which affects mounting accuracy can be found without adding a new mechanism or the like. In addition, the pre-maintenance timing can be accurately determined, and the throughput can be improved without degrading the quality.
Hereinafter, the embodiments and modifications will be described with reference to the drawings. In the following description, the same components are denoted by the same reference numerals, and redundant description thereof may be omitted. In addition, although the drawings schematically show the width, thickness, shape, and the like of each part as compared with the actual form in order to make the description more clear, the drawings are merely examples in principle and do not limit the explanation of the present invention.
[ examples ] A
Fig. 1 is a schematic plan view of a chip mounter according to an embodiment. Fig. 2 is a schematic side view for explaining a schematic configuration and an operation of the mounting head and its peripheral portion as viewed from an arrow a in fig. 1.
The chip mounter 10 is a chip mounter having a single carrying line and a single mounting head. The chip mounter 10 generally has: a bare chip supply unit 1 that supplies a bare chip D to be mounted on a substrate 9 on which one or more product regions (hereinafter referred to as package regions P) (15 regions in fig. 1) including wiring and eventually becoming a single package are printed on the substrate 9; a mounting section 4 which picks up the bare chip D from the bare chip supply section 1 and mounts it onto the substrate 9 or the already mounted bare chip D; a conveying part 5 for conveying the substrate 9 to a mounting position; a substrate supply unit 6 that supplies the substrate 9 to the transfer unit 5; a substrate carry-out section 7 for receiving the mounted substrate 9; and a control unit 8 for monitoring and controlling the operations of the respective units.
First, the bare chip supply section 1 includes: a wafer holding table 12 holding a wafer 11 having bare chips D of a plurality of grades (grades); and a pushing unit 13 shown by a dotted line that pushes the bare chip D from the wafer 11. In the die supply unit 1, the wafer holding table 12 is moved in the XY direction by a drive mechanism, not shown, disposed at a lower portion thereof, and is moved so that a predetermined die is positioned to overlap the pusher 13 on a plane when the die D is picked up from the wafer 11.
The mounting portion 4 has: a mounting head 41 which has a collet 42 for holding the bare chip D pushed by the pushing unit 13 by suction at the tip end thereof, picks up the bare chip D and mounts the same onto the package region P of the substrate 9 being carried; a Y drive unit 43 that moves the mounting head 41 in the Y direction; a substrate recognition camera (first imaging device) 44 that images a position recognition mark (not shown) of the package region P of the carried substrate 9 and recognizes a mounting position of the bare chip D to be mounted; and a bare chip recognition camera (second photographing device) 45 which photographs the back surface of the picked-up bare chip D to recognize the position of the bare chip. The pickup is performed based on a classification map (sorting map) showing the levels of the bare chips which the wafer 11 has. The classification map is stored in the control unit 8 in advance. The mounting head 41 includes driving units, not shown, for moving the collet 42 up and down and in the X direction, and is movable up and down and left and right as indicated by arrows in fig. 2.
With this configuration, the mounting head 41 picks up the bare chip D by correcting the pickup position and the posture based on the imaging data of the bare chip recognition camera 45, and mounts the bare chip D on the package region P of the substrate 9 based on the imaging data of the substrate recognition camera 44.
The conveying unit 5 has two conveying grooves for conveying the substrate 9. For example, the substrate 9 is moved by a not-shown conveyor belt provided in two conveyor grooves.
With this configuration, the substrate 9 is placed on the transfer line 51 by the substrate supply unit 6, moved to the mounting position along the transfer slot, and moved to the substrate carry-out unit 7 after mounting. Further, by moving the substrate carrying-out section 7 toward the substrate supply section 6, the bare chip can be mounted on another package region of the substrate 9, or the bare chip can be further mounted on the bare chip. The bare chips can be mounted in multiple stages by reciprocating between the substrate supply unit 6 and the substrate carry-out unit 7 multiple times.
Next, the structure of the bare chip supply section 1 will be described with reference to fig. 3 and 4. Fig. 3 is a perspective view showing an external appearance of the bare chip supply unit. Fig. 4 is a schematic cross-sectional view showing a main part of the bare chip supply section.
The bare chip supply portion 1 includes a wafer holding stage 12 that moves in a horizontal direction (XY direction), and a pusher unit 13 that moves in an up-down direction. The wafer holding stage 12 includes an extension ring 15 that holds the wafer ring 14, and a support ring 17 that horizontally positions a dicing tape 16 that is held by the wafer ring 14 and to which a plurality of bare chips D are bonded. The pushing unit 13 is disposed inside the support ring 17.
The bare chip supply unit 1 lowers the extension ring 15 holding the wafer ring 14 when the bare chip D is pushed. As a result, the dicing tape 16 held on the wafer ring 14 is pulled, the interval of the bare chips D is expanded, and the bare chips D are pushed from below by the pushing unit 13, thereby improving the pick-up performance of the bare chips D. A film-like adhesive material called a Die Attach Film (DAF)18 is attached between the wafer 11 and the dicing tape 16. In the wafer 11 having the die bonding film 18, the wafer 11 and the die bonding film 18 are diced. Therefore, in the peeling step, the wafer 11 and the die bonding film 18 are peeled from the dicing tape 16.
The control unit 8 includes: a memory for storing a program (software) for monitoring and controlling the operation of each part of the chip mounter 10, and a Central Processing Unit (CPU) for executing the program stored in the memory. For example, the control unit 8 takes in various information such as image information from the substrate recognition camera 44 and the position of the mounting head 41, and controls the operations of the components such as the mounting operation of the mounting head 41.
As described above, the chip mounter 10 includes: a wafer recognition camera 24 that recognizes the posture of the bare chip D on the wafer 11, a bare chip recognition camera 45 that photographs the back surface of the picked-up bare chip D to recognize the position of the bare chip, and a substrate recognition camera 44 that recognizes the mounting position on the mounting stage BS. What is necessary to perform the posture deviation correction between the recognition cameras is the wafer recognition camera 24 and the bare chip recognition camera 45 that participate in the pickup by the mounting head 41, and the substrate recognition camera 44 that participates in the mounting to the mounting position by the mounting head 41. In the present embodiment, the bare chip D is positioned by using the wafer recognition camera 24, and the package region P is positioned and the relative position of the package region P and the bare chip mounted on the package region P is inspected by using the substrate recognition camera 44.
Fig. 5 is a flowchart illustrating a die mounting process in the die mounting device of the embodiment.
In the die mounting step of the embodiment, first, the controller 8 takes out the wafer ring 14 holding the wafer 11 from the wafer cassette, places the wafer ring on the wafer holding stage 12, and conveys the wafer holding stage 12 to a reference position (wafer loading) where the die D is picked up. Next, the control unit 8 performs fine adjustment so that the arrangement position of the wafer 11 accurately matches the reference position, based on the image acquired by the wafer recognition camera 24.
Next, the controller 8 moves the wafer holding stage 12 on which the wafer 11 is placed at a predetermined pitch and horizontally holds the wafer by the pitch, thereby placing the bare chip D to be picked up first at the pick-up position (bare chip transfer). The wafer 11 is inspected for each bare chip by an inspection device such as a probe in advance, and map data (map data) showing pass/fail for each bare chip is generated and stored in the storage device of the control unit 8. The determination as to whether the bare chip D as the pickup object is a non-defective product or a defective product is performed based on the drawing data. When the bare chip D is a defective product, the control unit 8 moves the wafer holding table 12 on which the wafer 11 is placed at a predetermined pitch, positions the bare chip D to be picked up next at the picking position, and skips the defective bare chip D.
The control unit 8 images the main surface (upper surface) of the bare chip D to be picked up by the wafer recognition camera 24, and calculates the amount of positional displacement of the bare chip D to be picked up from the pickup position from the acquired image. The control unit 8 moves the wafer holding table 12 on which the wafer 11 is placed based on the positional deviation amount, and accurately arranges the bare chip D to be picked up at the pickup position (bare chip confirmation (step S1)).
The controller 8 places the substrate 9 on the transfer line 51 by the substrate supply unit 6 (substrate loading). The control section 8 moves the substrate 9 to the mounting position (substrate conveyance).
The control unit 8 performs positioning by recognizing the position of the package region P of the substrate 9 by imaging the substrate with the substrate recognition camera 44 before mounting for mounting (substrate recognition (step S4)).
After the die D to be picked up is accurately placed at the pickup position, the control unit 8 picks up the die D from the dicing tape 16 by the mounting head 41 including the collet 42 (step S2), and performs die bonding on the package region P of the substrate 9 or the die already mounted on the package region P of the substrate 9 based on the substrate recognition result of step S4 (step S5). The position of the die D may be checked by photographing the back surface of the picked up die D by the die recognition camera 45 (step S3). This step is OPTION (OPTION).
After the bare chip D is mounted, the control section 8 checks whether or not the mounting position is accurate. The control unit 8 performs position recognition of the package region P of the substrate 9 by again imaging the package region P of the substrate 9 with the substrate recognition camera 44 in order to check the mounting and mounting result (step S6). The control unit 8 images the bare chip D by the substrate recognition camera 44 to recognize the position of the bare chip D (step S7), and performs position inspection of the mounted bare chip D based on the results of the substrate recognition and the bare chip recognition. The control unit 8 compares the mounting position recorded in advance with each other to perform numerical value output, inspection, and determination.
The control unit 8 performs self-diagnosis (step S9) described later, and performs the next mounting if there is no abnormality (step S8).
Thereafter, the bare chips D are attached one by one to the package region P of the substrate 9 following the same procedure. After the mounting of one substrate is completed, the substrate 9 is moved to the substrate carry-out section 7 (substrate transfer), and the substrate 9 is delivered to the substrate carry-out section 7 (substrate unloading).
In addition, the bare chips D are peeled off one by one from the dicing tape 16 following the same procedure. After the picking up of all the die D excluding the defective products is completed, the dicing tape 16, the wafer ring 14, and the like, which have once held the die D in the outer shape of the wafer 11, are unloaded to the wafer cassette.
Next, self-diagnosis will be described with reference to fig. 6 (step S9). Fig. 6 is a diagram showing a result of substrate recognition and a result of appearance inspection, where fig. 6 (a) shows a case where substrate fixation is insufficient, and fig. 6 (B) shows a case where substrate fixation is normal. The horizontal axis of fig. 6 shows the number of times of mounting (number of times of operation), and the vertical axis shows the position (μm) of the substrate with respect to the reference. The mounting frequency of FIG. 6 (B) is 1 to 304, and the mounting frequency of FIG. 6 (A) is 870 to 1000.
The control unit 8 compares the substrate recognition results before and after mounting to calculate the amount of positional displacement of the substrate, and when the amount of positional displacement of the substrate is equal to or greater than a predetermined amount, determines that the substrate is insufficiently fixed and issues a warning.
Specifically, the control unit 8 determines the position (P) of the package region P in the substrate recognition in step S4S4) And the position (P) of the package region P in the substrate recognition of step S6S6) The difference (the amount of positional displacement of the substrate) is calculated by comparison. In FIG. 6 (A) in which the number of times of operation is large, PS4And PS6The variation of (2) is large, and the amount of positional displacement of the substrate is also large. In FIG. 6 (B) with a small number of operating cycles, PS4And PS6The variation of (a) is smaller than that of (a) of fig. 6, and the amount of positional displacement of the substrate is also smaller. Although the amount of positional displacement of the substrate is not shown in fig. 6 (a) and (B), the amount of positional displacement of the substrate is the difference between the positions of the substrate before and after mounting, and can be easily understood from the drawing. The control unit 8 determines that the substrate is not sufficiently fixed when the amount of positional displacement of the substrate is large as shown in fig. 6 (a), and determines that the substrate is normally fixed when the amount of positional displacement of the substrate is small as shown in fig. 6 (B).
For example, the control unit 8 determines that the substrate is sufficiently fixed (normal) when the amount of positional displacement of the substrate is 1 to 5 μm, determines that the substrate is within a normal variation range when the substrate is 5 to 10 μm, and determines that the substrate is insufficiently fixed when the substrate is 10 μm or more. When it is determined that the substrate is insufficiently fixed, for example, mechanical clamping is insufficient, fixation by suction is insufficient, and camera and lens are insufficiently fixed, and if mechanical clamping is insufficient, the height is reconsidered, if fixation by suction is insufficient, leakage and pipe bending are reconsidered, and if camera and lens are insufficiently fixed, loosening and dropping are reconsidered.
According to the above embodiments, it is possible to provide a chip mounter and a mounting method capable of determining a preliminary maintenance period without complicating the device structure of the chip mounter. Thus, a high-precision chip mounter can be provided, and high precision can be maintained.
< modification example >
Hereinafter, some representative modifications are exemplified. In the following description of the modified examples, the same reference numerals as those of the above-described examples can be used for portions having the same structures and functions as those of the above-described examples. Also, as for the description of the relevant portions, the description in the above embodiments can be cited as appropriate within a range not technically contradictory. In addition, all or a part of the embodiments and the modifications described above can be applied to a suitable combination within a range not technically contradictory.
(modification 1)
Step S3 is an OPTION (OPTION) in the embodiment, but step S3 is performed in modification 1. Modification 1 is the same as in example except for self-diagnosis. The self-diagnosis (step SA) in modification 1 will be described with reference to fig. 7. Fig. 7 is a flowchart showing the mounting operation in modification 1.
The control unit 8 performs position inspection of the back surface of the bare chip before mounting (position correction may or may not be performed based on the position inspection result). The position of the die D in the die back surface position check of step S3 is compared with the position of the die stored, and the difference (the amount of positional displacement of the die) is calculated.
For example, the control unit 8 determines that the bare chip recognition and pickup are normal when the amount of positional movement of the bare chip is 1 to 5 μm, determines that the deviation range is normal when the amount of positional movement is 5 to 10 μm, and determines that the pickup position is abnormal when the deviation range is 10 μm or more. When it is determined that the pickup position is abnormal, for example, a die recognition failure or a shift during pickup is conceivable, and the resolution, the registration model (pattern), and the like are reconsidered for the die recognition failure, and the suction pressure, the timing, and the height are reconsidered for the shift during pickup.
(modification 2)
Although step S3 is an OPTION (OPTION) in the embodiment, step S3 is performed in modification 2 in the same manner as in modification 1. Modification 2 is the same as in the embodiment except for self-diagnosis. The self-diagnosis in modification 2 (steps S9, SB) will be described with reference to fig. 8 and 9.
Fig. 8 is a flowchart showing the mounting operation in modification 2. Fig. 9 is a diagram showing a position inspection result and an appearance inspection result of the back surface of the bare chip in the case where mounting is normal due to an abnormal pickup. The horizontal axis of fig. 9 shows the mounting times (the number of times of operation), and the vertical axis shows the position (μm) of the bare chip with respect to the reference. The mounting times of FIG. 9 are 1 to 320.
The control section 8 compares the recognition results of the bare chips before and after mounting to calculate the amount of positional displacement of the bare chip, and when the position of the back surface of the bare chip before mounting and the appearance inspection result are significantly different, determines that there is a problem in the substrate fixing state or mounting processing, and issues a warning.
Specifically, the control unit 8 checks the position (P) of the die D in the die back position check of step S3S3) And the position (P) of the bare chip in the bare chip position identification of step S7S7) The difference (the amount of positional displacement of the bare chip) is calculated by comparison. In FIG. 9PS3And PS7The direction of change of (2) is in the same tendency, and the amount of positional shift is small.
For example, the control unit 8 determines that the substrate is sufficiently fixed (normal) and the mounting is normal when the amount of positional movement of the die is 1 to 5 μm (when the positional deviation of the die with respect to the reference is the same tendency before and after mounting), determines that the substrate is insufficiently fixed or the mounting is abnormal when the amount of positional deviation is 5 to 10 μm (when the positional deviation of the die with respect to the reference is the same tendency before and after mounting), and determines that the substrate is insufficiently fixed or the mounting is abnormal when the amount of positional deviation is 10 μm or more. The control unit 8 compares the substrate recognition results before and after mounting to calculate the position movement amount of the substrate when it is determined that the substrate is insufficiently fixed or the mounting is abnormal, and determines that the substrate is insufficiently fixed when the position movement amount of the substrate is equal to or more than a predetermined amount. The control unit 8 determines that the mounting is abnormal when the substrate is determined to be fixed normally. When it is determined that the mounting is abnormal, it is conceivable that the mounting head or the collet is abnormal or that the mounting pressing is poor. If the mounting head or the collet is abnormal, the mechanical looseness is confirmed, and if the mounting head or the collet is not pressed well, the height and the temperature are considered again.
(modification 3)
In the embodiment, the bare chip D is picked up from the wafer by the mounting head 41, but in modification 3, the intermediate stage 31 is provided between the bare chip supply unit 1 and the mounting unit 4 in order to shorten the moving distance of the mounting head 41 and shorten the processing time.
A chip mounter according to modification 3 will be described with reference to fig. 10 and 11. Fig. 10 is a schematic plan view of a chip mounter according to modification 3. Fig. 11 is a schematic side view for explaining a schematic configuration and an operation of the pickup head, the mounting head, and the peripheral portion thereof, which are viewed from an arrow a in fig. 10.
The chip mounter 10A of the modification is a chip mounter having a single transfer line and a single mounting head. The chip mounter 10A generally has: a bare chip supply unit 1 for supplying a bare chip D to be mounted to a package region P of a substrate 9; a pick-up section 2 for picking up a bare chip from the bare chip supply section 1; an alignment unit 3 for temporarily placing the picked bare chip D in the middle; a mounting part 4 for picking up the bare chip D of the aligning part and mounting it on the package region P of the substrate 9 or on the already mounted bare chip D; a conveying part 5 for conveying the substrate 9 to the mounting position; a substrate supply unit 6 for supplying a substrate 9 to the transfer unit 5; a substrate carry-out section 7 for receiving the mounted substrate 9; and a control unit 8 for monitoring and controlling the operation of each unit.
The pickup section 2 has: a pick-up head 21 having a collet 22 for sucking and holding the bare chip D pushed by the pushing unit 13 at the tip end, picking up the bare chip D and placing it on the aligning section 3; and a Y drive section 23 of the pickup head that moves the pickup head 21 in the Y direction. The picking is performed based on a classification chart showing the grades of the bare chips which the wafer 11 has. The classification map is stored in the control unit 8 in advance. The pickup head 21 has driving units, not shown, for moving the collet 22 up and down and in the X direction, and is movable up and down and left and right as indicated by arrows in fig. 2.
The alignment section 3 has an intermediate stage 31 on which the bare chip D is temporarily placed, and a stage recognition camera 32 for recognizing the bare chip D on the intermediate stage 31.
The mounting portion 4 has: a mounting head 41 having the same structure as the pickup head 21, picking up the bare chip D from the intermediate stage 31, and mounting it on the package region P of the substrate 9 being conveyed; a collet 42 attached to the tip of the mounting head 41 and configured to hold the bare chip D by suction; a Y drive unit 43 that moves the mounting head 41 in the Y direction; and a substrate recognition camera 44 that takes an image of a position recognition mark (not shown) of the package region P of the substrate 9 that has been conveyed, and recognizes a mounting position of the bare chip D to be mounted. BS shows a mounting area. The mounting head 41 includes driving units, not shown, for moving the collet 42 up and down and in the X direction, and is movable up and down and left and right as indicated by arrows in fig. 11.
With this configuration, the mounting head 41 picks up the bare chip D from the intermediate stage 31 by correcting the pickup position and the attitude based on the imaging data of the stage recognition camera 32, and mounts the bare chip D on the package region P of the substrate 9 based on the imaging data of the substrate recognition camera 44.
Next, a bare chip mounting process in the chip mounter according to modification 3 will be described with reference to fig. 5. The die mounting process of modification 3 is the same as that of embodiment except for the pick-up at step S2.
After the bare chip D to be picked up is accurately placed at the pickup position, the control unit 8 picks up the bare chip D from the dicing tape 16 by the pickup head 21 including the collet 22 and places the bare chip D on the intermediate stage 31 (bare chip handling). The control unit 8 performs imaging by the stage recognition camera 32 and detects a positional deviation (rotational deviation) of the bare chip placed on the intermediate stage 31. When there is a positional deviation, the control unit 8 corrects the positional deviation by rotating the intermediate stage 31 on a surface parallel to the mounting surface having the mounting position by a rotation driving device (not shown) provided on the intermediate stage 31.
The controller 8 picks up the bare chip D from the intermediate stage 31 by the mounting head 41 including the collet 42 (step S2), and performs die bonding on the package region P of the substrate 9 or the bare chip already mounted on the package region P of the substrate 9 (step S5). The die back position may also be checked by the die recognition camera 45 photographing the back of the picked up die D (step S3).
The chip mounter according to modification 3 can perform self-diagnosis in the same manner as in embodiments and modifications 1 and 2. Further, since the chip mounter 10A has the stage recognition camera 32, the self-diagnosis of modifications 1 and 2 can be performed by using the stage recognition camera 32 instead of the bare chip recognition camera 45. The recognition camera 25 that photographs the back surface of the bare chip picked up by the pickup head may be used instead of or in addition to the bare chip recognition camera 45.
The invention made by the present inventors has been specifically described above based on the embodiments, examples, and modifications, but the present invention is not limited to the embodiments, examples, and modifications described above, and it is needless to say that various modifications are possible.
In the modification examples 1 and 2, the die recognition camera for imaging the back surface of the die is used for position recognition of the die before mounting, but a wafer recognition camera may be used.
In addition, a flip-chip bonding machine provided with a flip head (flip head) may be used, in which a driving unit for rotating a collet is provided to be able to reverse the top and bottom of the picked bare chip. The present invention is not limited to the above embodiments, and the mounting portion may be a plurality of mounting portions including a pickup portion, an alignment portion, and a mounting portion, and a conveying line.
Claims (16)
1. A chip mounting apparatus, comprising:
a bare chip supply unit;
a substrate supply unit;
a mounting section that mounts the bare chip supplied from the bare chip supply section onto the substrate supplied from the substrate supply section or onto a bare chip already mounted on the substrate; and
a control section that controls the bare chip supply section, the substrate supply section, and the mounting section,
the mounting portion has:
a mounting head having a collet for sucking the bare chip; and
a first imaging device capable of imaging the substrate and the bare chip mounted on the substrate,
the control unit performs the following operations:
(a) recognizing a position of the substrate by photographing the substrate by the first photographing device before the bare chip is mounted to the substrate,
(b) recognizing positions of the substrate and the bare chip mounted on the substrate by photographing the substrate and the bare chip mounted on the substrate by the first photographing device after the bare chip is mounted on the substrate, checking relative positions of the substrate and the bare chip,
(c) diagnosing a fixed state of the substrate based on a substrate position moving amount which is a difference between the position of the substrate recognized in the (a) and the position of the substrate recognized in the (b),
(d) when the substrate position movement amount is equal to or greater than a predetermined amount, it is determined that the substrate is insufficiently fixed and a warning is issued.
2. The chip mounting apparatus according to claim 1,
when it is determined that the substrate is insufficiently fixed, it is determined that the mechanical clamping of the substrate is insufficient, the fixing by suction of the substrate is insufficient, or the fixing of the first imaging device is insufficient.
3. A chip mounting apparatus, comprising:
a bare chip supply section;
a substrate supply unit;
a mounting section that mounts the bare chip supplied from the bare chip supply section onto the substrate supplied from the substrate supply section or onto a bare chip already mounted on the substrate; and
a control section that controls the bare chip supply section, the substrate supply section, and the mounting section,
the mounting portion has:
a mounting head having a collet for sucking the bare chip; and
a second photographing device capable of photographing the back surface of the bare chip picked up by the mounting head,
the control unit performs the following operations:
(a) recognizing a position of the die by photographing the die by the second photographing device before the die is mounted to the substrate,
(b) diagnosing a pick-up state of the die based on a die position moving amount which is a difference between the position of the die identified in the (a) and a position of the die registered in advance,
(c) when the die position movement amount is equal to or greater than a predetermined amount, it is determined that the die pickup is abnormal, and a warning is issued.
4. The chip mounting apparatus according to claim 3,
and if the bare chip is determined to be abnormal in pickup, determining that the pickup offset of the bare chip or the recognition of the bare chip by the second shooting device is poor.
5. A chip mounting apparatus, comprising:
a bare chip supply section;
a substrate supply unit;
a mounting section that mounts the bare chip supplied from the bare chip supply section onto the substrate supplied from the substrate supply section or onto a bare chip already mounted on the substrate; and
a control section that controls the bare chip supply section, the substrate supply section, and the mounting section,
the mounting portion has:
a mounting head having a collet for sucking the bare chip;
a first imaging device capable of imaging the substrate and the bare chip mounted on the substrate; and
a second photographing device capable of photographing the back surface of the bare chip picked up by the mounting head,
the control unit performs the following operations:
(a) recognizing a position of the substrate by photographing the substrate by the first photographing device before the bare chip is mounted to the substrate,
(b) capturing the die by the second capture device to identify a location of the die,
(c) recognizing positions of the substrate and the bare chip mounted on the substrate by photographing the substrate and the bare chip mounted on the substrate by the first photographing device after the bare chip is mounted on the substrate, checking relative positions of the substrate and the bare chip,
(d) diagnosing a substrate-fixed state and a mounting state based on a die position moving amount which is a difference between the position of the die identified in the step (b) and the position of the die identified in the step (c),
(e) when the die position movement amount is equal to or greater than a predetermined amount, it is determined that the substrate is insufficiently fixed or the mounting is abnormal.
6. The chip mounting apparatus according to claim 5,
when the control part determines that the substrate is insufficiently fixed or abnormally mounted,
calculating a substrate position moving amount which is a difference between the position of the substrate recognized in the step (a) and the position of the substrate recognized in the step (c), and determining that the substrate is not sufficiently fixed when the substrate position moving amount is a predetermined amount or more,
when the substrate position movement amount is less than a predetermined amount, it is determined that mounting is abnormal.
7. The chip mounting apparatus according to claim 6,
and when the mounting is determined to be abnormal, determining that the mounting head or the collet is abnormal or the mounting is not pressed well.
8. The chip mounting device according to any one of claims 1 to 7,
the bare chip supply part holds a wafer ring holding a dicing tape to which the bare chips are attached,
the mounting head picks up the bare chip from the dicing tape.
9. The chip mounting device according to any one of claims 1 to 7,
there are also a pick-up portion and an alignment portion between the bare chip supply portion and the mounting portion,
the pick-up part has a pick-up head having a collet for sucking the bare chip,
the aligning section has an intermediate stage on which a bare chip picked up by the pickup head is placed,
the mounting head picks up the bare chip from the intermediate stage.
10. A method for manufacturing a semiconductor device, comprising:
(a) a step of recognizing the position of a substrate by imaging the substrate by an imaging device;
(b) a step of attaching a bare chip to the substrate or a bare chip already attached to the substrate after the step (a);
(c) a step of, after the step (b), imaging the substrate and the bare chip mounted on the substrate by the imaging device to identify positions of the substrate and the bare chip mounted on the substrate and check a relative position of the substrate and the bare chip; and
(d) a step of diagnosing the fixed state of the substrate based on a substrate position moving amount which is a difference between the position of the substrate recognized in the step (a) and the position of the substrate recognized in the step (c),
in the step (d), when the substrate position movement amount is equal to or greater than a predetermined amount, it is determined that the substrate is insufficiently fixed, and a warning is issued.
11. The method for manufacturing a semiconductor device according to claim 10,
when it is determined that the substrate is insufficiently fixed, it is determined that the mechanical clamping of the substrate is insufficient, the fixing by suction of the substrate is insufficient, or the fixing of the imaging device is insufficient.
12. A method for manufacturing a semiconductor device, comprising:
(a) a step of recognizing the position of a bare chip picked up by a mounting head by photographing the back surface of the bare chip by a photographing device;
(b) a step of attaching the bare chip to a substrate or a bare chip already attached to the substrate after the step (a); and
(c) a step of diagnosing a pick-up deviation of the bare chip or a bare chip recognition state based on the position of the bare chip recognized in the step (a) and a position of a bare chip registered in advance after the step (b),
in the step (c), when the die position movement amount is equal to or greater than a predetermined amount, it is determined that the die pickup is abnormal, and a warning is issued.
13. The method for manufacturing a semiconductor device according to claim 12,
and if the bare chip is judged to be abnormal in pick-up, judging that the pick-up deviation of the bare chip or the recognition of the bare chip of the shooting device is poor.
14. A method for manufacturing a semiconductor device, comprising:
(a) a step of recognizing a position of a substrate by imaging the substrate by a first imaging device;
(b) a step of recognizing the position of a bare chip picked up by a mounting head by photographing the back surface of the bare chip by a second photographing device;
(c) a step of attaching the bare chip to the substrate or already attached to the bare chip of the substrate after the step (a);
(d) a step of, after the step (c), imaging the substrate and the bare chip mounted on the substrate, recognizing positions of the substrate and the bare chip mounted on the substrate, and inspecting relative positions of the substrate and the bare chip; and
(e) a step of diagnosing a substrate recognition and mounting state based on a die position moving amount which is a difference between the position of the die recognized in the step (b) and the position of the die recognized in the step (d),
when the die position movement amount is equal to or greater than a predetermined amount, it is determined that the substrate is insufficiently fixed or the mounting is abnormal.
15. The method for manufacturing a semiconductor device according to claim 14,
in the step (e), when the substrate is determined to be insufficiently fixed or abnormally mounted,
calculating a substrate position moving amount which is a difference between the position of the substrate recognized in the step (a) and the position of the substrate recognized in the step (c), and determining that the substrate is not sufficiently fixed when the substrate position moving amount is a predetermined amount or more,
when the substrate position movement amount is less than a predetermined amount, it is determined that mounting is abnormal.
16. The method for manufacturing a semiconductor device according to claim 15,
when the mounting is determined to be abnormal, it is determined that the mounting head or a collet provided in the mounting head and adsorbing the bare chip is abnormal or mounting is not pressed properly.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017062308A JP6818608B2 (en) | 2017-03-28 | 2017-03-28 | Manufacturing method of die bonding equipment and semiconductor equipment |
| JP2017-062308 | 2017-03-28 |
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| Publication Number | Publication Date |
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| CN108666238A CN108666238A (en) | 2018-10-16 |
| CN108666238B true CN108666238B (en) | 2022-05-27 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201810258963.XA Active CN108666238B (en) | 2017-03-28 | 2018-03-27 | Chip mounting device and method for manufacturing semiconductor device |
Country Status (4)
| Country | Link |
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| JP (1) | JP6818608B2 (en) |
| KR (1) | KR102026145B1 (en) |
| CN (1) | CN108666238B (en) |
| TW (1) | TWI683374B (en) |
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| TWI744849B (en) * | 2019-04-15 | 2021-11-01 | 日商新川股份有限公司 | Bonding device and method for correcting movement amount of bonding head |
| JP7377655B2 (en) * | 2019-09-19 | 2023-11-10 | ファスフォードテクノロジ株式会社 | Die bonding equipment and semiconductor device manufacturing method |
| JP7373436B2 (en) | 2020-03-09 | 2023-11-02 | ファスフォードテクノロジ株式会社 | Die bonding equipment and semiconductor device manufacturing method |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN108666238A (en) | 2018-10-16 |
| JP2018166136A (en) | 2018-10-25 |
| TW201903910A (en) | 2019-01-16 |
| TWI683374B (en) | 2020-01-21 |
| JP6818608B2 (en) | 2021-01-20 |
| KR102026145B1 (en) | 2019-09-30 |
| KR20180109678A (en) | 2018-10-08 |
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