JP2013004738A - 配線基板の製造方法 - Google Patents

配線基板の製造方法 Download PDF

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Publication number
JP2013004738A
JP2013004738A JP2011134312A JP2011134312A JP2013004738A JP 2013004738 A JP2013004738 A JP 2013004738A JP 2011134312 A JP2011134312 A JP 2011134312A JP 2011134312 A JP2011134312 A JP 2011134312A JP 2013004738 A JP2013004738 A JP 2013004738A
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Japan
Prior art keywords
pad
bonding
flux
solder
substrate
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Pending
Application number
JP2011134312A
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English (en)
Japanese (ja)
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JP2013004738A5 (enExample
Inventor
Masahiko Nakamura
昌彦 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2011134312A priority Critical patent/JP2013004738A/ja
Priority to US13/494,744 priority patent/US8580611B2/en
Publication of JP2013004738A publication Critical patent/JP2013004738A/ja
Publication of JP2013004738A5 publication Critical patent/JP2013004738A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2924/151—Die mounting substrate
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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
JP2011134312A 2011-06-16 2011-06-16 配線基板の製造方法 Pending JP2013004738A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2011134312A JP2013004738A (ja) 2011-06-16 2011-06-16 配線基板の製造方法
US13/494,744 US8580611B2 (en) 2011-06-16 2012-06-12 Method for manufacturing wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011134312A JP2013004738A (ja) 2011-06-16 2011-06-16 配線基板の製造方法

Publications (2)

Publication Number Publication Date
JP2013004738A true JP2013004738A (ja) 2013-01-07
JP2013004738A5 JP2013004738A5 (enExample) 2014-06-26

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JP2011134312A Pending JP2013004738A (ja) 2011-06-16 2011-06-16 配線基板の製造方法

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JP (1) JP2013004738A (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI514530B (zh) * 2013-08-28 2015-12-21 威盛電子股份有限公司 線路基板、半導體封裝結構及線路基板製程
CN106571412B (zh) * 2015-10-12 2018-05-01 Lg电子株式会社 用于附接太阳能电池板的互连器的设备和方法
CN115023804A (zh) * 2020-01-23 2022-09-06 罗姆股份有限公司 电子器件和电子器件的制造方法

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Publication number Priority date Publication date Assignee Title
JP2592757B2 (ja) 1992-10-30 1997-03-19 昭和電工株式会社 はんだ回路基板及びその形成方法
KR100642746B1 (ko) * 2004-02-06 2006-11-10 삼성전자주식회사 멀티 스택 패키지의 제조방법
JP4006409B2 (ja) * 2004-03-17 2007-11-14 新光電気工業株式会社 配線基板の製造方法
JP4839138B2 (ja) 2006-06-20 2011-12-21 新光電気工業株式会社 配線基板の製造方法
TWI414580B (zh) * 2006-10-31 2013-11-11 住友電木股份有限公司 黏著帶及使用該黏著帶而成之半導體裝置

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US20120322205A1 (en) 2012-12-20

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