JP2012515443A - メモリデバイス及びメモリデバイスの形成方法 - Google Patents
メモリデバイス及びメモリデバイスの形成方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 51
- 229910052751 metal Inorganic materials 0.000 claims abstract description 132
- 239000002184 metal Substances 0.000 claims abstract description 132
- 239000004065 semiconductor Substances 0.000 claims abstract description 100
- 125000006850 spacer group Chemical group 0.000 claims abstract description 94
- 239000000758 substrate Substances 0.000 claims abstract description 70
- 238000005530 etching Methods 0.000 claims abstract description 32
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 18
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 30
- 229920005591 polysilicon Polymers 0.000 claims description 29
- 238000000151 deposition Methods 0.000 claims description 9
- 239000003989 dielectric material Substances 0.000 claims description 9
- 238000002955 isolation Methods 0.000 claims description 6
- 239000012212 insulator Substances 0.000 claims description 5
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 3
- 229910021193 La 2 O 3 Inorganic materials 0.000 claims description 3
- 229910002367 SrTiO Inorganic materials 0.000 claims description 3
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 3
- 239000000203 mixture Substances 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 1
- 229910003468 tantalcarbide Inorganic materials 0.000 claims 1
- 229910052718 tin Inorganic materials 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 25
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 84
- 239000000463 material Substances 0.000 description 25
- 229920002120 photoresistant polymer Polymers 0.000 description 17
- 230000015654 memory Effects 0.000 description 14
- 238000005229 chemical vapour deposition Methods 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 239000002019 doping agent Substances 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 230000005669 field effect Effects 0.000 description 8
- 150000004767 nitrides Chemical class 0.000 description 8
- 238000001020 plasma etching Methods 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 238000000137 annealing Methods 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- 238000005468 ion implantation Methods 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 239000000969 carrier Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 230000004913 activation Effects 0.000 description 3
- 125000004429 atom Chemical group 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 230000000737 periodic effect Effects 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 239000007943 implant Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 230000006386 memory function Effects 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
- XWCMFHPRATWWFO-UHFFFAOYSA-N [O-2].[Ta+5].[Sc+3].[O-2].[O-2].[O-2] Chemical compound [O-2].[Ta+5].[Sc+3].[O-2].[O-2].[O-2] XWCMFHPRATWWFO-UHFFFAOYSA-N 0.000 description 1
- CEPICIBPGDWCRU-UHFFFAOYSA-N [Si].[Hf] Chemical compound [Si].[Hf] CEPICIBPGDWCRU-UHFFFAOYSA-N 0.000 description 1
- ILCYGSITMBHYNK-UHFFFAOYSA-N [Si]=O.[Hf] Chemical compound [Si]=O.[Hf] ILCYGSITMBHYNK-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 238000000277 atomic layer chemical vapour deposition Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- VKJLWXGJGDEGSO-UHFFFAOYSA-N barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[Ti+4].[Ba+2] VKJLWXGJGDEGSO-UHFFFAOYSA-N 0.000 description 1
- YZYDPPZYDIRSJT-UHFFFAOYSA-K boron phosphate Chemical compound [B+3].[O-]P([O-])([O-])=O YZYDPPZYDIRSJT-UHFFFAOYSA-K 0.000 description 1
- 229910000149 boron phosphate Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000000224 chemical solution deposition Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical class [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000010893 electron trap Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 125000005843 halogen group Chemical group 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- JQJCSZOEVBFDKO-UHFFFAOYSA-N lead zinc Chemical compound [Zn].[Pb] JQJCSZOEVBFDKO-UHFFFAOYSA-N 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- KJXBRHIPHIVJCS-UHFFFAOYSA-N oxo(oxoalumanyloxy)lanthanum Chemical compound O=[Al]O[La]=O KJXBRHIPHIVJCS-UHFFFAOYSA-N 0.000 description 1
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000002294 plasma sputter deposition Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 229910052702 rhenium Inorganic materials 0.000 description 1
- 229910052703 rhodium Inorganic materials 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 1
- CZXRMHUWVGPWRM-UHFFFAOYSA-N strontium;barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Sr+2].[Ba+2] CZXRMHUWVGPWRM-UHFFFAOYSA-N 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 description 1
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Abstract
【解決手段】半導体基板を被う層状ゲート積層体の成形から始まり、層状ゲート積層体の高kゲート電極層上で停止するよう金属ゲート電極層にパターンを形成して、半導体基板上に第1、第2ゲート金属ゲート電極(16、21)を形成するメモリデバイスの製法が提供される。次のプロセスで、高kゲート誘電体層の一部を被う少なくとも1つのスペーサ(55)を第1ゲート電極(16)に形成する。高kゲート誘電体層の露出された残存部分をエッチングし、第1金属ゲート電極のサイドウォールを越えて延びる部分を有する第1高kゲート誘電体(17)及び第2金属ゲート電極(21)のサイドウォールに整合されたエッジを有する第2高kゲート誘電体(22)を形成する。
【選択図】図1
Description
「電界効果型トランジスタ」とは、出力電流、即ち、ソース・ドレイン間電流がゲート電極に印加される電圧により制御されるトランジスタである。電界効果型トランジスタは3つの端子、即ち、ゲート電極、ソース領域、およひ、ドレイン領域を有する。
「ドレイン領域」とは半導体デバイス内のドープされた領域であり、デバイスチャネルの端部に位置し、キャリアはドレイン領域を通じてから半導体から流出する。
「ゲート構造体」とは、電界効果型トランジスタ(FET)のような、半導体デバイスの出力電流(即ち、チャネル内のキャリアの流れ)を制御するために用いられる構造体である。
「ゲート誘電体」とは半導体基板とゲート電極との間の絶縁層である(非常に薄い金属を用い、典型的には300Ω/□を用いる。)
「高k」とは3.9より高い誘電率(k)の誘電材料である。
「金属」とは電気伝導材料であり、電気伝導材料では金属原子が金属結合力により互いに強く結びつき、金属の導電帯と荷電子帯とが重なるエネルギー帯構造であり、そのため、エネルギ―ギャップが存在しない。
「ドーパント領域」とは真性半導体材料の部分であり、その材料の電気伝導性がn型あるいはp型ドーパントに依存する。
「異方性」とはエッチング種を作用させる材料の表面に対する直角方向に沿った材料除去速度が同じ材料の表面に平行な方向に沿った材料除去速度よりも大きい材料除去プロセスを意味する。
「直接物理コンタクト」あるいは「隣接」とは2つの構造体が間に如何なる中間導電性、絶縁性、あるいは半導体性の構造を介在することなく接触することを意味する。
「被って」、「下に」、「頂部に」、および「上に」は隣接する2つの構造体の構造的関係を意味し、導電性、絶縁性、あるいは半導体性の材料が2つの構造体の隣接面に存在するか否かを問わない。
明細書中の「1つの実施例」「一実施例」、「一例としての実施例」等は、記述されている実施例が特定の特徴、構造、或いは特性を有するが、だからと言って、全ての実施例がそのような特定の特徴、構造、或いは特性を必ずしも有さなくともよい。更に、そのような文言は同一の実施例に関するものとは限られない。更には、特定の特徴、構造、或いは、特性が一実施例について述べられている場合、そのような特徴、構造、或いは特性の当業者による他の実施例への応用は、そのような応用が明記されているか否かに依らず、本明細書により開示されているものである。
続いて、ポリシリコン層14がエッチングされて、第1ゲート構造体の第1ポリシリコン層及び第2ゲート構造体の第2ポリシリコン層が形成される。
Claims (15)
- メモリデバイスの形成方法であり、
第1部分及び第2部分を備える半導体基板を用意し、
半導体基板を被う層状ゲート積層体を形成し、この層状ゲート積層体は半導体基板を被う高kゲート誘電体層及び高kゲート誘電体層を被う金属ゲート電極層を備え、
金属ゲート電極層に高kゲート誘電体層上で停止するパターンを形成して、半導体基板の第1部分内に存在する第1金属ゲート電極及び半導体基板の第2部分内に存在する第2金属ゲート電極を形成し、
高kゲート誘電体の一部を被う少なくとも1つのスペーサを第1金属ゲート電極上に形成し、第1金属ゲート電極にも、第2ゲート電極にも、そして、少なくとも1つのスペーサにも被われない高kゲート誘電体の残存部分を露出させ、
高kゲート誘電体の残存部分をエッチングして、第1金属ゲート電極のサイドウォールを越えて延びる部分を有する第1高kゲート誘電体、及び、第2金属ゲート電極のサイドウォールに整合されたエッジを有する第2高kゲート誘電体を形成する、
メモリデバイスの形成方法。 - 半導体基板は半導体オンインシュレータ(SOI)基板或いはバルク半導体基板である請求項1の形成方法。
- 半導体基板の第1部分は半導体基板の第2部分から素子分離領域により分離されている、請求項1又は2の形成方法。
- 層状ゲート積層体の形成は金属電極層を被うポリシリコンの形成を更に含む、請求項1乃至3のいずれか1つの形成方法。
- 少なくとも1つのスペーサの形成は誘電体材料の堆積及び誘電体材料の異方性エッチングを含む、請求項1乃至4のいずれか1つの形成方法。
- 第1金属ゲート電極及び第2金属ゲート電極の形成に続いて、半導体基板の第1部分及び第2部分に横に広がるソース及びドレイン領域を更に形成する、請求項1の形成方法。
- 高kゲート誘電体の一部を被う少なくとも1つのスペーサの第1金属ゲート電極への形成は、第1金属ゲート電極上の第1犠牲スペーサと第2金属ゲート電上の第2犠牲スペーサの形成を含み、更に第2金属ゲート電極から第2犠牲スペーサの除去を含み、第1金属ゲート電極上の第1犠牲スペーサが前記少なくとも1つのスペーサを更に形成する、請求項6の形成方法。
- 第1犠牲スペーサを第1金属ゲート電極上から除去し、第1金属ゲート電極及び第2金属ゲート電極に隣接するオフセットスペーサを形成し、半導体基板の第1部分及び第2部分内に深いソース及びドレイン領域を更に形成する、請求項7の形成方法。
- 第1金属ゲート電極及び第2金属ゲート電極に隣接するオフセットスペーサを形成し、半導体基板の第1部分及び第2部分内に深いソース及びドレイン領域を更に形成する、請求項7の形成方法。
- 第1高kゲート誘電体の第1金属ゲート電極のサイドウォールを越える部分は2nmから40nmの範囲である、請求項1乃至9の何れか1つの形成方法。
- 第1金属ゲート電極上に第1犠牲スペーサを形成し、第2金属ゲート電極上に第2犠牲スペーサを形成し、
第2金属ゲート電極から第2犠牲スペーサを除去し、
高kゲート誘電体の残存部分にエッチングを施し、第1金属ゲート電極のサイドウォールを越えて延びる部分を有する第1高kゲート誘電体を形成するとともに、第2金属ゲート電極のサイドウォールに整合されたエッジを有する第2高kゲート誘電体を形成し、
第1犠牲スペーサを第1金属ゲート電極から除去し、
半導体基板の第1部分及び第2部分内に横に広がるソース及びドレイン領域を形成し、
第1金属ゲート電極及び第2金属ゲートに隣接するオフセットスペーサを形成し、そして、
導体基板の第1部分及び第2部分内に深いソース及びドレイン領域を形成する、
請求項1乃至10の何れか1つの形成方法。 - メモリデバイスであって、
第1部分及び第2部分を有する半導体基板、
半導体基板の第1部分に存在するプログラマブルメモリデバイス、及び、
半導体基板の第2部分に存在する半導体デバイス、
を備え、
プログラマブルメモリテバイスは第1ゲート構造体及び第1ゲート構造体に隣接するスペーサを備え、第1ゲート構造体は第1高kゲート誘電体を被う第1金属ゲート電極を備え、第1高kゲート誘電体の一部は第1ゲート構造体に隣接するスペーサの下に存在し、
半導体デバイスは第2ゲート構造体を備え、第2ゲート構造体は第2高kゲート誘電体を被う第2金属ゲート電極を備え、第2金属ゲート電極のサイドウォールは第2高kゲート誘電体のエッジに整合されている、
メモリデバイス。 - (i)第1ゲート構造体は第1金属ゲート電極を被う第1ポリシリコン層を有し、第2ゲート構造体は第2金属ゲート電極を被う第2ポリシリコン層を有し、
(ii)少なくとも1つの第1金属ゲート電極及び第2金属ゲート電極は、Co、Ni、Ti、W、 Mo、Ta、TiN、TaC、WN、或いはこれらの組合せから構成され、
(iii)少なくとも1つの第1高kゲート誘電体及び第2高kゲート誘電体はHfO2、ZrO2、Al2O3、TiO2、La2O3、SrTiO3、LaAlO3、Y2O3及びこれらの組合せから構成され、或いは、
(iv)第1ゲート構造体に隣接するスペーサの下に存在する第1高kゲート誘電体の部分は第1金属ゲート電極のサイドウォールから測定して2nmから30nmの範囲の長さを有する、
請求項12のメモリデバイス。 - メモリデバイスであって、
ゲート構造体及びゲート構造体に隣接するスペーサを備え、
ゲート構造体は高kゲート誘電体を被う金属ゲート電極を備え、
高kゲート誘電体の一部はゲート構造体に隣接するスペーサの下に存在する、
メモリデバイス。 - 高kゲート誘電体はHfO2、ZrO2、Al2O3、TiO2、La2O3、SrTiO3、LaAlO3、Y2O3及びこれらの混合物から構成され、もしくは、ゲート構造体に隣接するスペーサの下に存在する高kゲート誘電体の部分は金属ゲート電極のサイドウォールから測定して2nmから30nmの範囲の長さをする、またはこれらの両方である、請求項14のメモリデバイス。
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US12/355,954 US8525263B2 (en) | 2009-01-19 | 2009-01-19 | Programmable high-k/metal gate memory device |
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US8629009B2 (en) | 2014-01-14 |
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