JP2012163550A - Semiconductor conveyance fixture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor conveyance fixture in which external connection terminals can accurately be brought into contact with a contact pin of a pre-test socket even in application to a semiconductor having narrow-pitch external connection terminals.SOLUTION: A semiconductor conveyance fixture includes a recess 22 into which a semiconductor integrated circuit (IC) 5 with external connection terminals (51, 52) formed on a bottom face is inserted, a latch 23 which is protruded above the IC 5 when the IC 5 is inserted into the recess 22, and a bottom plate 25 which is disposed on a bottom of the recess 22 and in which through-holes 26 are opened at positions opposed to the external connection terminals.

Description

  The present invention relates to a semiconductor transport jig for transporting a semiconductor, and more particularly to a semiconductor transport jig suitable for transporting a semiconductor integrated circuit in which an interval between external connection terminals is narrow.

Semiconductor integrated circuits (hereinafter referred to as “ICs”) are becoming increasingly highly integrated, but in high-integrated ICs, prior tests such as functional tests and burn-in tests are usually performed before products are shipped. It is.
In such a preliminary test, it is common to inspect a plurality of ICs simultaneously with a plurality of ICs individually mounted on a semiconductor transfer jig mounted on a transfer frame.

  In the preliminary test, in order to connect an IC to be tested and a semiconductor test apparatus (hereinafter referred to as “IC tester”), a plurality of contact pins included in a socket electrically connected to the IC tester and the IC It is necessary to accurately contact the external connection terminals, and it is necessary to accurately position the IC with respect to the semiconductor transfer jig.

  Various semiconductor transfer jigs that can be applied to IC preliminary tests have already been proposed (see, for example, Patent Document 1 and Patent Document 2).

That is, Patent Document 1 discloses a semiconductor transfer jig having at least one gripping mechanism (latch) in the main body.
Further, Patent Document 2 discloses a semiconductor transport jig having a gripping mechanism (latch) capable of gripping the upper surface and lower surface of an IC on a main body.
In any of the above semiconductor transfer jigs, the IC is inserted into the recess of the semiconductor transfer jig, and the IC is positioned with respect to the semiconductor transfer jig by bringing the side wall of the IC into contact with the peripheral wall of the recess of the semiconductor transfer jig. The latch prevents the IC from moving.

Japanese Patent Laid-Open No. 2008-261861 JP 2009-139370 A

  However, the diameter and pitch of connecting terminals to the outside have been reduced, and in particular, a BGA (Ball Grid Array) type semiconductor using solder balls as external connecting terminals or an LGA (Land) using lands as external connecting terminals. In a (grid array) type semiconductor, the pitch interval of solder balls is narrowed from the conventional 1.0 to 0.65 millimeter pitch to 0.5 millimeter pitch or less.

  In addition, positioning the IC external connection terminal with respect to the contact pin with respect to the IC side wall makes it difficult to ensure positioning accuracy. Therefore, in the above-mentioned semiconductor transfer jig, the external connection terminal It has become difficult to accurately contact the contact pins of the socket.

Furthermore, the conventional semiconductor transfer jig as disclosed in the above-mentioned patent document has a configuration in which a contact pin arranged outside the transfer jig is brought into contact with an external connection terminal from below. I had to make the seating part small.
For this reason, when the semiconductor is mounted obliquely with respect to the jig, the semiconductor may fall out of the jig and fall on the IC tester, and a situation has arisen in which the test must be interrupted.

  The present invention has been made in view of the above problems, and even when applied to a semiconductor having an external connection terminal having a narrow pitch of 0.5 millimeter pitch or less, the external connection terminal and the contact pin of the socket are accurately brought into contact with each other. An object of the present invention is to provide a semiconductor transfer jig capable of performing the above.

  Furthermore, an object of this invention is to provide the semiconductor conveyance jig which can hold | grip a semiconductor in a jig | tool reliably.

The semiconductor transport jig according to the present invention has a recess into which a semiconductor integrated circuit having an external connection terminal formed on the bottom surface is inserted, and protrudes above the semiconductor integrated circuit when the semiconductor integrated circuit is inserted into the recess. A bottom plate disposed on the bottom of the recess and having a through-hole drilled at a position opposite to the external connection terminal, to the bottom surface opposite to the top surface of the bottom plate contacting the semiconductor integrated circuit The opening of the through-hole is configured to be tapered.
The semiconductor transfer jig according to the present invention not only prevents the semiconductor integrated circuit from falling out of the semiconductor transfer jig, but also accurately draws the contact pin of the preliminary test socket into the through hole by having the above-described configuration. It will be possible.

In the semiconductor transport jig according to the present invention, the thickness of the bottom plate of the semiconductor integrated circuit when the external connection terminal is pushed down to the contact pin that protrudes from the upper surface of the pre-test socket and is inserted into the through hole. The distance from the bottom surface to the top surface of the preliminary test socket is smaller.
The semiconductor transport jig according to the present invention has the above-described configuration, so that it is possible to prevent the bottom plate from being damaged by the pressing force even when the semiconductor integrated circuit is pressed to the contact pin during the preliminary test.

A semiconductor transport jig according to the present invention is a semiconductor transport jig for a semiconductor integrated circuit in which a BGA type external connection terminal is formed on a bottom surface, the top surface of the bottom plate contacting the semiconductor integrated circuit and the opposite surface of the top surface The opening part of the said through-hole to the lower surface which is is has the structure formed in the taper shape.
Since the semiconductor transfer jig according to the present invention has the above configuration, the BGA type external connection terminal can be accurately drawn into the through hole of the semiconductor transfer jig.

In the semiconductor transfer jig according to the present invention, the vertical length from the upper surface of the tapered portion formed on the upper surface of the bottom plate is such that the maximum diameter portion of the BGA type external connection terminal extends from the bottom surface of the semiconductor integrated circuit. The structure is smaller than the distance.
Since the semiconductor transfer jig according to the present invention has the above configuration, the BGA-type external connection terminal can be accurately positioned in the through hole of the semiconductor transfer jig.

In the semiconductor transfer jig according to the present invention, the vertical length from the lower surface of the tapered portion formed on the lower surface of the bottom plate is such that the contact pin when the BGA connection terminal is pressed onto the contact pin. It has a configuration smaller than the protruding length from the upper surface of the socket for pretest.
The semiconductor transfer jig according to the present invention can reliably contact the BGA type connection terminal and the contact pin by having the above configuration.

The semiconductor transport jig according to the present invention has a configuration in which a gap between the latch and the upper surface of the semiconductor integrated circuit is smaller than a maximum height of the BGA connection terminal from the bottom surface of the semiconductor integrated circuit.
Since the semiconductor transfer jig according to the present invention has the above-described configuration, the semiconductor integrated circuit can be prevented from jumping out of the semiconductor transfer jig during transfer.

According to the semiconductor transfer jig of the present invention, even when applied to a BGA type semiconductor or an LGA type semiconductor having an external connection terminal with a narrow pitch of 0.5 millimeter pitch or less, the external connection terminal and the contact pin of the socket for preliminary test are provided. Can be brought into contact with each other accurately.
Furthermore, according to the semiconductor transfer jig according to the present invention, the semiconductor transfer jig includes the bottom plate, so that it is possible to reliably prevent the semiconductor from falling off.

It is a perspective view which shows the attachment condition to the conveyance frame of the semiconductor conveyance jig which concerns on this invention. It is an upper perspective view of the semiconductor conveyance jig concerning the present invention. It is a downward perspective view of the semiconductor conveyance jig concerning the present invention. It is the fragmentary sectional view (a) before fitting of the semiconductor conveyance jig for BGA type semiconductors and the socket for a preliminary test, and the fragmentary sectional view (b) after fitting. It is the fragmentary sectional view (c) before fitting of the semiconductor conveyance jig for LGA type semiconductors and the socket for a preliminary test, and the fragmentary sectional view (d) after fitting.

  FIG. 1 is a perspective view showing a mounting state of a semiconductor transfer jig according to the present invention to a transfer frame. An aluminum transfer frame 1 has a plurality of (for example, 8 × 8) attachment portions, The semiconductor conveyance jig 2 is screwed to the attachment portion.

FIG. 2 is a top perspective view of the semiconductor transport jig according to the present invention, and a resin-made main body 21 of the semiconductor transport jig 2 has a recess 22 into which an IC is inserted.
A latch 23 is formed at least at one location on the peripheral wall of the recess 22 so as to protrude upward from the IC when the IC is inserted into the recess 22.
The latch 23 is configured to be pulled into the peripheral wall of the recess 22 and to be able to insert an IC when the operation plate 24 covering the upper surface of the main body is pressed.

  That is, when inserting the IC into the semiconductor transfer jig 2, after the operation plate 24 is pressed and the latch 23 is pulled into the peripheral wall of the recess 22, the IC is inserted into the recess 22 and the insertion is completed. The operation plate 24 is released and the latch 23 protrudes above the IC to prevent the IC from jumping out of the semiconductor transfer jig 2 during transfer.

  FIG. 3 is a lower perspective view of the semiconductor transfer jig according to the present invention. The bottom plate 25 arranged at the bottom of the recess 22 has the same number of through-holes 26 as external connection terminals at positions facing each external contact terminal of the IC. Is perforated.

FIG. 4 is a partial cross-sectional view (a) before fitting the semiconductor transport jig and the pre-test socket when a BGA type semiconductor is mounted, and a partial cross-sectional view (b) after fitting. In addition, since a well-known thing is applicable for the socket for a prior test, description of cross-sectional structure is abbreviate | omitted.
The concave portion 22 of the semiconductor transfer jig 2 includes a tapered portion 22a that is inclined from the upper surface to the bottom surface of the semiconductor transfer jig 2, and a vertical wall portion 22b that follows the tapered portion 22a.

The lower end of the vertical wall portion 22b is in contact with the bottom plate 25, and a latch 23 is provided on the tapered portion 22a.
That is, when the IC 5 is inserted from the upper part of the semiconductor transfer jig 2 with the operation plate 24 pushed down and the latch 23 pulled into the peripheral wall of the recess 22, the IC 5 is guided by the taper portion 22 a and mounted on the upper surface of the bottom plate 25. Is done.

At that time, the solder balls 51 arranged on the bottom surface of the IC 5 are fitted into the through holes 26 drilled in the bottom plate 25 of the semiconductor transport jig 2, and the solder balls 51 are positioned with respect to the semiconductor transport jig 2. It will be.
In order to reliably guide the solder ball 51 to the through hole 26, it is desirable to provide an upper tapered portion 26 a at an opening portion of the through hole 26 to the upper surface of the bottom plate 25.

However, the vertical length Hu of the upper taper portion 26 a needs to be smaller than the distance Ru from the bottom surface of the IC 5 of the maximum horizontal diameter portion of the solder ball 51. That is, it is necessary to satisfy Hu <Ru.
This ensures that when the bottom surface of the IC 5 is in contact with the bottom plate 25 of the semiconductor transfer jig 2, the maximum diameter portion of the solder ball 51 enters deeper than the upper taper portion 26a and reaches the through hole 26. This is because the ball 51 is accurately positioned with respect to the semiconductor transport jig 2.

After the IC 5 is mounted on the bottom plate 25, the pressing of the operation plate 24 is released and the latch 23 protrudes from the upper surface of the IC 5.
In order to surely prevent the IC 5 from jumping out of the semiconductor transfer jig 2, the clearance between the upper surface of the IC 5 and the latch 23 needs to be smaller than the maximum height of the solder ball 51 from the lower surface of the IC 5. is there.
Note that the maximum height of the solder balls is 0.27 mm for an IC with a solder ball pitch of 0.5 mm, and the maximum height is 0.18 mm for an IC of 0.4 mm. It is desirable to be about 1 millimeter.

  The pre-test socket 3 that engages with the semiconductor transfer jig 2 has a substantially convex shape, and positioning pins 31 are provided vertically on the bottom plane 3a. Conductive contact pins 32 are embedded in the top plane 3 b of the pre-test socket 3. The contact pin 32 is urged upward by a spring (not shown) built in the pre-test socket 3, and has a predetermined length from the top plane 3 b in a no-load state where it is not in contact with the solder ball 51. It protrudes by (= L).

When the semiconductor transport jig 2 into which the IC 5 is inserted is transported above the pre-test socket 3, a positioning hole drilled in the main body of the semiconductor transport jig 2 and a bottom plane 3 a of the pre-test socket 3 are provided. The positioning pins 31 thus fitted are fitted, and the semiconductor transfer jig 2 is positioned with respect to the pre-test socket 3.
Therefore, the contact pin 32 protruding from the top plane 3 b of the pre-test socket 3 is inserted from below into the through hole 26 formed in the bottom plate 25 of the semiconductor transfer jig 2.

In order to reliably guide the contact pin 32 to the through hole 26, it is desirable to provide a lower tapered portion 26 b at the opening portion of the through hole 26 to the lower surface of the bottom plate 25.
However, the vertical length Hb of the lower taper portion 26 b needs to be smaller than the protruding length L of the contact pin 32. That is, it is necessary to satisfy Hb <L.
This is because when the semiconductor transfer jig 2 is engaged with the pre-test socket 3, the top of the contact pin 32 is inserted into the through hole 26 formed in the bottom plate 25 of the semiconductor transfer jig 2. This is to ensure.

  Since the solder ball 51 of the IC 5 and the semiconductor transfer jig 2 are positioned by the through hole 26 drilled in the bottom plate 25, the solder ball 51 of the IC 5 and the contact pin 32 embedded in the pre-test socket 3 are accurately positioned. It will come into contact.

FIG. 5 is a partial cross-sectional view (c) before fitting the semiconductor transport jig 2 and the pre-test socket 3 when an LGA type semiconductor is mounted, and a partial cross-sectional view (d) after fitting.
The same parts as those in FIG. 4 are denoted by the same reference numerals, and detailed description thereof is omitted.

When the IC 5 is inserted from the top of the semiconductor transfer jig 2 with the operation plate 24 pushed down and the latch 23 pulled into the peripheral wall of the recess 22, the IC 5 is guided by the tapered portion 22 a and mounted on the upper surface of the bottom plate 25. .
At that time, the land 52 disposed on the bottom surface of the IC 5 is positioned on the through hole 26 drilled in the bottom plate 25 of the semiconductor transport jig 2, and the land 52 is positioned with respect to the semiconductor transport jig 2. Become.

After the IC 5 is mounted on the bottom plate 25, the pressing of the operation plate 24 is released and the latch 23 protrudes from the upper surface of the IC 5.
Thereafter, when the semiconductor transport jig 2 is engaged with the pre-test socket 3, the contact pin 32 comes into contact with the land 52.

  In FIG. 5, the land 52 is attached to the outside of the IC5 package, but it is clear that the present invention can be applied even when the land 52 is embedded in the recess of the package. It is.

  In a state where the semiconductor transport jig 2 has completed the engagement with the pre-test socket 3, the lower surface 21 a of the main body 21 of the semiconductor transport jig 2 extends on the bottom plane 3 a of the pre-test socket 3. In this state, the thickness of the bottom plate 25 of the semiconductor transfer jig 2 is set so that the lower surface 25a of the bottom plate 25 of the semiconductor transfer jig 2 does not come into contact with the top plane 3b of the pre-test socket 3. It is desirable to define

  This is because the thickness of the bottom plate 25 of the semiconductor transport jig 2 needs to be extremely thin, 0.5 mm or less, so that the upper surface of the IC 5 is secured to ensure contact between the solder balls 51 or lands 52 and the contact pins 32. This is to prevent the bottom plate 25 from being damaged when a pressing force is applied from the bottom.

After the IC 5 is mounted on the bottom plate 25, the pressing of the operation plate 24 is released and the latch 23 protrudes from the upper surface of the IC 5.
The semiconductor conveyance jig according to the present invention is applicable to a preliminary test of a narrow pitch BGR type IC or LGA type IC, and is industrially useful.

DESCRIPTION OF SYMBOLS 1 ... Conveyance frame 2 ... Semiconductor conveyance jig | tool 3 ... Pre-test socket 4 ... Fastener 5 ... IC (semiconductor integrated circuit)
DESCRIPTION OF SYMBOLS 21 ... Main body 22 ... Concave 23 ... Latch 24 ... Operation board 25 ... Bottom plate 26 ... Through-hole 31 ... Positioning pin 32 ... Contact pin 51 ... Solder ball (external connection terminal)
52 ... Land (external connection terminal)

Claims (6)

A recess into which a semiconductor integrated circuit having an external connection terminal formed on the bottom surface is inserted;
A latch that protrudes above the semiconductor integrated circuit when the semiconductor integrated circuit is inserted into the recess;
A semiconductor transfer jig having a bottom plate disposed at the bottom of the recess and having a through-hole drilled at a position facing the external connection terminal;
A semiconductor transfer jig in which an opening of the through hole is formed in a tapered shape on the bottom surface of the bottom plate that is opposite to the top surface contacting the semiconductor integrated circuit.   The thickness of the bottom plate is such that the external connection terminal protrudes from the top surface of the pre-test socket and is pressed onto the contact pin inserted into the through-hole, from the bottom surface of the semiconductor integrated circuit to the top surface of the pre-test socket. The semiconductor transfer jig according to claim 1, wherein the semiconductor transfer jig is smaller than the distance up to. A semiconductor transport jig for a semiconductor integrated circuit having a BGA type external connection terminal formed on the bottom surface,
The semiconductor transfer jig according to claim 1, wherein an opening of the through hole to an upper surface of the bottom plate that contacts the semiconductor integrated circuit is formed in a tapered shape.   The vertical length from the upper surface of the tapered portion formed on the upper surface of the bottom plate is smaller than the distance from the bottom surface of the semiconductor integrated circuit of the maximum diameter portion of the BGA type external connection terminal. Semiconductor transfer jig.   The vertical length from the lower surface of the tapered portion formed on the lower surface of the bottom plate is such that the contact pin from the upper surface of the pre-test socket when the BGA type external connection terminal is pressed onto the contact pin. The semiconductor conveyance jig of Claim 3 or Claim 4 smaller than protrusion length.   6. The semiconductor transport according to claim 2, wherein a gap between the latch and the upper surface of the semiconductor integrated circuit is smaller than a maximum height of the BGA type external connection terminal from a bottom surface of the semiconductor integrated circuit. jig.

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