KR101340842B1 - Test unit for integrated circuit - Google Patents

Test unit for integrated circuit Download PDF

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Publication number
KR101340842B1
KR101340842B1 KR1020110139251A KR20110139251A KR101340842B1 KR 101340842 B1 KR101340842 B1 KR 101340842B1 KR 1020110139251 A KR1020110139251 A KR 1020110139251A KR 20110139251 A KR20110139251 A KR 20110139251A KR 101340842 B1 KR101340842 B1 KR 101340842B1
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KR
South Korea
Prior art keywords
socket
semiconductor
test unit
dummy jig
unit
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KR1020110139251A
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Korean (ko)
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KR20130071816A (en
Inventor
위성엽
김한일
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(주)마이크로컨텍솔루션
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Priority to KR1020110139251A priority Critical patent/KR101340842B1/en
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433—Sockets for IC's or transistors
    • G01R1/0441—Details
    • G01R1/0466—Details concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks

Abstract

본 발명은 반도체(IC)용 테스트 유닛에 관한 것으로, 더미지그부; 더미지그부가 내장되도록 공간이 형성된 소켓부; 및 상기 소켓부의 일단부에 형성된 다수의 돌기가 외부로 돌출되도록 삽입홈이 형성되는 PCB 기판부; 를 포함하는 것을 특징으로 한다.
이에 의하여, 반도체(IC)의 결함유무를 테스트하는데 필요한 구성요소 중 하나인 소켓의 불량이 방지됨으로써, 소켓의 불량으로 인한 추가되는 제작비용이 저감됨을 제공할 수 있다.
또한, 단위면적당 다수가 실장될 수 있어 생산성이 증가됨으로 소켓에 대한 신뢰성이 향상되는 것을 제공할 수 있다.The present invention relates to a test unit for a semiconductor (IC), the dummy jig unit; A socket part having a space formed therein so as to include a dummy jig part; And a PCB substrate portion having an insertion groove formed to protrude outward from the plurality of protrusions formed at one end of the socket portion. And a control unit.
As a result, the failure of the socket, which is one of the components necessary for testing the presence of a defect in the semiconductor IC, may be prevented, thereby providing an additional reduction in manufacturing cost due to the failure of the socket.
In addition, since a large number per unit area can be mounted, the productivity can be increased, and thus the reliability of the socket can be improved.

Description

반도체(ＩＣ)용 테스트 유닛{TEST UNIT FOR INTEGRATED CIRCUIT}TEST UNIT FOR INTEGRATED CIRCUIT}

본 발명은 반도체(IC)용 테스트 유닛에 관한 것으로, 더욱 상세하게는 반도체(IC)의 결함유무를 테스트하는데 필요한 구성요소 중 하나인 소켓의 불량이 방지됨으로써, 소켓의 불량으로 인한 추가되는 제작비용이 저감되고, 단위면적당 다수가 실장될 수 있어 생산성이 증가됨으로 소켓에 대한 신뢰성이 향상되는 것을 제공하는 반도체(IC)용 테스트 유닛에 관한 것이다.
The present invention relates to a test unit for a semiconductor (IC), and more particularly, to prevent the failure of the socket, which is one of the components necessary for testing the presence of a defect in the semiconductor (IC), the additional manufacturing cost due to the failure of the socket The present invention relates to a test unit for a semiconductor (IC) which provides a reduction in the number of units per unit area, thereby increasing productivity and increasing reliability of a socket.

회로 기판에 장착되기 전에 전기적 특성 및 신뢰성 테스트를 요구하는 반도체(IC)가 테스트의 요구 사항을 만족하는지를 결정하는 검사 회로에 부착된 테스트 기기에 연결되는 것으로, 반도체(IC)를 수용하는 볼 격자 배열(Ball Grid Array: BGA) 또는 핀 격자 배열(Pin Grid Arrray: PGA) 중 하나가 포함되는 반도체(IC)를 테스트하는 반도체(IC)용 테스트 유닛에 전기적으로 연결하는 장치로 이루어진다.A ball grid array containing semiconductors (ICs), connected to a test device attached to an inspection circuit that determines whether a semiconductor (IC) that requires electrical characteristics and reliability testing before being mounted on a circuit board meets the requirements of the test. A device electrically connected to a test unit for a semiconductor (IC) for testing a semiconductor (IC) including one of a (Ball Grid Array (BGA) or a pin grid array (PGA).

일반적으로 반도체(IC)용 테스트 유닛은 반도체(IC)가 회로 기판에 장착되기 전에 전기적 특성 및 신뢰성을 테스트하기 위한 장치이다.In general, a test unit for a semiconductor (IC) is a device for testing electrical characteristics and reliability before the semiconductor (IC) is mounted on a circuit board.

선행기술문헌들의 예로 대한민국등록특허공보 제10-0516714호의 “반도체 장치용 소켓”, 대한민국등록실용신안공보 제20-0406412호의 “반도체칩 검사용 케리어 소켓”, 대한민국공개특허공보 제10-2008-0088996호의 “반도체 소자의 테스트 패턴”등이 있다.As examples of the prior art documents, “ Socket for semiconductor device ” of Korean Patent Publication No. 10-0516714, “ Carrier socket for semiconductor chip inspection ” of Korean Utility Model Publication No. 20-0406412 , Korean Patent Publication No. 10-2008-0088996 " Test Patterns for Semiconductor Devices ", et al.

상기 선행기술문헌들은 반도체(IC)가 회로 기판에 장착되기 전에 전기적 특성 및 신뢰성 테스트를 하는데 필요한 구성요소이다.The prior art documents are necessary components for electrical characteristics and reliability tests before a semiconductor (IC) is mounted on a circuit board.

그러나, 종래의 반도체(IC)를 테스트하는데 필요한 구성요소인 소켓의 내부에 구비된 컨택트 핀이 체결과정에서 외부로 돌출되어 소켓의 불량이 발생되는 문제점이 있다.However, there is a problem in that a contact pin provided inside the socket, which is a component required for testing a conventional semiconductor (IC), protrudes to the outside during the fastening process to cause a defect of the socket.

이로 인해, 소켓의 제작비용이 증가됨으로 소켓에 대한 신뢰성이 저하되는 문제점도 있다.
For this reason, there is a problem that the reliability of the socket is lowered because the manufacturing cost of the socket is increased.

따라서, 본 발명의 목적은 반도체(IC)의 결함유무를 테스트하는데 필요한 구성요소 중 하나인 소켓의 불량이 방지됨으로써, 소켓의 불량으로 인한 추가되는 제작비용이 저감되고, 단위면적당 다수가 실장될 수 있어 생산성이 증가됨으로 소켓에 대한 신뢰성이 향상되는 것을 제공하는 반도체(IC)용 테스트 유닛에 관한 것이다.
Accordingly, an object of the present invention is to prevent the failure of the socket, which is one of the components necessary to test the defect of the semiconductor (IC), thereby reducing the additional manufacturing cost due to the failure of the socket, a large number can be mounted per unit area The present invention relates to a test unit for a semiconductor (IC) that provides increased productivity, thereby increasing reliability of a socket.

상기 목적은, 본 발명에 따라, 더미지그부; 더미지그부가 내장되도록 공간이 형성된 소켓부; 및 상기 소켓부의 일단부에 형성된 다수의 돌기가 외부로 돌출되도록 삽입홈이 형성되는 PCB 기판부; 를 포함하는 것을 특징으로 하는 반도체(IC)용 테스트 유닛에 의하여 달성된다.The above object, according to the present invention, the dummy jig portion; A socket part having a space formed therein so as to include a dummy jig part; And a PCB substrate portion having an insertion groove formed to protrude outward from the plurality of protrusions formed at one end of the socket portion. It is achieved by a test unit for a semiconductor (IC) comprising a.

여기서, 상기 더미지그부는 상부 양단에 결속홈이 형성되는 것이 바람직하다.Here, it is preferable that the coupling jig is formed at both ends of the dummy jig portion.

상기 더미지그부는 하부에 돌출형성되어 상기 소켓부의 내부에 구비된 컨택트 핀과 접촉되는 접촉부가 구성되는 것이 바람직하다.Preferably, the dummy jig portion is formed to protrude in the lower portion and is in contact with a contact pin provided in the socket portion.

그리고, 상기 소켓부는 내부에 구비되어 상기 더미지그부의 결속홈에 장착되는 결속부가 구성되는 것이 바람직하다.
In addition, the socket part is preferably provided inside the binding portion is mounted in the binding groove of the dummy jig portion.

본 발명에 따르면, 반도체(IC)의 결함유무를 테스트하는데 필요한 구성요소 중 하나인 소켓의 불량이 방지됨으로써, 소켓의 불량으로 인한 추가되는 제작비용이 저감됨을 제공할 수 있다.According to the present invention, it is possible to prevent the failure of the socket, which is one of the components necessary for testing the presence of a defect in the semiconductor (IC), it can be provided that the additional manufacturing cost due to the failure of the socket can be reduced.

또한, 단위면적당 다수가 실장될 수 있어 생산성이 증가됨으로 소켓에 대한 신뢰성이 향상되는 것을 제공할 수 있다.
In addition, since a large number per unit area can be mounted, the productivity can be increased, and thus the reliability of the socket can be improved.

도 1은 본 발명에 따른 반도체(IC)용 테스트 유닛의 결합상태를 나타내는 사시도,
도 2는 본 발명에 따른 반도체(IC)용 테스트 유닛의 분리상태를 나타내는 사시도,
도 3은 본 발명에 따른 소켓부에 내장되는 더미지그부의 결속상태를 나타내는 일부 사시도,
도 4는 본 발명에 따른 더미지그부의 하부에 접촉부가 돌출형성된 상태를 나타내는 저면 사시도.1 is a perspective view showing a coupling state of a test unit for a semiconductor (IC) according to the present invention,
2 is a perspective view showing a separated state of a test unit for a semiconductor (IC) according to the present invention;
3 is a partial perspective view showing the binding state of the dummy jig unit built in the socket unit according to the present invention;
Figure 4 is a bottom perspective view showing a state in which the contact portion protrudes on the bottom of the dummy jig portion according to the present invention.

이하에서는 첨부된 도면을 참고하여 본 발명에 대해 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

본 발명에 따른 반도체(IC)용 테스트 유닛은, 도 1 및 도 4에 도시된 바와 같이, 더미지그부(100), 소켓부(200) 및 PCB 기판부(300)를 포함한다.As illustrated in FIGS. 1 and 4, the test unit for a semiconductor (IC) according to the present invention includes a dummy jig part 100, a socket part 200, and a PCB substrate part 300.

반도체(IC: Integrated Circuit)는 집적회로라고도 불리는 것으로, 두 개 이상의 회로소자가 기판 위나 기판 내에 결합된 전자회로이다.An integrated circuit (IC), also called an integrated circuit, is an electronic circuit in which two or more circuit elements are combined on or in a substrate.

더미지그부(100)는 사각형 형상으로 이루어지는 것으로, 아래에서 설명하게 되는 소켓부(200)의 내부를 밀폐시킬 수 있을 정도의 크기로 이루어지고, 더미지그부(100)는 상부 양단에 한 쌍의 결속홈(110)이 형성되어 소켓부(200)에 구비된 결속부(240)를 통해 견고하게 장착된다.The dummy jig part 100 is formed in a quadrangular shape, and has a size enough to seal the inside of the socket part 200 to be described below, and the dummy jig part 100 has a pair of upper ends. The binding groove 110 is formed to be firmly mounted through the binding unit 240 provided in the socket part 200.

결속홈(110)은 소정의 깊이로 형성되면서 결속부(240)의 너비보다 크게 형성되어 장착이 용이해진다.The binding groove 110 is formed to have a predetermined depth and is formed larger than the width of the binding portion 240 to facilitate mounting.

더미지그부(100)는 하부에 돌출형성되어 소켓부(200)의 내부에 구비된 컨택트 핀(230)과 접촉되는 접촉부(120)가 구성되는 것으로, 접촉부(120)의 높이는 접촉되는 컨택트 핀(230)의 돌출높이를 결정한다.The dummy jig part 100 is formed to protrude in the lower portion to be in contact with the contact pins 230 provided in the socket part 200. The height of the contact part 120 is in contact with the contact pins ( Determine the height of protrusion of 230).

접촉부(120)는 더미지그부(100)보다 작게 형성된다.The contact part 120 is formed smaller than the dummy jig part 100.

소켓부(200)는 더미지그부(100)가 내장되도록 공간(210)이 형성되는 것으로, 소켓부(200)는 반도체(IC)의 내구성을 테스트하는데 필요한 구성요소로 번인소켓(Burn-In Socket) 또는 반도체(IC)소켓(IC Socket: Integrated Circuit Socket)이라고 총칭한다.The socket part 200 has a space 210 formed therein so that the dummy jig part 100 is embedded, and the socket part 200 is a burn-in socket as a component necessary to test the durability of the semiconductor IC. ) Or a semiconductor (IC) socket (IC Socket: Integrated Circuit Socket).

소켓부(200)는 일단부에 소정 직경으로 원통형 형상의 다수의 돌기(220)가 구비되되, 다수의 돌기(220)는 소켓부(200)의 하부 각 모서리에 형성된다.The socket 200 is provided with a plurality of protrusions 220 having a cylindrical shape with a predetermined diameter at one end thereof, and the plurality of protrusions 220 are formed at each corner of the lower portion of the socket 200.

소켓부(200)는 내부에 컨택트 핀(230)이 구비되는 것으로, 컨택트 핀(230)은 소켓부(200)의 내부 가장자리에 다수로 구비된다.The socket part 200 is provided with contact pins 230 therein, and the contact pins 230 are provided in plural at the inner edge of the socket part 200.

컨택트 핀(230)은 외부에서 가해지는 전기적 신호를 전달하는 것으로, 전도성이 우수한 구리, 알루미늄 및 은으로 이루어진다.The contact pin 230 transmits an electrical signal applied from the outside and is made of copper, aluminum, and silver having excellent conductivity.

소켓부(200)의 내부에는 내장되는 더미지그부(100)를 장착하기 위해 결속부(240)가 구비되는 것으로, 결속부(240)는 한 쌍으로 이루어지며, 더미지그부(100)를 장착하는 일단부가 유선형 형상으로 이루어지면서 중앙의 일단부가 관통된다.The inside of the socket part 200 is provided with a coupling part 240 to mount the dummy jig part 100 embedded therein, the binding part 240 is formed in a pair, and the dummy jig part 100 is mounted. The one end portion is made in a streamlined shape while the one end portion thereof is penetrated.

결속부(240)는 더미지그부(100)의 결속홈(110)에 장착되는 일단부에 대응되는 다른 일단부가 소켓부(200)의 내측면에 지지되되, 소켓부(200)의 내측면에 지지되는 다른 일단부는 스프링과 같은 탄성체와 결합되어 용이하게 상, 하로 회동된다.The binding part 240 is supported on the inner side of the socket part 200 while the other end corresponding to the one end mounted on the binding groove 110 of the dummy jig part 100 is provided on the inner side of the socket part 200. The other end supported is coupled with an elastic body such as a spring and easily rotated up and down.

PCB(Print Circuit Board) 기판부(300)는 소켓부(200)의 일단부에 형성된 다수의 돌기(220)가 외부로 돌출되도록 삽입홈(310)이 형성되는 것으로, PCB 기판부(300)의 삽입홈(310)은 돌기(220)의 직경보다 크게 형성되어 돌출되는 돌기(220)의 일단부가 용이하게 관통된다.The PCB (Print Circuit Board) substrate portion 300 is formed with an insertion groove 310 so that a plurality of protrusions 220 formed at one end of the socket portion 200 protrude to the outside, the PCB substrate portion 300 Insertion groove 310 is formed larger than the diameter of the protrusion 220 is easily penetrated through one end of the protrusion 220.

PCB 기판부(300)는 넓은 판재형상으로 이루어지는 것으로, 회로, 저항기 및 스위치 등의 전기적 신호를 전달하는 다수의 부품들이 상부 및 하부에 안착된 상태에서 표면실장된다.The PCB substrate 300 is formed in a wide plate shape and is surface-mounted in a state in which a plurality of components for transmitting electrical signals such as circuits, resistors, and switches are mounted on the upper and lower portions thereof.

표면실장은 SMT(Surface Mount Technology)로 PCB 기판부(300)에 안착된 부품들을 납땜(Soldering)하는 것을 의미한다.Surface mounting means soldering the components mounted on the PCB substrate 300 with Surface Mount Technology (SMT).

PCB 기판부(300)는 더미지그부(100)가 소켓부(200)에 내장된 상태에서 소켓부(200)의 하부에 밀착시킨 상태에서 납땜을 하는 것으로, 소켓부(200)의 내부에 구비된 컨택트 핀(230)은 더미지그부(100)로 인해 더 이상 돌출되지 않는다.
The PCB substrate 300 is soldered while being in close contact with the lower part of the socket part 200 while the dummy jig part 100 is embedded in the socket part 200, and is provided in the socket part 200. The contact pins 230 do not protrude anymore due to the dummy jig portion 100.

이러한 구성을 가지는 본 발명에 따른 반도체(IC)용 테스트 유닛의 결합상태에 관하여 설명하면 다음과 같다.Referring to the coupling state of the test unit for a semiconductor (IC) according to the present invention having such a configuration as follows.

우선, 도 1 내지 도 4에 도시된 바와 같이, 반도체(IC)의 결함유무를 테스트하는데 필요한 구성요소 중 하나인 PCB 기판부(300)의 상부에 소켓부(200)를 밀착시키되, 소켓부(200)는 다수의 돌기(220)를 PCB 기판부(300)의 삽입홈(310)과 일치시킨 상태에서 소켓부(200)의 상부를 가압하여 PCB 기판부(300)에 장착시킨다.First, as shown in FIGS. 1 to 4, the socket 200 is in close contact with the upper portion of the PCB substrate 300, which is one of the components required to test the defect of the semiconductor IC. 200 presses the upper portion of the socket portion 200 in a state in which the plurality of protrusions 220 are matched with the insertion groove 310 of the PCB substrate portion 300 to be mounted on the PCB substrate portion 300.

이렇게 PCB 기판부(300)에 장착된 소켓부(200)에는 더미지그부(100)가 내장되는데, 더미지그부(100)를 내장하기 전에 소켓부(200)는 한 쌍의 결속부(240) 일단부를 파지한 상태에서 상부로 들어올려 개폐시킨다.The dummy jig part 100 is embedded in the socket part 200 mounted on the PCB substrate 300. Before the dummy jig part 100 is embedded, the socket part 200 has a pair of binding parts 240. In the state of holding the one end is lifted to the top to open and close.

계폐된 소켓부(200)는 더미지그부(100)를 내부에 안착시키면서 동시에 파지하고 있던 결속부(240)의 일단부를 놓으면 탄성체로 지지된 결속부(240)가 탄성력으로 인해 하부로 내려감으로 더미지그부(100)가 견고하게 장착된다.The closed socket part 200 is placed on the dummy jig part 100 while the one end of the binding part 240 held at the same time, and the binding part 240 supported by the elastic body is lowered downward due to the elastic force. The jig part 100 is firmly mounted.

이와 같이 더미지그부(100)까지 장착된 소켓부(200)는 하부에 장착된 PCB 기판부(300)와의 납땜으로 제작이 마무리된다.In this way, the socket portion 200 mounted up to the dummy jig portion 100 is finished by soldering with the PCB substrate portion 300 mounted below.

이에 본 발명에 따르면, 반도체(IC)의 결함유무를 테스트하는데 필요한 구성요소 중 하나인 소켓의 불량이 방지됨으로써, 소켓의 불량으로 인한 추가되는 제작비용이 저감됨을 제공할 수 있다.Therefore, according to the present invention, it is possible to prevent the failure of the socket, which is one of the components necessary for testing the presence of a defect in the semiconductor (IC), it can be provided that the additional manufacturing cost due to the failure of the socket can be reduced.

또한, 단위면적당 다수가 실장될 수 있어 생산성이 증가됨으로 소켓에 대한 신뢰성이 향상되는 것을 제공할 수 있다.
In addition, since a large number per unit area can be mounted, the productivity can be increased, and thus the reliability of the socket can be improved.

100 : 더미지그부 110 : 결속홈
120 : 접촉부 200 : 소켓부
210 : 공간 220 : 돌기
230 : 컨택트 핀 240 : 결속부
300 : PCB 기판부 310 : 삽입홈100: dummy jig unit 110: binding groove
120: contact portion 200: socket portion
210: space 220: protrusion
230: contact pin 240: binding portion
300: PCB substrate portion 310: insertion groove

Claims (4)

내부에 공간이 형성되고 상기 공간을 둘러싸는 가장자리에 배치된 다수의 컨택트 핀을 구비한 소켓부;
상기 공간에 수용되어 상기 컨택트 핀을 덮는 더미지그부; 및
상기 소켓부의 일단부에 형성된 다수의 돌기와 결합하도록 삽입홈이 형성되는 PCB 기판부; 를 포함하는 것을 특징으로 하는 반도체(IC)용 테스트 유닛.
A socket portion having a space formed therein and having a plurality of contact pins disposed at edges surrounding the space;
A dummy jig part accommodated in the space and covering the contact pin; And
A PCB substrate portion having an insertion groove formed to engage with a plurality of protrusions formed at one end of the socket portion; Test unit for a semiconductor (IC) comprising a.
제 1 항에 있어서,
상기 더미지그부는 상부 양단에 결속홈이 형성되는 것을 특징으로 하는 반도체(IC)용 테스트 유닛.
The method of claim 1,
The dummy jig unit is a test unit for a semiconductor (IC), characterized in that the coupling groove is formed on both upper ends.
제 1 항에 있어서,
상기 더미지그부는 하부에 돌출형성되어 상기 컨택트 핀과 접촉되는 접촉부가 구성되는 것을 특징으로 하는 반도체(IC)용 테스트 유닛.
The method of claim 1,
The dummy jig unit protrudes from a lower portion of the test unit for a semiconductor (IC), characterized in that the contact portion is configured to contact with the contact pin.
제 1 항에 있어서,
상기 소켓부는 내부에 구비되어 상기 더미지그부의 결속홈에 밀착되는 결속부가 구성되는 것을 특징으로 하는 반도체(IC)용 테스트 유닛.The method of claim 1,
The socket unit is provided inside the test unit for a semiconductor (IC), characterized in that the binding portion is configured to be in close contact with the binding groove of the dummy jig portion.
KR1020110139251A 2011-12-21 2011-12-21 Test unit for integrated circuit KR101340842B1 (en)

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KR20190053672A (en) 2017-11-10 2019-05-20 마상동 Temperature test equipment for semiconductor

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KR102048447B1 (en) * 2018-08-01 2019-11-25 주식회사 마이크로컨텍솔루션 Test socket
KR101987913B1 (en) * 2018-08-01 2019-06-12 주식회사 마이크로컨텍솔루션 Test socket

Citations (2)

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Publication number Priority date Publication date Assignee Title
JPH11283713A (en) * 1998-03-03 1999-10-15 Samsung Electronics Co Ltd Socket for integrated circuit, circuit board, and auxiliary circuit board
JP2001093633A (en) 1999-09-27 2001-04-06 Enplas Corp Socket for electric component and contact sheet

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11283713A (en) * 1998-03-03 1999-10-15 Samsung Electronics Co Ltd Socket for integrated circuit, circuit board, and auxiliary circuit board
JP2001093633A (en) 1999-09-27 2001-04-06 Enplas Corp Socket for electric component and contact sheet

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190053672A (en) 2017-11-10 2019-05-20 마상동 Temperature test equipment for semiconductor

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