JP2011515786A5 - - Google Patents

Download PDF

Info

Publication number
JP2011515786A5
JP2011515786A5 JP2011500833A JP2011500833A JP2011515786A5 JP 2011515786 A5 JP2011515786 A5 JP 2011515786A5 JP 2011500833 A JP2011500833 A JP 2011500833A JP 2011500833 A JP2011500833 A JP 2011500833A JP 2011515786 A5 JP2011515786 A5 JP 2011515786A5
Authority
JP
Japan
Prior art keywords
data
memory
latches
volatile memory
during
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2011500833A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011515786A (ja
Filing date
Publication date
Priority claimed from US12/051,462 external-priority patent/US7961512B2/en
Application filed filed Critical
Publication of JP2011515786A publication Critical patent/JP2011515786A/ja
Publication of JP2011515786A5 publication Critical patent/JP2011515786A5/ja
Pending legal-status Critical Current

Links

JP2011500833A 2008-03-19 2009-02-19 ダイナミックデータラッチ要求を備えたキャッシュ操作における適合アルゴリズム Pending JP2011515786A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/051,462 US7961512B2 (en) 2008-03-19 2008-03-19 Adaptive algorithm in cache operation with dynamic data latch requirements
US12/051,462 2008-03-19
PCT/US2009/034573 WO2009117204A1 (en) 2008-03-19 2009-02-19 Adaptive algorithm in cache operation with dynamic data latch requirements

Publications (2)

Publication Number Publication Date
JP2011515786A JP2011515786A (ja) 2011-05-19
JP2011515786A5 true JP2011515786A5 (enExample) 2012-03-15

Family

ID=40547403

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011500833A Pending JP2011515786A (ja) 2008-03-19 2009-02-19 ダイナミックデータラッチ要求を備えたキャッシュ操作における適合アルゴリズム

Country Status (6)

Country Link
US (1) US7961512B2 (enExample)
JP (1) JP2011515786A (enExample)
KR (1) KR20100138943A (enExample)
CN (1) CN102037519A (enExample)
TW (1) TWI382310B (enExample)
WO (1) WO2009117204A1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8130544B2 (en) * 2009-08-17 2012-03-06 Skymedi Corporation Method of reducing bit error rate for a flash memory
US8472280B2 (en) 2010-12-21 2013-06-25 Sandisk Technologies Inc. Alternate page by page programming scheme
US8432740B2 (en) 2011-07-21 2013-04-30 Sandisk Technologies Inc. Program algorithm with staircase waveform decomposed into multiple passes
US8750045B2 (en) 2012-07-27 2014-06-10 Sandisk Technologies Inc. Experience count dependent program algorithm for flash memory
US9934872B2 (en) 2014-10-30 2018-04-03 Sandisk Technologies Llc Erase stress and delta erase loop count methods for various fail modes in non-volatile memory
CN105718452A (zh) * 2014-12-01 2016-06-29 金蝶软件（中国）有限公司 数据查询方法和系统
US9224502B1 (en) 2015-01-14 2015-12-29 Sandisk Technologies Inc. Techniques for detection and treating memory hole to local interconnect marginality defects
US9564219B2 (en) 2015-04-08 2017-02-07 Sandisk Technologies Llc Current based detection and recording of memory hole-interconnect spacing defects
US9269446B1 (en) 2015-04-08 2016-02-23 Sandisk Technologies Inc. Methods to improve programming of slow cells
US9996280B2 (en) 2016-03-15 2018-06-12 Sandisk Technologies Llc Data register copying for non-volatile storage array operations
US9666307B1 (en) * 2016-09-14 2017-05-30 Micron Technology, Inc. Apparatuses and methods for flexible fuse transmission
JP2018156698A (ja) 2017-03-15 2018-10-04 東芝メモリ株式会社 メモリシステム
US10620879B2 (en) * 2017-05-17 2020-04-14 Macronix International Co., Ltd. Write-while-read access method for a memory device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6138206A (en) * 1997-06-12 2000-10-24 International Business Machines Corporation Data register for multicycle data cache read
JP3983969B2 (ja) 2000-03-08 2007-09-26 株式会社東芝 不揮発性半導体記憶装置
KR100454119B1 (ko) * 2001-10-24 2004-10-26 삼성전자주식회사 캐쉬 기능을 갖는 불 휘발성 반도체 메모리 장치 및 그것의 프로그램, 읽기, 그리고 페이지 카피백 방법들
US6687158B2 (en) * 2001-12-21 2004-02-03 Fujitsu Limited Gapless programming for a NAND type flash memory
US6871257B2 (en) * 2002-02-22 2005-03-22 Sandisk Corporation Pipelined parallel programming operation in a non-volatile memory system
EP1610343B1 (en) * 2004-06-24 2007-12-19 STMicroelectronics S.r.l. An improved page buffer for a programmable memory device
US7242620B2 (en) * 2004-10-05 2007-07-10 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device and an operation method thereof
US7206230B2 (en) 2005-04-01 2007-04-17 Sandisk Corporation Use of data latches in cache operations of non-volatile memories
US7447078B2 (en) 2005-04-01 2008-11-04 Sandisk Corporation Method for non-volatile memory with background data latch caching during read operations
US7463521B2 (en) 2005-04-01 2008-12-09 Sandisk Corporation Method for non-volatile memory with managed execution of cached data
US7336543B2 (en) * 2006-02-21 2008-02-26 Elite Semiconductor Memory Technology Inc. Non-volatile memory device with page buffer having dual registers and methods using the same
JP4896569B2 (ja) * 2006-04-10 2012-03-14 株式会社東芝 半導体集積回路装置及びそのダイナミックラッチのリフレッシュ方法
WO2007131062A2 (en) 2006-05-05 2007-11-15 Sandisk Corporation Non-volatile memory with background data latch caching during read operations and methods therefor

Similar Documents

Publication Publication Date Title
JP2011515786A5 (enExample)
US7627712B2 (en) Method and system for managing multi-plane memory devices
KR100878479B1 (ko) 데이터 정보에 따라 프로그램 방식을 결정하는 메모리시스템
US8966163B2 (en) Non-volatile memory device and method for programming the same
KR102319189B1 (ko) 스토리지 장치, 이를 포함하는 스토리지 시스템 및 스토리지 장치의 동작 방법
CN110096908A (zh) 存储装置及存储装置的操作方法
KR102415385B1 (ko) 불휘발성 메모리 장치 및 그것을 포함하는 저장 장치
JP2004164633A5 (enExample)
CN104850514B (zh) 存取闪存的方法及相关的控制器与记忆装置
JP2011524063A5 (enExample)
CN112328507B (zh) 根据取消映射命令管理快闪转换层表更新的存储器子系统
KR20200066911A (ko) 메모리 컨트롤러 및 그 동작 방법
CN110389717A (zh) 存储装置及其操作方法
TWI707268B (zh) 資料儲存裝置及其操作方法
CN112527189A (zh) 存储器装置及其操作方法
CN110175132A (zh) 存储装置及其操作方法
US11281405B2 (en) Controlled die asymmetry during MLC operations for optimal system pipeline
CN109521944A (zh) 数据储存装置以及数据储存方法
US11507289B2 (en) Storage device, controller and method for operating storage device
CN112053711B (zh) 存储器装置以及该存储器装置的操作方法
US8972650B2 (en) Methods and systems for performing efficient page reads in a non-volatile memory
JP2007220274A (ja) 不揮発性メモリ、そのためのデータ有効性を判断する装置及び方法
US12093548B2 (en) Stream oriented writing for improving sequential write and read performance
CN105589810B (zh) 数据储存器件及其操作方法
JP2009503745A5 (enExample)