JP2011514064A - 改良された増幅段用制御ループ - Google Patents
改良された増幅段用制御ループ Download PDFInfo
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- 230000003321 amplification Effects 0.000 title claims description 23
- 238000003199 nucleic acid amplification method Methods 0.000 title claims description 23
- 238000000034 method Methods 0.000 claims abstract description 22
- 230000003111 delayed effect Effects 0.000 claims abstract description 19
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 238000004804 winding Methods 0.000 description 4
- 238000012937 correction Methods 0.000 description 3
- 230000001934 delay Effects 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
- H03F1/0216—Continuous control
- H03F1/0233—Continuous control by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/563—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including two stages of regulation at least one of which is output level responsive, e.g. coarse and fine regulation
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
- H03F1/0216—Continuous control
- H03F1/0222—Continuous control by using a signal derived from the input signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/102—A non-specified detector of a signal envelope being used in an amplifying circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
Abstract
【解決手段】入力信号のレプリカを有する出力信号を生成する方法及び装置が開示される。前記方法は、前記入力信号の低周波成分を表すレプリカ信号を生成する工程と、前記レプリカ信号における誤差を表す誤差信号を生成する工程と、前記レプリカ信号と前記誤差信号とを結合して出力信号を生成する工程とを備え、前記誤差信号を生成する工程は、前記入力信号を遅延した遅延信号を生成する工程と、前記誤差信号である前記出力信号と前記遅延信号との差を決定する工程とをさらに備える。
【選択図】図2
Description
108…高周波増幅器 110…結合器
130…第1回路 132…第2回路
204、205、304…遅延部分 432、444…デジタル−アナログ変換器
434、440…ローパスフィルタ 436…比較器部分
448…アナログ加算増幅器 450…広帯域増幅器
452…変圧器 504…プリディストーション部分
Claims (22)
- a.入力信号を受け、前記信号の低周波成分を表すレプリカ信号を生成する第1回路と、
b.前記入力信号を受け、前記レプリカ信号における誤差を表す誤差信号を生成する第2回路と、
c.前記レプリカ信号と前記誤差信号とを結合して出力信号を生成する結合器と、
を備えた制御段であって、
d.前記第2回路は、
i.前記入力信号を遅延させた遅延信号を生成する遅延段と、
ii.前記出力信号と前記遅延信号とを入力として受け、前記誤差信号を生成する差動部分と、
を備えたことを特徴とする制御段。 - 請求項1記載の制御段において、前記遅延は、前記第1回路の遅延に対応することを特徴とする制御段。
- 請求項1記載の制御段において、前記遅延は、前記誤差信号から低周波誤差を除去するように計算されることを特徴とする制御段。
- 請求項1〜3のいずれか1項に記載の制御段において、前記入力信号は、信号の包絡線を表すことを特徴とする制御段。
- 請求項4記載の制御段において、前記出力信号は、前記包絡線に対応する形状を有する信号であることを特徴とする制御段。
- 請求項1〜5のいずれか1項に記載の制御段において、前記出力信号は、前記入力信号信号の高パワーレプリカであることを特徴とする制御段。
- 請求項1〜6のいずれか1項に記載の制御段において、前記第1回路には、前記出力信号が平坦な振幅及び一定の遅延を有するように前記第1回路に起こる歪を補償するプリ補償/プリディストーション手段が設けられることを特徴とする制御段。
- 請求項1〜7のいずれか1項に記載の制御段において、前記誤差信号は、前記レプリカ信号における前記誤差の高周波成分を表すことを特徴とする制御段。
- a.入力信号を受け、前記入力信号の低周波成分のレプリカである高パワー信号を生成する第1増幅段と、
b.前記入力信号を受け、前記高パワー信号における誤差を表す誤差信号を生成する第2増幅段と、
c.前記高パワー信号と前記誤差信号とを結合して出力信号を生成する結合器と、
を備えた変調器であって、
d.前記第2増幅段は、
i.前記入力信号を遅延させた遅延信号を生成する遅延段と、
ii.前記出力信号と前記遅延信号とを結合して前記誤差信号を生成する差動部分と、
を備え、前記遅延は前記第1増幅段の遅延に対応し、前記遅延によって前記誤差信号から低周波誤差が除去されていることを特徴とする変調器。 - 請求項9記載の変調器において、前記第1増幅段は、切換え器と比較器とを備え、前記比較器は、前記入力信号と前記切換え器の出力とを受けるように接続され、且つ前記入力信号と前記出力との差に対応する差分信号を生成し、前記切換え器に入力することを特徴とする変調器。
- 請求項10記載の変調器において、前記切換え器の前記出力をフィルタリングし、前記第1増幅段の出力を与えるローパスフィルタをさらに備えたことを特徴とする変調器。
- 請求項11記載の変調器において、前記入力信号を前記第1増幅段の前記比較器に与えるローパスフィルタをさらに備えたことを特徴とする変調器。
- 請求項12記載の変調器において、前記第1増幅段には、前記出力信号が平坦な振幅及び一定の遅延を有するように前記第1増幅段に起こる歪を補償するプリ補償/プリディストーション手段が設けられることを特徴とする変調器。
- 入力信号のレプリカを含む出力信号を生成する方法であって、前記方法は、
a.前記入力信号の低周波成分を表すレプリカ信号を生成する工程と、
b.前記レプリカ信号における誤差を表す誤差信号を生成する工程と、
c.前記レプリカ信号と前記誤差信号とを結合して出力信号を生成する工程と、
を備えた出力信号を生成する方法であって、
d.前記誤差信号を生成する工程は、
i.前記入力信号を遅延させた遅延信号を生成する工程と、
ii.前記誤差信号である前記出力信号と前記遅延信号との差を決定する工程と、
をさらに備えることを特徴とする出力信号を生成する方法。 - 請求項14記載の出力信号を生成する方法において、前記遅延は低周波回路の遅延に対応することを特徴とする出力信号を生成する方法。
- 請求項14又は15記載の出力信号を生成する方法において、前記遅延は、前記誤差信号から低周波誤差を除去するように計算されることを特徴とする出力信号を生成する方法。
- 請求項14〜16のいずれか1項に記載の出力信号を生成する方法において、前記入力信号は信号の包絡線を表すことを特徴とする出力信号を生成する方法。
- 請求項17記載の出力信号を生成する方法において、前記出力信号は、前記包絡線に対応する形状を有する信号であることを特徴とする出力信号を生成する方法。
- 請求項14〜18のいずれか1項に記載の出力信号を生成する方法において、前記誤差信号は、前記レプリカ信号における前記誤差の高周波成分を表すことを特徴とする出力信号を生成する方法。
- 請求項14〜19のいずれか1項に記載の方法を行うようにした変調器。
- 請求項14〜19のいずれか1項に記載の方法を行うようにした変調された電源。
- 請求項14〜19のいずれか1項に記載の方法を行うようにした増幅段であって、前記入力信号は増幅される信号の包絡線を表し、前記出力信号は増幅器への供給電力であることを特徴とする増幅段。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0803711.1A GB2457764B (en) | 2008-02-28 | 2008-02-28 | Improved control loop for amplification stage |
GB0803711.1 | 2008-02-28 | ||
PCT/EP2009/052411 WO2009106632A1 (en) | 2008-02-28 | 2009-02-27 | Improved control loop for amplification stage |
Publications (2)
Publication Number | Publication Date |
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JP2011514064A true JP2011514064A (ja) | 2011-04-28 |
JP5634271B2 JP5634271B2 (ja) | 2014-12-03 |
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JP2010548131A Active JP5634271B2 (ja) | 2008-02-28 | 2009-02-27 | 改良された増幅段用制御ループ |
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Country | Link |
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US (2) | US8836422B2 (ja) |
EP (1) | EP2241005B1 (ja) |
JP (1) | JP5634271B2 (ja) |
KR (1) | KR101636437B1 (ja) |
CN (1) | CN101990741B (ja) |
GB (1) | GB2457764B (ja) |
WO (1) | WO2009106632A1 (ja) |
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2008
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2009
- 2009-02-27 US US12/919,525 patent/US8836422B2/en active Active
- 2009-02-27 CN CN200980106934.0A patent/CN101990741B/zh active Active
- 2009-02-27 WO PCT/EP2009/052411 patent/WO2009106632A1/en active Application Filing
- 2009-02-27 KR KR1020107021278A patent/KR101636437B1/ko active IP Right Grant
- 2009-02-27 EP EP09715999.0A patent/EP2241005B1/en active Active
- 2009-02-27 JP JP2010548131A patent/JP5634271B2/ja active Active
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Publication number | Publication date |
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US8836422B2 (en) | 2014-09-16 |
JP5634271B2 (ja) | 2014-12-03 |
CN101990741A (zh) | 2011-03-23 |
US20110089990A1 (en) | 2011-04-21 |
EP2241005B1 (en) | 2015-09-23 |
CN101990741B (zh) | 2014-12-17 |
WO2009106632A1 (en) | 2009-09-03 |
GB2457764B (en) | 2013-01-23 |
GB0803711D0 (en) | 2008-04-09 |
EP2241005A1 (en) | 2010-10-20 |
US20150002233A1 (en) | 2015-01-01 |
KR101636437B1 (ko) | 2016-07-05 |
GB2457764A (en) | 2009-09-02 |
US9356559B2 (en) | 2016-05-31 |
KR20100116686A (ko) | 2010-11-01 |
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