JP2011513959A - Optoelectronic semiconductor body and manufacturing method thereof - Google Patents

Abstract

The present invention is an optoelectronic semiconductor body comprising an essentially flat semiconductor stack (20), the semiconductor stack (20) comprising a first main surface and a second main surface, and electromagnetic radiation. The present invention relates to an optoelectronic semiconductor body comprising an active layer (22, 22 ′) capable of generating Furthermore, the semiconductor body has at least one groove separating the active layer of the semiconductor stack for the purpose of dividing the semiconductor active stack into at least two electrically isolated partial active layers (22, 22 '). It is equipped with. The first and second connection layers (410, 411, 460) arranged on the second main surface are used to connect to the partial active layer. The first and second connection layers for connecting to at least two partial active layers are conductively connected to each other such that the partial active layers form a series connection.
[Selection] Figure 4A

Description

  The present invention relates to an optoelectronic semiconductor body and a method for manufacturing an optoelectronic semiconductor body.

  Optoelectronic semiconductor bodies are used in a wide variety of lighting applications. The optoelectronic semiconductor body is suitable mainly when high luminous efficiency is required in a small space. Examples of using optoelectronic semiconductor bodies are found in projection applications and in the automotive field, particularly in the automotive field with the use of headlights.

International Publication No. 01/39282 Pamphlet US Pat. No. 5,831,277 US Pat. No. 6,172,382 US Pat. No. 5,684,309 EP 09059797 International Publication No. 02/13281 Pamphlet

I. Schnitzer et al., Appl. Phys. Lett. 63 (16) October 18, 1993, pages 2174-2176

  However, there remains a need to provide an optoelectronic semiconductor body that has not only low complexity compared to conventional lighting means, but also improved efficiency.

  These objects are achieved by an optoelectronic semiconductor body and a method for its manufacture according to the independent claims. The features and developments of the invention are each the subject matter of the dependent claims, the disclosure of which is expressly incorporated herein.

  According to the proposed principle, in one embodiment, the optoelectronic semiconductor body is a semiconductor stack that is arranged substantially flat, comprising a first main surface and a second main surface, and electromagnetic radiation. A semiconductor stack having an active layer suitable for generation.

  In this case, the active layer can have a pn junction for generating radiation, a double heterostructure, a single quantum well (SQW) structure, or a multiple well (MQW) structure. The description of quantum well structure does not make any designation with respect to the dimension of quantization. In general, quantum well structures include quantum wells, quantum wires, and quantum dots, and any combination of these structures, among others. Examples of the multiple quantum well structure are described in Patent Document 1, Patent Document 2, Patent Document 3, and Patent Document 4. The disclosures of these documents are incorporated herein by reference.

  In this configuration, the first major surface is configured to emit electromagnetic radiation. Furthermore, at least the active layer of the semiconductor stack is divided into at least two active partial layers by a groove penetrating the active layer, and these partial active layers are electrically insulated from each other. Yes. In other words, the active layer of the semiconductor stacked body is divided by the groove, whereby partial active layers that are electrically insulated from each other are formed in the semiconductor stacked body.

  The optoelectronic semiconductor body further includes a first connection layer and a second connection layer disposed on the second main surface and for forming a connection with the partial active layer. In this case, the expression “connection layer disposed on the second main surface” means that at least a part of the first connection layer and the second connection layer follows the semiconductor stack in the direction from the front surface to the back surface. Means that However, in this case, the first connection layer and the second connection layer are not necessarily directly deposited on the second main surface of the semiconductor stacked body. Furthermore, it is not necessary for the first connection layer and the second connection layer to completely cover the second main surface of the semiconductor stacked body. Instead, the first connection layer and the second connection layer are disposed on at least a part of the second main surface for the purpose of forming a connection with the partial active layer. Therefore, the first connection layer and the second connection layer are closer to the second main surface than the first main surface of the semiconductor stacked body.

  According to the present invention, the first connection layer and the second connection layer, which respectively form a connection with at least two partially active layers that are electrically isolated, are such that the partially active layer forms a series circuit. Are electrically conductively connected to each other.

  In other words, the two connection layers of the partial active layer are connected to each other such that the partial active layer forms a series circuit.

  As described above, the optoelectronic semiconductor body is divided into partial regions that are electrically connected to each other by a plurality of different connection layers, and the partial regions form a series circuit. This achieves a significantly lower current flow of the optoelectronic semiconductor body in the operating mode. The individual partial active regions are connected to each other as a series circuit. Thus, in addition to low current, the optoelectronic semiconductor body can be powered in a voltage-driven manner. As a result, as an example, expensive drive stages and high current sources can be replaced with easily manufactured high voltage sources. Accordingly, the present optoelectronic semiconductor body can be operated with a plurality of different voltages that can be selected according to the division as a result of being divided into partial regions.

  The semiconductor body is preferably monolithically formed, i.e. the semiconductor body has only one body, all the conductive surfaces and active layers are integrated in this body and are continuous during manufacture. Formed. This allows large-area production over the entire wafer, such as the active layer and conductive surface being embodied on a common substrate.

In one shape structure, the semiconductor body is a thin film light emitting diode chip. In particular, the semiconductor body has a carrier substrate on its back surface. In one shape structure, the 1st connection layer and the 2nd connection layer are arranged at least in a part between a semiconductor layered product and a carrier substrate. Thin film light emitting diode chips are distinguished by at least one of the following features.
A reflective layer is deposited or formed in the main area (carrier element, in particular the area facing the carrier substrate) of the semiconductor stack that generates radiation, in particular the epitaxial stack that generates radiation; The reflective layer reflects at least a portion of the electromagnetic radiation generated in the semiconductor stack and returns it to the semiconductor stack.
The thin-film light-emitting diode chip has a carrier element, which is not a growth substrate on which the semiconductor stack is epitaxially grown, but an individual carrier element that is later fixed to the semiconductor stack.
The thickness of the semiconductor stack is in the range of 20 μm or less, in particular in the range of 10 μm or less;
-The semiconductor stack does not have a growth substrate. In this case, “no growth substrate” means that the growth substrate used for growth (when applicable) has been removed from the semiconductor stack or at least significantly thinner. . Specifically, the growth substrate is thinned to such an extent that it cannot support itself alone or in combination with an epitaxial laminate alone. The remaining portion of the growth substrate that remains after being significantly thinned is not particularly suitable for functioning as a growth substrate.
The semiconductor stack comprises at least one semiconductor layer with at least one region having an intermixing structure, which ideally results in an approximately ergodic distribution of light in the semiconductor stack. The connection, ie this mixed structure, exhibits scattering behavior that is essentially an ergodic stochastic process.

  The basic principle of the thin film light emitting diode chip is described in, for example, Non-Patent Document 1, and the disclosure content of this document relating to this is incorporated in this document by reference. Examples of thin film light-emitting diode chips are described in US Pat.

  Thin film light emitting diode chips are a good approximation of Lambertian surface emitters and are therefore very suitable for applications in eg headlights (eg automotive headlights).

  In a further shape structure, the trench extends substantially perpendicular to the active layer of the semiconductor stack. This groove can completely penetrate the active layer of the semiconductor stack.

  The groove can be filled with an electrically insulating material, and its thickness can be several micrometers. The trench preferably penetrates at least the region of the active layer where electromagnetic radiation is generated by recombination of charge carriers. As an alternative, the trench can penetrate vertically over a large depth range of the semiconductor stack, thus dividing the semiconductor stack into partial regions each having a partial active layer. This reduces the leakage current between individual partial regions or partial active layers. As an example, the groove may vertically divide at least one of the two connection layers.

  In one shape structure, the 1st connection layer for forming connection with the 1st partial active layer of at least 2 partial active layers is the 2nd partial active of at least 2 partial active layers A conductive connection is made to a second connection layer for forming a connection with the layer. In other words, the n-type doped region of the first partial active layer is conductively connected to the p-type doped region of the second partial active layer by the connection layer. As a result, a series circuit composed of two partially active layers is formed.

  In order to form a connection with the partial active layer, in one configuration, the second partial element of the second connection layer is passed from the second main surface through the perforation in the partial active layer. It extends towards. As a result, a perforation is formed through the partial active layer, and this perforation can form a connection with a region of the partial active layer close to the first major surface.

  Advantageously, there are no electrical contact locations on the first major surface emitting light of the semiconductor stack and the optoelectronic component. In this way, the risk of some of the electromagnetic radiation emitted by the partially active layer during operation being hidden or absorbed by the electrical contact location is reduced. In one shape structure of the present invention, the first electrical connection layer and the second electrical connection layer are partial elements connected to electrical contact positions on the surface of the semiconductor body opposite to the first main surface, It has. As an alternative, in one shape structure of the present invention, the contact region is arranged alongside the radiation emitting region on the first main surface of the semiconductor body. The contact region is conductively coupled to the first connection layer, the second connection layer, or both.

  Preferably, the first electrical connection layer and / or the second electrical connection layer is made of a conductive mirror layer so that electromagnetic radiation in the direction of the second major surface is reflected in the direction of the first major surface. It can comprise. In another shape structure, the mirror layer is disposed at least at a part between the semiconductor stacked body and the second electrical connection layer. This mirror layer can be semiconductive or electrically insulating. In the latter case, the mirror layer can have a plurality of openings through which the first electrical connection layer and / or the second electrical connection layer form a connection with the semiconductor stack and the partially active layer. ing. Similarly, a lateral current distribution layer can be provided between the semiconductor stack and the first connection layer for the purpose of improving current capture. The current spreading layer can comprise a conductive oxide, but can further comprise a mirror layer and thus serve as a reflective layer.

  As an alternative, the active layer of the semiconductor stack may comprise a plurality of partial active layers stacked vertically. As an example, the active layer can comprise a double heterostructure or multiple quantum wells. Furthermore, the partial regions of the active layer can be doped under different conditions so that electromagnetic radiation having different wavelengths is emitted upon recombination. As an example, partial active layers in different partial regions can be doped under different conditions, so that electromagnetic radiation having different wavelengths is emitted into the individual partial regions.

  For the purpose of improving the emission characteristics, the first main surface of the laminate can be structured. Similarly, a conversion material can be applied to the first major surface for the purpose of converting emitted electromagnetic radiation into second radiation having a different wavelength. With a corresponding suitable conversion material and a suitable material system of the active layer, it is possible to generate white light, for example in a front headlight or a projection system.

  In one method form, the optoelectronic semiconductor body according to the invention is manufactured by epitaxially growing a semiconductor stack on a growth substrate. In this case, the semiconductor stack is grown such that an active layer suitable for generating electromagnetic radiation is formed. Furthermore, for the purpose of forming a connection with the active layer, the first electrical connection layer is deposited on the surface of the semiconductor laminate opposite to the first main surface, and the separation layer and the second electrical connection layer are deposited. In this case, the first electrical connection layer, the separation layer, and the second electrical connection layer are formed so as to overlap at least partially in the lateral direction.

  Furthermore, the method includes the step of forming an electrically insulating trench in at least the active layer of the semiconductor stack for the purpose of dividing the semiconductor stack, in particular the active layer into at least two partial active layers. Therefore, by this step, the semiconductor stacked body is divided into partial regions each having a partial active layer. A connection with these partial active layers is formed by the first connection layer and the second connection layer so that the two partial active layers form a series circuit.

  The step of forming the electrically insulating groove is preferably performed after the step of depositing the first electrical connection layer, whereby the first electrical connection layer is similarly divided. In the subsequent steps of the method, the first electrical connection layer of the first partial region (or forming a connection with the first partial active layer) is used in the second partial region (or the second partial region). It is conductively coupled to a second electrical connection layer (which forms a connection with the partially active layer). As a result, the two partial active layers are connected in series with each other.

  One form of the method includes forming a perforation in the active layer and forming a subelement of the second electrical connection layer in the perforation, wherein the second electrical connection layer is the first by the separation layer. A step of being electrically insulated from the electrical connection layer. The second electrical connection layer forms a connection with the active layer, in particular with the partial active layer, through its partial elements. For this purpose, it is possible to provide perforations in the respective partial active layers in the respective partial regions (formed by grooves) of the semiconductor stack or partial active layer.

  For this purpose, electrically insulating grooves and perforations can be formed by an active layer etching process which is performed together.

  In another method form, the first electrical connection layer is formed as reflective, so that electromagnetic radiation generated in the active layer and emitted in the direction of the surface opposite to the first major surface is generated. Reflected from the first electrical connection layer in the direction of the first main surface.

  In one development, the separating layer is also perforated, which is filled with material. This perforation conductively connects the first connection layer forming a connection with the first partial active layer to the second connection layer forming a connection with the second partial active layer. By doing so, a connection between the partially active layers separated by the trench is formed. These partial layers can be further connected, for example, in a series circuit or a parallel circuit, or both.

  In still another method, a contact panel is formed on a surface opposite to the first main surface, and the contact panels are formed on the first electrical connection layer and the second electrical connection layer, respectively. The individual partial active layers are electrically connected by contact. Accordingly, current can be individually applied to each partial active layer by the individual contact panel. This makes it possible to selectively drive individual partial regions of the semiconductor stacked body. Therefore, in the external electronic circuit, the partial active layer of the semiconductor stacked body in the partial region can be connected in series or in parallel or both depending on the desired application.

  In a further form of the method, after the semiconductor stack is grown, at least a portion of the growth substrate is removed. This removal can take place before or after the individual connection layers are deposited. As an example, this removal can be performed in particular after dividing into individual partial areas and then forming connections with the individual partial areas. The growth substrate can be removed by, for example, a laser lift-off method.

  In one method form, a carrier substrate can be placed on the back side of the semiconductor body before removing the growth substrate. The carrier substrate can be an individual carrier element that is bonded to the semiconductor stack by, for example, a solder layer or an adhesive layer. Furthermore, the carrier substrate can constitute a part of the first connection layer or the second connection layer or both. In a further embodiment, a semiconductive or electrically insulating mirror layer is provided on a part of the back surface of the semiconductor laminate. In the case of an electrically insulating mirror layer, an opening can be provided in the mirror layer, and the active layer can be electrically connected to the first connection layer, the second connection layer, or both through the opening. Accordingly, the first connection layer and / or the second connection layer each include a subelement extending into the opening of the mirror layer.

  Hereinafter, the present invention will be described in detail with reference to the drawings based on various shape structures.

2 illustrates an exemplary embodiment of a method of manufacturing an optoelectronic semiconductor body according to the proposed principle. 2 illustrates an exemplary embodiment of a method of manufacturing an optoelectronic semiconductor body according to the proposed principle. 2 illustrates an exemplary embodiment of a method of manufacturing an optoelectronic semiconductor body according to the proposed principle. 2 illustrates an exemplary embodiment of a method of manufacturing an optoelectronic semiconductor body according to the proposed principle. 2 illustrates an exemplary embodiment of a method of manufacturing an optoelectronic semiconductor body according to the proposed principle. 2 illustrates an exemplary embodiment of a method of manufacturing an optoelectronic semiconductor body according to the proposed principle. 2 illustrates an exemplary embodiment of a method of manufacturing an optoelectronic semiconductor body according to the proposed principle. FIG. 4 shows a cross-sectional view of an optoelectronic semiconductor body according to a further embodiment. FIG. 6 shows a cross-sectional view of an optoelectronic semiconductor body according to a third embodiment. 1 shows a schematic cross-sectional view according to one embodiment. 1 shows a schematic cross-sectional view according to one embodiment. FIG. 4 shows a diagram of an equivalent circuit of the embodiment of FIGS. 4A and 4B. FIG. 4 shows a diagram of an equivalent circuit of the embodiment of FIGS. 4A and 4B. 5 shows a plan view of an optoelectronic semiconductor body divided into four partial regions, corresponding to the cross-sectional views and equivalent circuit diagrams of FIGS. 4A to 4D. FIG. 5 shows a plan view of an optoelectronic semiconductor body divided into four partial regions, corresponding to the cross-sectional views and equivalent circuit diagrams of FIGS. 4A to 4D. FIG. FIG. 4 shows a plan view of an optoelectronic semiconductor body, depicting a plurality of shapes of perforations through an active layer. FIG. 4 shows a plan view of an optoelectronic semiconductor body, depicting a plurality of shapes of perforations through an active layer.

  In the exemplary embodiment, the size relationship of the illustrated elements should in principle be considered not to be true scale. Individual elements (eg, layers) are exaggerated in size or thickness for the purpose of better understanding or for clarity of illustration.

  1A-1G show an exemplary embodiment of a method of manufacturing a monolithic optoelectronic semiconductor body according to the proposed principle.

  The term “monolithic” is to be understood as meaning production in which the individual layers are not formed separately from one another. Rather than individual formation, the deposition or formation of layers takes place on the layer formed in the previous process step, regardless of the function they perform. As a result, the semiconductor body according to the proposed principle is manufactured in successive steps.

  Schematic cross-sectional and plan views at various stages of the method are shown. In particular, for the purpose of clarifying the series circuit formed by the connection layers, two cross-sectional views, each identified by a solid line and a broken line, are shown.

  In this method, first, the semiconductor stacked body 20 is epitaxially grown on the growth substrate 10.

  The semiconductor stack 20 is based on a semiconductor material system that can be doped under different conditions depending on the application. As an example, a group III-V compound semiconductor or a group II-VI compound semiconductor can be used. In the case of this example, the semiconductor stacked body 20 has a thickness between 5 micrometers and 7 micrometers.

  The group III-V compound semiconductor material is composed of at least one element from a group III typical element (for example, Al, Ga, In) and a group V typical element (for example, B, N, P, As). And one element. Specifically, the term “III-V compound semiconductor material” includes a binary comprising at least one element from a Group III typical element and at least one element from a Group V typical element. It includes compounds, ternary compounds, or groups of quaternary compounds, in particular nitride compound semiconductors and phosphide compound semiconductors. Such binary, ternary, or quaternary compounds can further comprise, for example, one or more dopants and additional components. Applicable III-V compound semiconductor materials include, for example, group III nitride compound semiconductor materials and group III phosphide compound semiconductor materials (eg, GaN, GaAs, InGaAlP). Similarly, the material system AlGaN / GaN is included in the compound semiconductor described above.

  Similarly, a II-VI compound semiconductor material includes at least one element from a Group II typical element (eg, Be, Mg, Ca, Sr) and one element from a Group VI typical element (eg, , O, S, Se). Specifically, the II-VI compound semiconductor material includes a binary compound, a three-component compound containing at least one element from a Group II typical element and at least one element from a Group VI typical element. An original compound or a quaternary compound is provided. Such binary, ternary, or quaternary compounds can further comprise, for example, one or more dopants and additional components. Examples of the II-VI group compound semiconductor material include ZnO, ZnMgO, CdS, CnCdS, and MgBeO.

  Depending on the desired wavelength or the desired wavelength spectrum, one or more of the above mentioned compounds can be the material system of the optoelectronic component.

  The illustrated semiconductor stacked body 20 has a first n-type doped layer 21 grown adjacent to the growth substrate 10 made of, for example, sapphire. However, depending on the desired application, a stepwise concentration difference can be provided instead of the uniform doping of the layer 21. A p-type doped layer 23 is bonded to the layer 21, and therefore the p-type doped layer 23 is disposed on the surface of the semiconductor stacked body 20 on the side opposite to the growth substrate 10. Since the doping types of the two layers 21 and 23 are different, an active zone 22 is formed between these layers. The thickness of this active zone 22 depends on the doping of the two layers 21 and 23 to be grown. During operation of this device, charge carriers injected into layer 21 and layer 23 recombine at pn junction 22 and in this process electromagnetic radiation is emitted depending on the band gap of the semiconductor system used. Therefore, the expression of the stacked bodies 21 and 23 includes an active layer. In this example, the active layer is uniformly arranged throughout the optoelectronic semiconductor body.

  In the alternative shape structure, the semiconductor stacked body 2 is formed as an npn stacked body, and a further n-type doped layer is formed on the surface of the p-type doped layer 23 opposite to the n-type doped layer 21. In another configuration, the p-type doped layer 23 is adjacent to the growth substrate 10 and the n-type doped layer 21 is on the opposite side of the growth substrate 10.

In another variation, an additional buffer layer is deposited on the growth substrate 10 made of sapphire before the semiconductor stack 20 is grown. This allows the lattice constant of the semiconductor stack to be grown to be matched to the growth substrate 10, thus reducing stresses and possible defects in the stack. Further, the buffer layer can be undoped or lightly doped n-type (eg, a concentration of 2 × 10 ¹⁷ atoms / cm ³ or less). Although this type of buffer layer is not suitable for allowing the operating current of the semiconductor body to flow through the buffer layer, there is a risk of electrostatic discharge damage or destruction in the completed semiconductor body. To reduce.

  In the form of this method, after the formation of the semiconductor stacked body 20 is completed, the conductive contact layer 30 is deposited on the p-type doped layer 23 of the semiconductor stacked body. The conductive layer 30 can also be reflective, so that electromagnetic radiation emitted in the direction of the conductive layer 30 during operation is reflected by this layer and emitted in the desired direction. This conductive material can comprise, for example, silver or some other reflective material.

  Thereafter, the conductive layer 30 is structured with a photomask, and as an example, regularly arranged circular contact openings 32 are formed. This situation can be confirmed in the plan view of the semiconductor body 1 shown in the center. Further, in this example, the groove 31 is etched in the conductive layer 30 so that the conductive layer is divided into four partial regions as shown in the figure. These partial areas correspond to the final division of the optoelectronic semiconductor body into four partial areas. In the two cross-sectional views, for convenience, the right partial region of the optoelectronic semiconductor body is represented as R, and the left partial region of the optoelectronic semiconductor body is represented as L.

  Thereafter, as shown in FIG. 1B, a plurality of perforations for forming a connection with the layer 21 are formed in the semiconductor stacked body. This step is performed, for example, by appropriately etching the semiconductor stack, and the structured metal layer deposited on the semiconductor stack can serve as an etching mask. The individual perforations 41 penetrate the pn junction 22 of the semiconductor stacked body 2, and are therefore in contact with the n-type doped layer 21. Further, the region of the metal layer groove 31 is also etched so that the groove 42 penetrating the active layer is formed in the semiconductor laminate.

  Furthermore, by suitable methods, it is possible to stop the perforation to form a connection with the semiconductor layer 21 at a certain depth while allowing the groove 42 to reach a much greater depth. is there. As an example, the etching process is stopped when the first depth of the perforations 41 is reached, the perforations are covered with a photomask, and the grooves 42 are further etched to the final depth. Of course, the grooves and perforations can be the same depth from the start. The formed groove 42 divides the optoelectronic semiconductor body into a number of partial regions, and thus the active layer 22 is also separated by the partial active layer. Furthermore, the formation of a plurality of perforations 41 in a plurality of different partial regions of the optoelectronic semiconductor body also leads to a uniform lateral current distribution in the n-type doped layer 21.

  After the etching method for forming the groove 42 and the perforation 41 is completed, a non-conductive layer 40 is deposited, and this layer fills the groove 42 and the perforation 41. This insulating layer can be configured, for example, as a transparent layer, so that individual grooves 42 and perforations 32 are still visible, as shown in the plan view of FIG. 1B.

  In the next step, as shown in FIG. 1C, the insulating layer is removed using a photomask in the region of the conductive layer 30 and the right outer portion of the optoelectronic semiconductor body. In contrast to this, in the region of the perforations 41 and the region of the grooves 42, the insulating material is left as it is, so that corresponding posts 41a, 42a are formed. Similarly, the second layer 23 of the semiconductor stacked body 20 is exposed in the right region of the optoelectronic semiconductor body. This part serves to form a connection with the semiconductor stack in the operation mode of the semiconductor body. At this stage, the exposed lattice-like portion 42a in the region of the groove 42 and the support column 41a in the region of the perforation 41 appear in the plan view.

  After removing the insulating material outside the trenches 42 and outside the perforations 41, an additional conductive connection-forming layer 50 is deposited and structured, as shown in FIG. In the region, an opening 50 a is formed in this layer 50. Correspondingly, a conductive material 51 is deposited on the second layer 23 of the semiconductor layer stack 20 in the right region of the optoelectronic semiconductor body. The material of layer 50 will eventually form one of the two connection layers to form a connection with the partial layer.

  Therefore, the metallic contact connection 50 is disconnected in the region of the groove 42 and the region of the perforation 41 as can be confirmed in the section 1 and the section 2 of the cross-sectional view. This situation can be clearly seen in the plan view of FIG. 1D. In the lower right partial region of the optoelectronic semiconductor body in FIG. 1D, a first contact panel is formed later, while the material deposited in the region 51 constitutes the second contact panel.

  Conductive layer 30 and conductive layer 50 deposited in the previous method step can be deposited by vapor deposition, as an example, and can have different thicknesses. Therefore, in particular, the layer 30 can be made thinner than the conductive layer 50. Furthermore, the conductive layer 30 may be suitable as a current spreading layer for dispersing injected charge carriers in the lateral direction as well as possible. These two layers can comprise the same material or different materials.

  Next, as shown in FIG. 1E, an insulating layer 45 is deposited on the conductive materials 50 and 51. In the region 51, this insulating layer is removed again. As the insulating layer, it is preferable to use the same material as that filling the perforations 41 and the grooves 42. Thereafter, the insulating material 45 in the perforations 41 is etched by a photomask to remove a part. However, the insulating material remains on the wall of the perforation 41 as it is. This etching process can be performed anisotropically, removing the insulating material to the bottom of the perforations 41 in the center of the perforations. The fact that the sidewalls of the perforations are still insulative prevents the occurrence of short circuits with the individual layers of the semiconductor stack 2 due to the material 60 introduced in the next step.

  Thus, in the perforations, a separation layer is formed on a part of the surface of the perforations. The separation layer covers at least a part of the peripheral side wall and the side wall of the perforation 41 in the regions of the metal layer 30, the connection forming layer 50, and the layer 23 of the laminate 20. Further, the separation layer 45 covers the connection forming layer 50 and completely fills the groove 42.

  Thereafter, the perforations 41 are filled with the material 60, thereby forming the connection-forming elements 46 for the first layer 21 of the semiconductor stack 20. According to section 1 of the cross-sectional view of FIG. 1E, the connection formation region 63 is completely filled with the conductive material 60, and therefore the connection formation region 63 is electrically connected to the first layer 21 via the connection element 46a. Form a common connection. Furthermore, the layer 60 is separated in the region of the groove 42 between the right and left partial regions of the optoelectronic semiconductor body.

  An opening 48 is further shown in the plan view of the optoelectronic semiconductor body. As in section 2 of the cross-sectional view, these openings are formed by holes provided in the passivation layer 45 and reaching the connection forming layer 50.

  FIG. 1F shows the structure after further manufacturing steps. A passivation layer is deposited on the layer 60 that connects the region 63 of each partial region to the groove 42 perforations 41. This passivation layer is composed of the same material as layer 45, and holes 48 are still cut away. These holes are filled with conductive material 54 in subsequent steps, as is apparent from the section 2 illustration. Furthermore, a material layer 55 is deposited on the surface of the passivation layer, and there is an electrical connection between the material subelement 56 (coupled to the connection 63) and the material of the subelement 55. Not formed. This step can be performed, for example, by depositing the material flat in the holes and on the surface of the passivation layer 45 and then structuring.

  The layer of subelement 56 is conductively connected to layer 60 in contact with perforations 46 in the right region. Therefore, the layer of the partial element 56 forms a first connection layer for forming a connection with the layer 21 of the stacked body 20. Similarly, the layer 50 in the right partial region R forms a second connection layer for forming a connection through the intermediate layer 30 of the semiconductor stacked body 20. The second connection layer 50 in the right partial region R is connected via an element 54 to the layer 55 in the left partial region L of the optoelectronic semiconductor body. The layer 55 is then conductively connected to the layer 60 in the left partial region L that is in contact with the perforations 46 in the left partial region L of the optoelectronic semiconductor body.

  Therefore, the layer 55 and the layer 60 in the left partial region L form a first connection layer in the left partial region for forming a connection with the partial active layer in the optoelectronic semiconductor body. As is apparent from the above, in the illustrated series circuit, the second connection layer in the right partial region of the optoelectronic semiconductor body is connected to the first connection layer in the second partial region of the optoelectronic semiconductor body. Thus, a series circuit is formed.

  In the next method step, as shown in FIG. 1G, a replacement carrier 80 is fixed to the back surface of the semiconductor laminate 2 opposite to the growth substrate 10 by a solder layer or an adhesive layer. For this purpose, the substitution carrier can be composed of, for example, aluminum nitride or some other material. An insulating replacement carrier substrate 80 (for example, a glass carrier substrate) is particularly suitable for this purpose.

  In the next method step, the growth substrate 10 is thinned and then completely removed. This step can be performed, for example, by a laser lift-off method whose principle is known to those skilled in the art. For this purpose, the growth substrate 10 or the semiconductor stack 20 can have an additional sacrificial layer that decomposes when irradiated by a laser. As a result, the growth substrate 10 is removed.

Thereafter, the light extraction structure portion 25 is formed on the surface of the semiconductor stacked body 20 on the side opposite to the replacement carrier 80. Further, in the region of the groove 42, the semiconductor stacked body is removed from the upper surface, and as a result, a groove-like gap 49 is formed. This gap 49 completely separates the partial region of the semiconductor stack of the optoelectronic semiconductor body, with the result that a leakage current is avoided. The gap 49 can be filled with an insulating material (for example, SiO ₂ ).

  Further, the semiconductor stacked body is removed in the region of the connection contact 63, and as a result, the surface of the material is exposed. As a result, a first contact panel 63 'for forming a connection is formed. Similarly, the second contact panel 63 ″ for forming a connection is formed by removing the material of the semiconductor stack in the same way in a further region of the semiconductor body. As a result of the series circuit formed by the four partial regions of the optoelectronic semiconductor body, the current required for operation can be supplied to all four partial regions by the contact panels 63 ′, 63 ″.

  The optoelectronic semiconductor body shown in FIG. 1G is configured to emit electromagnetic radiation generated in four partial regions during operation in the direction of the structured surface of the semiconductor stack. The electromagnetic radiation emitted in the direction of the substitution carrier 80 in the region of the pn junction 22 is reflected in the direction of the structured surface of the stack 20 in the conductive intermediate layer. As a result of the division into four partial areas, the current of the optoelectronic semiconductor body required for operation is reduced, but the voltage required for operation is increased due to the series circuit. In this exemplary embodiment, the optoelectronic component is divided into four subregions, resulting in a fourfold increase in threshold voltage and a reduction in current consumption by a factor of four. In the case of a material system based on InGaN, a light-emitting component having an operating voltage of 12 volts can be realized in this shape structure.

  In this regard, FIGS. 4A-4F show schematic diagrams of embodiments according to the proposed principle. 4A is a cross-sectional view of the optoelectronic semiconductor body along the direction shown in FIG. 4E. Contacts are formed by contact elements 410 and 411 in the edge region. Contact element 410 is conductively connected to perforations 446 that are in contact with layer 21 of semiconductor stack 20. A pn junction 22 is formed between two layers 21 and 23 of different doping types. In this pn junction, charge carriers injected during operation are recombined to emit electromagnetic radiation. Furthermore, a lateral current spreading layer 450 is arranged on the layer 23, and this current spreading layer is made of the same material as the contact layer 411 of the second partial region of the optoelectronic semiconductor body.

  The second connection layer 460 forms a connection with the current spreading layer 450 in the right partial region of the optoelectronic semiconductor body, and further for the layer 21 ′ of the semiconductor stack in the left partial region of the optoelectronic semiconductor body. The perforated contact connecting portion is formed. Similarly, the second connection layer 410 is connected to the second layer 23 ′ of the semiconductor stacked body 20 ′.

  As shown in the cross-sectional view of FIG. 4A and the plan view of FIG. 4E, an insulating groove is provided between the left partial region and the right partial region of the optoelectronic semiconductor body. Thereby, the partial areas are electrically isolated from one another. In the equivalent circuit diagram according to FIG. 4C, two diodes are connected in series in each partial region. The diode effect in this case is due to the illustrated pn junction of the semiconductor stacked body 20 and the semiconductor stacked body 20 '.

  FIG. 4B shows an alternative shape structure in which a plurality of pn junctions are provided instead of one pn junction. These pn junctions function like two diodes connected in series, as is apparent from the equivalent circuit diagram according to FIG. 4D.

  The cross-sectional view according to FIG. 4B is shown along the axis I shown in FIG. 4F. In this exemplary embodiment, the optoelectronic semiconductor body is divided into four partial regions, each separated by a groove 442. Different connection layers 410, 411, 460, 450 form connections with semiconductor stacks of different partial regions, and a pn junction is arranged in the semiconductor stack. In this case, the connection layers 410, 411, 450, and 470 are configured so that the four partial regions are connected to the state shown in the equivalent circuit diagram of FIG. 4D.

  As a result, in the case of an optoelectronic semiconductor body according to the proposed principle, two diodes connected in series are taken as one set, and a series circuit composed of such four sets is realized. Therefore, a higher operating voltage is required during operation of this device. As a result of the space-saving combination of series circuits in the epitaxial layer, power is supplied to the optoelectronic semiconductor body as a low current voltage drive scheme, eliminating the need for expensive drive stages and high current sources Can do. Furthermore, since all the elements of the light-emitting component can be realized in a low-current manner in the individual semiconductor body, space is optimally used as a result of the absence of absorbent contacts. Furthermore, the series circuit of the chips can be embodied in the form of only one upper contact and one conductive carrier.

  FIG. 2 shows an example of this type.

  The component according to the proposed principle is embodied as a monolithic semiconductor body, i.e. the individual layers are deposited one after the other, not manufactured in individual individual steps and later bonded together. As a result, accuracy is improved and stability is improved.

  Unlike the previous exemplary embodiment, the perforations 203 in the exemplary embodiment according to FIG. 2 are embodied through the active zone 200 as perforations extending through the entire thickness of the semiconductor stack. Therefore, in the case of this example, the perforations 203 extend from the first main region on the upper surface to the second main region 202 of the semiconductor stacked body immediately below. The perforations 203 form holes in the semiconductor stacked body 200.

  A further current spreading layer 209 is deposited on the structured top surface 225 of the semiconductor stack 200. This layer is disposed in addition to the current diffusion layer 209 provided on the back surface of the semiconductor stacked body. The two current spreading layers play a role of distributing current in the lateral direction as well as possible so that the current is taken into the semiconductor stacked body. As a result, not only the efficiency of the components is increased, but also local heat generation as a result of excessive current flowing into the semiconductor stack is avoided. For this purpose, the current spreading layer has the smallest possible lateral sheet resistance.

  Furthermore, the current spreading layer 209 'can be embodied as a transparent material (eg in the form of a transparent conductive oxide (eg ITO)). The current spreading layer 209 on the side opposite to the emission direction is preferably not only reflective but also transparent. When so embodied, the optoelectronic semiconductor body has an additional mirror layer 210, as shown. If no additional insulating passivation layer is provided between the mirror layer 210 and the material of the connection layer 203, the additional mirror layer 210 is preferably embodied as non-conductive. In one embodiment, the mirror layer 210 can comprise the same material as the separation layer 205. This improves the reflection characteristics, for example, when emission parallel to the active layer of the semiconductor stack occurs as a result of reflection at the sidewall.

  For the purpose of forming a connection, the current spreading layer is connected to the electrical connection layer 204 via the feed perforations 210a. Electrical connection layer 204 is coupled to contact element 207 on the back surface by an electrical intermediate layer 208. The contact element 207 also forms a replacement carrier substrate for the optoelectronic semiconductor body (.

  The exemplary embodiment according to FIG. 2 shows only one first partial region of the semiconductor body. A further partial region of the semiconductor body is adjacent to the left side of the first partial region shown in this figure. The further partial region is embodied such that the second connection layer 204 is conductively connected to perforations (not shown) in the semiconductor stack 200. The perforations form a connection with the first layer 221 of the semiconductor stack 200 in the second partial region, thus forming a series circuit. At the same time, the insulating materials 205 and 210 arranged on the left side form a groove separating the semiconductor stacked body into a plurality of partial regions.

  In the exemplary embodiments thus far, the series circuit is realized by a corresponding arrangement of connection layers in the semiconductor body. However, it is further conceivable to form part of various series circuits or interconnections externally for the purpose of realizing series and parallel circuits and combinations thereof. As a result, the characteristic characteristics of the semiconductor body can be changed according to the application by means of the corresponding drive electronics. As an example, in the case of a headlight, it is conceivable to change the light emission intensity by appropriately incorporating or removing individual partial regions of the semiconductor body from the circuit.

  FIG. 3 shows a cross-sectional view of the corresponding embodiment. In this embodiment, all contact elements are arranged on the back side. The semiconductor stacked body 320 includes a first n-type doped layer 321, and a p-type doped layer 323 is deposited adjacent to the layer 321. The pn junction 322 is formed at the interface as illustrated.

  As an example, InGaN / GaN (its emission spectrum is in the range of blue visible light) can be used as the material system of the stack. The deposited structured portion 325 improves the emission characteristics of the optoelectronic semiconductor body. Furthermore, the conversion means can be deposited on the surface of the structured portion 325. As a result, part of the emitted blue light is converted into light having a different wavelength, and thus generation of white light can be realized.

  A conductive and reflective connection layer 330 is disposed on the surface of the second layer 323 of the semiconductor stacked body 320 opposite to the structured portion 325. This connection layer also serves as a lateral current diffusion layer for capturing charge carriers. The connection to the layer 330 is formed by a plurality of lead elements 350, and the lead elements 350 are connected to the contacts 390 disposed on the back surface by the perforations 351.

  Furthermore, perforations 346 are provided and filled with conductive material 361. This perforation extends from the back surface of the semiconductor body through all layers to the layer 321 of the semiconductor stack 320. The side walls of the perforations are substantially completely surrounded by the insulating material 364, for example in order to avoid a short circuit with the connection layer 330. Furthermore, the contact 361 is connected to the back contact 391 on the back surface of the optoelectronic semiconductor body and the conductive material layer 350 '. This material layer 350 'forms a connection with the connection layer 330' in the left partial region of the semiconductor body. The left partial region is completely electrically isolated from the right partial region by an insulating groove 342. The groove 342 is filled with an insulating material, which also fills the gaps between the individual leadthroughs 350 ′, 350. This insulating material can be used as a carrier substrate for the replacement carrier 380 at the same time.

  The conductive layer 350 ′, together with the layer 330 ′, forms the first connection layer in the left partial region of the optoelectronic semiconductor body and forms a connection with the layer 323 of the semiconductor stacked body 320. Similarly, a groove 361 'is also formed in the left partial region of the semiconductor body, and an insulating material is provided on the side wall 346a of the groove. The material of the groove 361 'is in contact with the contact 390' located on the back surface.

  On the outside, the contact 390 'and the contact 391 on the back surface are coupled to an external switch S1 leading to the first connection A1. Contact 390 is coupled to second connection A2. In the operating mode of the device, current is supplied only to the right-hand part of the optoelectronic component or to both parts of the optoelectronic component, depending on the switch position S1. In the illustrated switch position, during the operation of the semiconductor device, current flows into the semiconductor stacked body in the right region of the semiconductor body via the contact 390 and the feed portion 350. At the pn junction of the semiconductor stack, electrical carriers recombine and light is emitted. In operation, at the illustrated switch position, the left partial region of the semiconductor body is off.

  Next, when the connection A1 is coupled to the contact 390 ′ via the switch S1, the current flows through the groove 361 in the right partial region of the semiconductor body and the layer 350 ′ in the left partial region of the semiconductor body and It flows into the first connection layer composed of the layer 330 ′. As a result, the two semiconductor stacks and the pn junctions included in each are connected in series.

  In this way, an externally controlled parallel or series circuit of the individual subregions of the optoelectronic semiconductor body is achieved, depending on the arrangement of the individual connection layers and their contact connections in each subregion. It is possible.

  FIG. 5A and FIG. 5B show variations for dividing the optoelectronic semiconductor body into various partial regions as schematic plan views during the manufacturing process. In addition, a plurality of different shapes of perforations 505 and active layer material 506 exposed by the perforations are shown. Furthermore, contact elements 507 are arranged in the edge regions of the respective semiconductor bodies, and these contact elements later form part of the contact panel 561. In this shape structure, the perforations 505 are embodied in a groove shape and penetrate the insulating layer 541 and the second layer and active zone of the semiconductor stack. Further, the semiconductor body is divided into three partial regions in total by the groove 542, and the central partial region has a considerably small width. With the corresponding interconnections of the connection layer and the external circuit on the outside, it is possible to realize any desired form of series circuit and parallel circuit according to the region shown.

  In the embodiment according to FIG. 5B, the perforations 505 are embodied as regularly arranged circles. The perforation 505 passes through the insulating layer 504 and the second layer and the active zone of the semiconductor stacked body 541 under the insulating layer 504. Also in this exemplary embodiment, a groove 542 is provided that divides the optoelectronic semiconductor body into a plurality of partial regions of different sizes. In this exemplary embodiment, either one of the two sub-regions 1, 2 is interconnected so that it supplies the energy required for its operation, or as a series circuit. Interconnected with the partial region 3. In this case, the interconnection can be made in series or in parallel depending on the desired application.

  The proposed invention, namely, “After dividing the semiconductor body into a plurality of different partial regions by insulating dividing portions, these partial regions are mutually connected in the form of a series circuit or a parallel circuit by appropriately forming connection layers. “Connecting” is not limited to the exemplary embodiments described herein. Rather, the present invention encompasses any combination of possible interconnections, in particular in this case a plurality of different connection layer geometries. After forming the semiconductor stack, any desired interconnection of the semiconductor body can be constructed by corresponding structuring and formation of connection layers.

  After each semiconductor body is manufactured, it is divided into a plurality of different partial regions, resulting in a geometrically dense structure, which results in increased luminous efficiency and can be manufactured cost-effectively. By using LED structures with multiple pn junctions (so-called stepped LEDs) it is possible to achieve a space-saving combination of series and parallel circuits. In particular, interconnections can be made in the epitaxial layer, and it is possible to use conductive carrier materials.

Claims (15)

Optoelectronic semiconductor body,
A substantially flat semiconductor stack comprising a first main surface and a second main surface and an active layer suitable for generating electromagnetic radiation;
A groove that divides at least the active layer of the semiconductor stack and serves to divide the active layer of the semiconductor stack into at least two electrically isolated partial active layers; The groove;
A first connection layer and a second connection layer which are arranged on the second main surface and which serve to form a connection with the partial active layer, each being the at least two portions The first connection layer and the second connection layer forming a connection with the active layer are conductively coupled to each other such that the at least two partial active layers form a series circuit; 1 connection layer and the second connection layer;
With
The first major surface is configured to emit electromagnetic radiation;
Optoelectronic semiconductor body.   The first connection layer for forming a connection with a first partial active layer of the at least two partial active layers is connected to a second partial active layer of the at least two partial active layers. The optoelectronic semiconductor body according to claim 1, wherein the second connection layer for forming a connection is conductively connected.   3. The optoelectronic semiconductor body according to claim 1, wherein the first connection layer, the second connection layer, and the separation layer overlap in a lateral direction.   One of the electromagnetic radiations emitted by the first connection layer and / or the second connection layer or both in a direction toward the second main surface by one of the at least two partial active layers. The optoelectronic semiconductor body according to claim 1, wherein the portion is reflected in the direction of the first main surface.   2. A semiconductor or electrically insulating mirror layer is disposed at least in part between the semiconductor stack and the first electrical connection layer or the second electrical connection layer or both. The optoelectronic semiconductor body according to claim 4.   The semiconductive or electrically insulating mirror layer has a plurality of openings, and the first electric connection layer and / or the second electric connection layer or both extend through the openings to the semiconductor stack. An optoelectronic semiconductor body according to claim 5.   The optoelectronic semiconductor body according to claim 5 or 6, wherein the semiconductive or electrically insulating mirror layer covers 50% or more of the second main surface of the semiconductor stack.   The optoelectronic semiconductor body according to claim 1, wherein the semiconductor laminate has a current diffusion layer adjacent to the second main surface, in particular a conductive oxide.   Each of the first connection layer and the second connection layer for forming a connection with the partial layer of the laminate is suitable for forming an electrical connection with the semiconductor body from the second main surface. The optoelectronic semiconductor body according to claim 1, further comprising a contact region. Each of the first connection layer and the second connection layer is
A partial element forming a lead disposed outside the semiconductor body and connected to a contact on the surface of the semiconductor body;
With
The optoelectronic semiconductor body according to claim 1. A method of manufacturing an optoelectronic semiconductor body comprising:
-Epitaxially growing a semiconductor stack on a growth substrate, said semiconductor stack having an active layer suitable for generating electromagnetic radiation so as to emit electromagnetic radiation from the first main surface The step comprising:
-Forming an electrically insulating groove in at least the active layer of the semiconductor stack for the purpose of dividing it into at least two partially active layers;
-Depositing a first electrical connection layer on the surface of the semiconductor stack opposite to the first main surface for the purpose of forming a connection with the active layer;
-Forming a separation layer on the surface of the semiconductor stack opposite to the first main surface;
-Depositing a second electrical connection layer on the surface of the semiconductor stack opposite to the first main surface;
Contains
The first electrical connection layer, the separation layer, and the second electrical connection layer are formed such that they at least partially overlap in the lateral direction;
The connection layer forms a connection with at least two partially active layers to form a series circuit;
Method. -Forming perforations in the active layer;
-Forming a subelement of the second electrical connection layer in the perforation, wherein the second electrical connection layer is electrically insulated from the first electrical connection layer by the separation layer; Said step;
The method of claim 11, further comprising:   13. A method according to claim 11 or claim 12, wherein the first electrical connection layer is formed as reflective.   Perforations are formed in the separation layer, and the perforations form a connection with the first partial active layer and a connection with the second partial active layer. 14. A method according to any of claims 11 to 13, wherein the method is in conductive connection to one of the second connection layers. -Forming a first contact panel on the surface opposite to the first main surface, wherein the first contact panel forms a connection with the first connection layer; Forming an electrical connection with the first partially active layer, and
-Forming a second contact panel on the surface opposite to the first main surface, wherein the second contact panel forms a connection with the second connection layer; Forming an electrical connection with the second partially active layer, and
15. The method according to any one of claims 11 to 14, further comprising:

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