JP3447527B2 - Semiconductor light emitting device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor element which has a high surge withstand voltage and is highly reliable. SOLUTION: This structure has an additional capacitance part formed between electrodes at p-side and at n-side. Definitely an LED having an n-type GaN semiconductor layer 102 on a sapphire substrate 101, a GaN family active layer 103 and a p-side GaN family semiconductor layer 103 is comprised of an n-side electrode 105 formed on the n-type GaN family semiconductor layer 102 and of an electrode wiring part 108 formed by extended from the upper part of the p-side GaN family semiconductor layer 103 being provided on the n-side electrode 105 via an insulating film 106 to constitute a capacitor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device such as a light emitting diode (LED) made of a compound semiconductor or the like, a semiconductor laser, and more particularly to a semiconductor light emitting device having a pn junction and a method for manufacturing the same. is there.

[0002]

2. Description of the Related Art As semiconductor light emitting devices such as semiconductor light emitting diodes (LEDs) and semiconductor lasers, products having various wavelengths, luminances and light intensities are known by selecting semiconductor materials and their structures.

As an example of a conventional semiconductor light-emitting element, a gallium nitride compound semiconductor _{(In x Ga y A1 1-} xy N:
0 ≦ x ≦ 1, 0 ≦ y ≦ 1) The structure of a light emitting device is shown in FIG. 12 (JP-A-6-338632). This light emitting device has an n-type layer 112 and a p-type layer 11 on a sapphire substrate 101.
4 has a structure in which the p-type layer 114 is sequentially stacked. A part of the p-type layer 114 is etched to expose the n-type layer 112, and the n-side electrode 105 and the p-type layer 114 are formed on the n-type layer 112. A light-transmitting p-side electrode 107 made of a thin metal film is formed on the above. Pedestal electrode 118 formed on the p-side electrode 107
By forming wire bonding including the balls 162 and 161 and the bonding wires 79 and 81 on the n-side electrode 105 and injecting current, recombination emission at the pn junction can be extracted.

[0004]

However, as a result of the inventors' empirical studies on the reliability of such an element, the characteristics such that the luminous efficiency is easily extremely reduced by applying a high voltage. It became clear that deterioration would occur. In particular, such deterioration occurs even when touched by the human body, switching for starting / stopping element operation, insertion / removal into / from the socket, soldering, and application of instantaneous voltage (surge) generated in the drive circuit, etc. It turned out that there was a problem of having to pay particular attention. It has been revealed that such a problem is humble in a light emitting element formed on an insulating substrate and having both p-side and n-side electrodes arranged on the same plane side. In particular, it was also clarified that such a problem remarkably appears in a light emitting element using a translucent electrode made of a thin film metal.

The present invention has been made in view of such circumstances, and an object of the present invention is to easily handle a semiconductor light emitting device which is less likely to deteriorate even when an instantaneous voltage (surge) is applied. An object is to provide an element and a manufacturing method thereof.

[0006]

In order to achieve the above object, a semiconductor light emitting device according to the present invention is a semiconductor light emitting device 1 such as a semiconductor laser or an LED having at least a p-side electrode and an n-side electrode, The first feature is that an additional capacitance portion 2 is formed between the p-side electrode and the n-side electrode as shown in FIG. The capacitance value Cex of the capacitance unit 2 is
As shown in FIG. 1B, it is preferable that the specific capacitance value Ci inherent in the semiconductor light emitting element is equal to or more than that. Here, the intrinsic capacitance value Ci is Ci when the semiconductor light emitting element 1 is expressed by an equivalent conductance G and an equivalent capacitance Ci, and is specifically a general term for the diffusion capacitance of the pn junction, the junction capacitance, and other stray capacitances. . That is, it refers to the equivalent capacitance Ci obtained by separating the equivalent conductance G when the impedance of the semiconductor light emitting device is measured. The value of Cex is almost the same as the value of Ci (Cex to Ci)
Or, if it is several times or more of Ci, the surge withstand voltage is improved as shown in FIG. This is because the additional capacitance Cex is connected in parallel between the electrodes facing each other and is superimposed on the capacitance Ci specific to the pn junction of the device, thereby increasing the capacitance of the entire device. That is, it is considered that as the capacitance increases, the response of the current to the momentary voltage application becomes slower, and the deterioration of the characteristics of the element due to the migration of the metal or the multiplication of defects caused by the current is suppressed.

This additional capacitance is shown in FIGS.
As shown in FIG. 3, an n-side electrode (first electrode) 105, and an electrode wiring portion 108 extended from the p-side electrode (second electrode) via an insulating film 106 on the n-side electrode 105, n
Insulating film 106 between the side electrode 105 and the electrode wiring portion 108
A parallel plate type capacitor may be constituted by and, as shown in FIGS.
As shown in, a parallel plate type capacitor may be configured by the p-side electrodes 108, 128, 137, the insulating film 106 on the p-side electrode, and the electrode wiring portion 105 extended from the n-side electrode. Alternatively, as shown in FIG. 11, an external capacitor Cex may be connected between the leads (external electrodes) of the package. Any other method may be used, and in any case, the object of the present invention can be achieved if an additional capacitance is formed between the p-side electrode and the n-side electrode.

The light emitting device of the present invention is a gallium nitride (GaN) -based compound semiconductor, an indium-gallium-aluminum-phosphorus (InGaAlP) -based compound semiconductor,
It is also effective for gallium / aluminum / arsenic (GaAlAs) based compound semiconductors. Further, it goes without saying that the present invention can be applied to a light emitting diode (LED) having a homojunction structure, a single hetero (SH) structure, a double hetero (DH) structure, and a semiconductor laser. Further, in these LEDs and semiconductor lasers, an n-side wiring (first wiring) and a p-side wiring (second wiring) formed on a predetermined wiring board or a heat sink, an n-side electrode and a p-side electrode are solder balls. It may be a flip chip type in which they are connected to each other via protrusions such as.

A second feature of the present invention is that the first conductive type first semiconductor layer formed on a predetermined substrate and the second conductive type second semiconductor layer formed on the first semiconductor layer. A semiconductor layer; a groove penetrating the second semiconductor layer to reach the first semiconductor layer; a first electrode formed in contact with the first semiconductor layer exposed at the bottom of the groove; and a second semiconductor In the semiconductor light emitting device, which is composed at least of a second electrode formed on the upper part of the layer, an additional capacitance part is formed between the first electrode and the second electrode. The first conductivity type is, for example, n-type, and is the p-type which is the opposite conductivity type to the second conductivity type. However, it goes without saying that p and n may be reversed.

As shown in FIGS. 2, 4 and 5, the additional capacitance portion includes a first electrode 105, an insulating film 106 formed on the first electrode 105, and a second electrode 107. You may comprise by the extended electrode wiring part 108.
In addition, as shown in FIGS.
8, 137 and the insulating film 10 formed on the second electrode
6 and the electrode wiring portion 105 extended from the first electrode
You may comprise by. Further, as shown in FIG. 10A, an insulating film 106 formed in contact with the first semiconductor layer 102, and an electrode wiring portion 108 extended from the second electrode 107 on the insulating film 106. , The first electrode 105 formed in contact with the surface of the first semiconductor layer 102 on which the insulating film 106 is not formed, and the first semiconductor layer 102.
You may comprise by. Alternatively, as shown in FIG. 10B, an electrode wiring portion 108 extended from the second electrode 107 so that an additional capacitance portion is in contact with the first semiconductor layer 102, and a position different from the electrode wiring portion 108. Of the first electrode 10 formed in contact with the upper portion of the first semiconductor layer 102 of
5 and the first semiconductor layer 102.

In the second feature, when the second electrode 107 is a translucent electrode, the electrode wiring portion 108 extended from the second electrode 107 receives light from the translucent electrode 107. It is preferably arranged so as to be taken out (so as to increase the aperture ratio of the translucent electrode) and electrically connected to the second electrode 107. In particular, the electrode wiring portion 10
8 is the second semiconductor layer 104 as shown in FIGS.
It is preferable that it is formed in a frame shape in the peripheral portion.
However, since it is only necessary to be electrically connected to the second electrode 107, it is not always necessary to form it on the entire periphery (four sides). The second feature of the present invention is more effective when the substrate 101 is an insulating substrate such as a sapphire substrate. This is because the problem of surge withstand voltage is remarkable in the light emitting element formed on the insulating substrate. If the flip-chip type is used, light can be extracted from the sapphire substrate side, and it is possible to secure a sufficiently large area for forming the additional capacitance section.

The semiconductor light emitting device according to the second aspect of the present invention has a single hetero (SH) structure and a double hetero (D) structure.
H) The structure may be used. In the case of the DH structure, as shown in FIG. 2, the first semiconductor layer is replaced with the first cladding layer 102,
The second semiconductor layer is the second clad layer 104, and the active layer 1 made of a semiconductor having a forbidden band width Eg between the first and second clad layers is smaller than that of the first and second clad layers.
03 may be formed.

A third feature of the present invention relates to the method for manufacturing a semiconductor light emitting device described above, and is characterized in that it specifically comprises the following steps. That is, (a) a first semiconductor layer of the first conductivity type on an insulating substrate, a semiconductor to which impurities are not intentionally added (so-called “undoped semiconductor”),
Alternatively, a step of continuously growing a layered body including at least an active layer made of a semiconductor or the like doped to a predetermined impurity density, a second semiconductor layer of the second conductivity type, and (b) penetrating the second semiconductor layer and the active layer. A step of forming a groove portion reaching the first semiconductor layer by (c) a step of forming a first electrode in contact with the first semiconductor layer on the bottom of the groove portion, and (d) a step of forming a first electrode on the second semiconductor layer. The step of forming the second electrode, (e) the step of forming an insulating film on the upper part of the first electrode and the side wall of the groove, and (f) from the second electrode to the insulating film on the upper part of the first electrode. At least a step of forming an reaching electrode wiring portion is included. Either of the step (c) of forming the first electrode and the step (d) of forming the second electrode may be performed first. For continuous growth of the first semiconductor layer, the active layer, and the second semiconductor layer, an epitaxial growth technique such as MOCVD may be used. The groove may be formed by using dry etching such as RIE or wet etching.

To form an insulating film on the side wall of the groove, an insulating film such as SiO ₂ is deposited on the entire surface by a CVD method or the like, and RI is used.
When highly directional etching such as E is performed, the insulating film remains on the side wall. As described above, according to the third feature of the present invention, it is possible to extremely easily manufacture the semiconductor light emitting device.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. In the description of the drawings, the same or similar parts are designated by the same or similar reference numerals. However,
The drawings are schematic, the relationship between thickness and plane dimensions,
It should be noted that the ratio of the thickness of each layer is different from the actual one. Therefore, the specific thickness and dimensions should be determined in consideration of the following description. Further, it is needless to say that the drawings include portions having different dimensional relationships and ratios.

(First Embodiment) FIG. 2A is a perspective view (inclined view) of a short wavelength LED according to a first embodiment of the present invention, and FIG. 2B is a plan view thereof. It is a top view). FIG. 2C is a sectional view in the XY direction shown in FIG.

The short wavelength L according to the first embodiment of the present invention
The ED comprises a sapphire substrate 101, a first clad layer (first semiconductor layer) 102 made of an n-type gallium nitride (GaN) -based semiconductor, an active layer 103 made of a GaN-based semiconductor, and a p-type GaN-based semiconductor. A second cladding layer (second semiconductor layer) 104 made of a semiconductor is formed. The n-side electrode (first electrode) 105 is formed by etching a part of the surfaces of the second clad layer (p-type clad layer) 104, the active layer 103, and the first clad layer (n-type clad layer) 102. It is formed at the bottom of the formed groove (U groove). The groove has a sidewall that is substantially vertical. A light-transmitting p-side electrode (second electrode) 107 is formed on the p-type cladding layer 104, and a frame-shaped electrode wiring portion 108 is further formed thereon.
Are formed. The p-side electrode 107 is made of, for example, ITO.
Or a transparent electrode such as SnO ₂ or a translucent thin film such as Ni / Au, and the second p-side electrode 108 is a metal such as Ti / Au. The electrode wiring portion 108 is formed so as not to shield the p-side electrode 107 as much as possible, that is, to have a large aperture ratio. Light is extracted through the translucent p-side electrode 107 on which the electrode wiring portion 108 is not formed.

An insulating film 106 such as SiO ₂ is formed on the n-side electrode 105, and the electrode wiring portion 108 extends from the upper portion of the second cladding layer 104 to the bottom of the groove in which the n-side electrode 105 is formed. It is formed by extension. That is,
The electrode wiring portion 108, the insulating film 106, and the n-side electrode 105 form an additional capacitance portion (parallel plate type capacitor) Cex. The surface of the electrode wiring portion 108 at the bottom of the groove and the surface of the n-side electrode 105 on which the electrode wiring portion 108 is not formed also serve as a bonding pad, and an Au wire or the like is wire-bonded thereto.

At this time, the resistance to the surge voltage of the element can be improved by controlling the material and thickness of the insulating film 106 and the area sandwiched by the n-side and p-side electrodes.
This has a capacitance Cex between the electrodes facing each other, and this capacitance Cex is the capacitance Ci (FIG. 1) specific to the pn junction of the device.
This is because the electrostatic capacitance of the entire device is increased by adding (1) to (b). That is, it is considered that as the capacitance increases, the response of the current to the momentary voltage application becomes slower, and the deterioration of the characteristics of the element due to the migration of the metal or the multiplication of defects caused by the current is suppressed. .

The condition of the insulating film is that the relative permittivity ε _r is 3.
It is preferable that the thickness of the insulating film is about 0.01 μm to 1 μm when the counter electrode area is about 100 μm square with SiO ₂ of about 9 μm. In particular, it is desirable that the thickness of the insulating film be about 0.1 μm or less. In addition, BaTiO ₃ (B
By using a material having a high dielectric constant such as TO) or SrTiO ₃ (STO), the surge withstand voltage can be improved even with a thicker insulating film. Considering the dielectric breakdown voltage of the insulating film itself, there is a limit to making the thickness of the insulating film thinner than a certain value. Therefore, it is effective to use a high dielectric material such as BTO or STO. As is clear from FIG.
The surge withstand voltage improves as the value of ex increases. When Cex = 0, LE with surge withstand voltage of about 50V
Explaining D, 500V at Cex = 50pF, Cex
= 100 pF, it is improved to about 1000V. However,
Of course, if the value of Cex is increased too much, it cannot be improved more than the breakdown voltage of the insulating film forming the capacitor Cex. Considering a specific LED mounting technology, cost, and the like, it is appropriate that the area of the electrode wiring portion 108 at the bottom of the groove that serves as the bonding pad, that is, the area of the counter electrode of the capacitor Cex is about 100 μm square. Therefore, in reality, the surge withstand voltage can be improved by adding Cex that is about 2 to 3 times the specific capacitance Ci of the LED. Therefore, the value of Cex should be selected to be about several times that of Ci. Is preferred.

In the first embodiment of the present invention, an In _x Al _y Ga _{1-x- y} N compound semiconductor is used as the GaN-based semiconductor. By adjusting the composition xy, it is possible to realize a wide range of short wavelength light emission in green, green blue, blue and ultraviolet (UV). Examples of specific compositions are described below. Here, the composition x, y is 0 ≦ x ≦ 1, 0 ≦
It satisfies y ≦ 1 and x + y ≦ 1. The n-type clad layer (first clad layer) 102 serving as the first semiconductor layer constitutes the n-side of the pin junction forming the light emitting region. In _x
The value of each parameter of Al _y Ga _1-xy N is appropriately adjusted according to the wavelength to be emitted, but for example, 0 ≦ x ≦ 1,
0 ≦ x ≦ 1 Preferably, 0 ≦ x ≦ 0.3 and 0 ≦ y ≦ 1 are selected. To make it n-type, impurities such as silicon (Si) and selenium (Se) may be added, and the impurity density may be about 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁹ cm ^−3. . Desirably, the impurity density is 1 × 10 ¹⁸ c
m ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ , about 3 × 10 ¹⁸ c
m ^-3 is a typical value.

The active layer 103 made of GaN-based semiconductor is
A so-called undoped layer, which is a central region of the light emitting region; an n-type layer doped with impurities forming donors such as Si and germanium (Ge); zinc (Zn), magnesium (Mg), carbon (C) ) Etc. doped with impurities forming an acceptor; Si and Zn, Si and Mg, Si and Zn and Mg, or Si and C, etc. doped with impurities forming both acceptors of donors such as C n
Or p-type layer. In _x Al of the active layer 103
The value of each parameter of _y Ga _1-xy N is appropriately adjusted depending on the wavelength to be emitted, and for example, 0 ≦ x ≦ 1,0 ≦
y ≦ 1 Preferably, 0 ≦ x ≦ 0.5 and 0 ≦ y ≦ 0.6 are selected. Second clad layer (p-type clad layer) 104 made of p-type GaN-based semiconductor to be the second semiconductor layer
Constitutes the p-side of the pin junction forming the light emitting region.
The value of each parameter of In _x Al _y Ga _1-xy N of the p-type clad layer 104 is the same as that of the n-type clad layer 102 and the active layer 1.
In relation to 03, it is appropriately adjusted depending on the wavelength to be emitted, but for example, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, and preferably,
0 ≦ x ≦ 0.3 and 0 ≦ y ≦ 1.0 are selected. Also, p
Impurities such as Mg, beryllium (Be), and Zn are added to form the mold. The impurity density is 5 ×
10 ¹⁷ cm ^{−3 to} 2 × 10 ²⁰ cm ⁻³ is preferable. More preferably, it is 5 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ , and about 3 × 10 ¹⁹ cm ⁻³ is a typical value.

If an In _x Al _y Ga _1-xy N buffer layer is formed between the sapphire substrate 101 and the n-type cladding layer 102, the crystallinity of the light emitting region is improved and high efficiency light emission becomes possible. An n-type contact layer made of n-type _{In x Al y Ga 1-xy} N of high impurity density between the buffer layer and the n-type cladding layer 102, the n-side electrode 105 is formed over the n-type contact layer May be. Further, by forming the p-type contact layer made of p-type _{In x Al y Ga 1-xy} N of high impurity density between the p-side electrode 107 and the p-type cladding layer 104 reduces the ohmic contact resistance, luminous efficiency Be improved. Further, as the insulating film 106, BTO,
When using a high dielectric material such as STO, the high dielectric material may be patterned by a well-known ion milling method or the like.

Next, a method of manufacturing the short wavelength LED according to the first embodiment of the present invention shown in FIG. 2 will be described.

(A) First, n-I is formed on a (0001) plane sapphire substrate 101 having a predetermined thickness by MOCVD or the like.
_{n x Al y Ga 1-xy} N cladding layer 102, an undoped _{In x Al y Ga 1-xy} N active layer 103, p-In _x A
The l _y Ga _1-xy N cladding layer 104 is continuously laminated. As the reaction gas when grown under reduced MO-CVD method, for example, _{Ga (CH 3) 3, In} (CH 3) 3, Al
(CH ₃ ) ₃ , Al (CH ₃ ) ₃ and NH ₃ may be used and introduced together with a carrier gas composed of hydrogen or nitrogen. The reaction pressure is, for example, about 1 k to 10 kPa.
Normal pressure MOCVD may also be used. In this way, the GaN-based semiconductor laminate from the n-type cladding layer 102 to the p-type cladding layer 104 is continuously grown. At that time, the composition ratio of each layer may be adjusted by switching the respective component ratios of the reaction gas. Further, in order to add impurities, monosilane (SiH ₄ ) or biscyclopentadienyl magnesium (Cp ₂ Mg) may be appropriately introduced.

(B) Next, the n-type cladding layer 1 is formed on top of it.
The sapphire substrate 101 on which the 02 to p-type cladding layers 104 are continuously deposited is taken out from the CVD furnace, and p-In _x
An oxide film (SiO ₂ film) is formed on the Al _y Ga _1-xy N cladding layer 104 by a sputtering method or a CVD method. Then, a photoresist pattern is formed on the oxide film by a predetermined photolithography technique, and the oxide film is selectively etched. A part of the surface of the p-clad layer 104, the undoped active layer 103, and the n-clad layer 102 is etched by using the two-layer mask made of the selectively etched oxide film and the photoresist above the two layers as an etching mask. , U-grooves are formed, and the n-type clad layer 102 is exposed at the bottom of the U-grooves (if the n-type contact layer is formed as a laminated body, it is further deeply etched to expose the n-type contact layer).

(D) After removing the etching mask material composed of the oxide film / photoresist, the substrate is washed and predetermined light etching or the like is performed to form the translucent p-side electrode 107. This process uses the so-called lift-off method for IT
The translucent p-side electrode 107 such as an O film is formed on the p-type cladding layer 10.
4 is selectively formed only on the upper part. ITO may be deposited by sputtering or CVD.

(E) Next, the substrate is washed, and a metal material for the n-type electrode 105 such as Ti, Al, and Ni is deposited on the entire surface by a sputtering method or a vacuum evaporation method. Then, the n-side electrode 105 is patterned on the bottom of the U groove by using the photolithography method or the lift-off method. In the case of the lift-off method, it goes without saying that the photoresist pattern is formed before the metal thin film is deposited.

(F) Next, the SiO ₂ film 106 is CVD-deposited on the entire surface at a low temperature of 380 to 300 ° C. or lower. Plasma CVD
It is preferable to use the or photo CVD because the CVD can be performed at a low temperature of 150 ° C. or lower. Then an SiO ₂ film 106 and part of the SiO ₂ film 106 of the upper portion of the n-side electrode 105 top of the p-side electrode 107 is selectively removed by photolithography and RIE. In this selective etching, if RIE with high directivity is used, SiO _{2 on the} U-groove side wall is
The film remains (it should be noted that in FIG. 2A, SiO on the sidewall of the U groove is
_{Although the 2} film 106 is expressed as being patterned, it is of course acceptable that the film 106 remains on the entire side wall).

(G) Next, a metal such as Ti / Au is deposited by a sputtering method or an EB vapor deposition method, and the electrode wiring portion 108 is patterned into a shape as shown in FIG. 2A by a photolithography method and an RIE method. To do. If SiO ₂ is left on the entire sidewall of the U groove, a thin film pattern of an electrode material such as Ti / Au may be formed on the entire sidewall of the U groove.

(H) After the basic structure of the short-wavelength LED is completed in this way, a large number of chips are obtained by cutting into a suitable size with a diamond cutter or the like. Then, these chips are mounted on a predetermined stem, and after wire bonding and molding, the short wavelength LED of the first embodiment of the present invention is completed.

Insulating film 10 forming additional capacitance portion Cex
6, Ta ₂ O ₅ , STO (SrTiO ₃ ), BT
O (BaTiO ₃ ), BSTO (BaSrTiO ₃ ),
If a high dielectric material such as PZT (PbZr _x Ti _1-x O ₃ ) or a ferroelectric material is used, a larger Cex can be obtained while keeping the thickness of the insulating film thick, and the surge breakdown voltage is further improved.

(Second Embodiment) FIG. 4 shows a second embodiment of the present invention.
3 shows a DH type LED structure including a multilayer reflective film (Bragg type reflective film) according to the embodiment. In FIG. 4, n−
A Bragg type semiconductor having a periodic structure of a high refractive index film n- (Al _0.5 Ga _0.5 ) _0.5 In _0.5 P and a low refractive index film n-Al _0.5 In _0.5 P having a thickness of λ / 4n on a GaAs substrate 201. A multilayer reflective film 202 is formed. An n-Al _0.5 In _0.5 P clad layer (first semiconductor layer) 102, undoped (Al _0.45 Ga _0.55 ) _0.5 In
_A DH structure including a _0.5 P active layer 103 and a p-Al _0.5 In _0.5 P clad layer (second semiconductor layer) 104 is formed. A translucent p-side electrode (second electrode) 107 made of an ITO film or a Ni / Au film is formed on the Al _0.5 In _0.5 P clad layer 104. p-Al
_0.5 In _0.5 P cladding layer 104, undoped (Al
_0.45 Ga _0.55 ) _0.5 In _0.5 P penetrates the active layer 103,
An n-side electrode (first electrode) made of AuGe alloy at the bottom of the U groove reaching the n-Al _0.5 In _0.5 P clad layer 102.
105 is formed so as to be electrode-connected to the n-Al _0.5 In _0.5 P cladding layer 102. Electrode wiring part 10
8 is a metal such as Ti / Au. Light is extracted through the p-side electrode (transparent electrode) 107 on which the electrode wiring portion 108 is not formed.

An insulating film 106 of a SiO ₂ film is formed on the n-side electrode 105, and the electrode wiring portion 108 is formed on the n-side electrode 1 from the upper part of the second cladding layer 104 via the side wall of the U groove.
No. 05 is formed to extend to the bottom of the U groove. That is, the electrode wiring portion 108, the insulating film 106,
An additional capacitance portion Cex is formed by the n-side electrode 105. The surface of the electrode wiring portion 108 at the bottom of the U groove and the surface of the n-side electrode 105 on which the electrode wiring portion 108 is not formed also serve as a bonding pad, and a bonding wire such as an Au wire is wire-bonded to each. By forming the additional capacitance portion (capacitor) Cex as in the first embodiment, the capacitance of the entire element is increased and the surge withstand voltage is improved. By setting Cex to about 10 times the capacitance Ci peculiar to the LED, the surge withstand voltage became about 10 times. In the case of a SiO ₂ film, the thickness of the insulating film 106 is preferably about 0.01 μm to 1 μm.
If a high dielectric material such as TO or STO is used, the thickness can be 1 μm or more. When BSTO is used, the electrode wiring portion 108 is formed of tungsten (W), W is patterned by RIE using CF ₄ , and then the W is used as a mask for etching with a mixed aqueous solution of hydrogen peroxide, ammonia, and EDTA. Good. Alternatively, direct patterning may be performed by ion milling.

The second embodiment of the present invention is InGaAl.
The present invention is not limited to P-based LEDs, but can be applied to other LEDs such as GaAlAs-based LEDs, and it goes without saying that homojunction, SH-junction, or DH-junction does not matter.

(Third Embodiment) FIG. 5 shows a third embodiment of the present invention.
2 is a perspective view showing an outline of a blue semiconductor laser according to the embodiment of FIG. As shown in FIG. 5, the blue LED of the present invention comprises an n-type GaN on a (0001) plane sapphire substrate 101.
Cladding layer (first semiconductor layer) 102 is formed, an undoped In _x Ga _1-x N active layer 103 is formed thereon. A p-type GaN cladding layer (second semiconductor layer) 104 is formed on the active layer 103, and an n-type GaN current blocking layer 125 is formed on the p-type cladding layer 104. The second p-type GaN clad layer 1 is in contact with the p-type clad layer 104 between the current blocking layers 125.
26 is formed. A p ⁺ GaN contact layer 124 is formed on the second p-type cladding layer 126 and the current blocking layer 125.

A U-groove is formed through the p ⁺ contact layer 124, the current block layer 125, the p-type cladding layer 104, and the active layer 103, and an n-side electrode (third electrode) made of Ti / Au or the like is formed at the bottom of the U-groove. One electrode) 105 is formed.
An insulating film 106 made of SiO ₂ or the like is formed on the n-side electrode 105. Ni is formed on the p ⁺ contact layer 124.
A p-side electrode (second electrode) 108 made of / Au or the like is formed and also serves as an electrode wiring portion and extends to the bottom of the U groove via the side wall of the U groove. An additional capacitance portion Cex is formed at the bottom of the U groove by the p-side electrode (electrode wiring portion) 108, the insulating film 106, and the n-side electrode 105. If the value of the capacitance Cex of the additional capacitance portion (capacitor) is selected to be about 10 times the internal capacitance Ci peculiar to the semiconductor laser, the surge withstand voltage is 10.
Doubles. If a high dielectric material such as BTO or PZT or a ferroelectric material is selected as the insulating film, a surge withstand voltage of several kV or more can be obtained.

Between the sapphire substrate 101 and the n-type cladding layer 102 shown in FIG. 5, In such as GaN, AlGaN, and AlN is formed.
_x Al _y Ga _1-xy N consists by forming the buffer layer improves the crystallinity of the emission region is improved luminous efficiency. Between the buffer layer and the n-type cladding layer 102, I of n-type GaN or the like is formed.
_{n x Al y Ga 1-xy} N a n-type contact layer is formed consisting of may be formed an n-side electrode on the n-type contact layer top. Furthermore, if a clad layer having a larger band gap and a smaller refractive index than the active layer made of In _x Al _y Ga _1-xy N such as AlGaN is formed, confinement of injected carriers and light in the active layer is strengthened and the oscillation threshold is increased. Reduce. The active layer 103 may be InGaN, GaN, or a multi-quantum well (MQW) structure including these in a well layer, and by adopting these structures, characteristics such as reduction of threshold value and increase of polarization ratio are improved. The p-type cladding layer 104 is made of In _x Al such as AlGaN.
_By forming the layer made of _y Ga _1-xy N, the current injection becomes uniform and the characteristics are improved. n-type clad layer 10
Of course, the compositions x and y of the 2 and p-type cladding layers 104 are selected to be larger than the band gap of the active layer.

(Fourth Embodiment) FIG. 6 shows a fourth embodiment of the present invention.
3 is a cross-sectional view of a short wavelength LED according to the embodiment of FIG. The short-wavelength LED according to the fourth embodiment of the present invention comprises a GaN layer having a thickness of 10 to 200 nm on a sapphire substrate 101.
A buffer layer 132 made of AlN, GaAlN, or the like, and a Si-doped n-type GaN having a thickness of 4 μm to be the first semiconductor layer
N-type contact layer 133 made of S and having a thickness of 2.5 nm
Active layer 10 composed of i-doped In _0.3 Ga _0.7 N well layer
3, Mg-doped p-type Al _0.2 Ga _0.8 N with a thickness of 40 nm
And a p-type contact layer 135 made of Mg-doped p-type GaN having a thickness of 0.5 μm, which is a second semiconductor layer. Translucent p-side electrode 10
7 is formed on the p-type contact layer 134, and a frame-shaped p-side electrode pad 128 is further formed thereon. The p-side electrode 107 and the p-side electrode pad 128 make the second
Of the electrodes. The p-side electrode 107 is, for example, I
A transparent electrode such as TO or SnO ₂ or a translucent thin film such as Ni / Au, and the p-side electrode pad 128 is a metal such as Ti / Au. The p-side electrode pad 128 is formed so as to secure the area of the portion which will be the bonding pad portion, and not to shield the p-side electrode 107 as much as possible, that is, to increase the aperture ratio. Light is extracted through the translucent p-side electrode on which the p-side electrode pad 128 is not formed.

The n-side electrode 105 serving as the first electrode penetrates the p-type contact 135, the cap layer 134, and the active layer 103, and further has a U groove formed by etching a part of the surface of the n-type contact layer 133. It contacts the n-type contact layer at the bottom. The U groove has a substantially vertical side wall, and a passivation insulating film 106 is formed on the side wall so as to extend to the periphery of the U groove opening such as the upper portion of the p-side electrode 128. That is, the n-side electrode 105 and the n-type contact layer 133 are in contact with each other through the contact hole formed in the passivation insulating film 106. The n-side electrode 105 has an electrode wiring portion extended to the periphery of the U-groove opening, and a portion located in a flat portion around the U-groove opening serves as a bonding pad portion for the n-side electrode 105. There is. An n-side bonding wire 74 is connected to the bonding pad portion for the n-side electrode 105, and p
The p-side bonding wire 73 is formed on the side electrode pad 128.
Are connected. Further, as shown in FIG. 6, in the flat portion around the U-groove opening, the electrode wiring portion 1 from the n-side electrode is formed.
05, the insulating film 106 for passivation and the p-side electrode pad 128 constitute a parallel plate type capacitor Cex,
An additional capacitance section is formed. That is, the passivation insulating film 106 also serves as the capacitor insulating film.

At this time, the passivation insulating film 106
By controlling the material for forming the element, the thickness, and the area sandwiched by the n-side and p-side electrodes, an additional capacitance portion (capacitor) having a desired capacitance Cex can be realized, and the resistance of the device to surge voltage can be improved. . That is, since the capacitance Cex of the capacitor is added to the capacitance Ci specific to the pn junction of the element, the capacitance of the entire element increases,
The response of the current becomes gentle to the momentary voltage application,
It is possible to suppress the characteristic deterioration of the element due to the migration of metal due to the electric current and the multiplication of defects.

Next, the short wavelength LED according to the fourth embodiment of the present invention shown in FIG. 6 may be manufactured as follows.

(A) First, a buffer layer 132, an n-GaN contact layer 133, an undoped In _0.3 Ga _0.7 N active layer 103, and p-Al are formed on a (0001) plane sapphire substrate 101 having a predetermined thickness by MOCVD or the like. _0.2 Ga
_0.8 N cap layer 134, p-GaN contact layer 13
5 are stacked continuously.

(B) Next, the buffers 132 ...
The sapphire substrate 101 on which the p-type contact layer 135 is continuously deposited is taken out from the CVD furnace, and an oxide film (SiO ₂ film) is formed on the p-GaN contact layer 135 by the sputtering method or the CVD method. Then, a photoresist pattern is formed on the oxide film by a predetermined photolithography technique, and the oxide film is selectively etched. The p-type contact layer 135, the cap layer 134, the active layer 103, and the n-contact layer 13 are formed by using the two-layer mask composed of the selectively etched oxide film and the photoresist above the two layers as an etching mask.
Part of the surface of 3 is etched to form a U groove, and the n-type contact layer 133 is exposed at the bottom of the U groove.

(C) After removing the etching mask material composed of the oxide film / photoresist, the substrate is washed and predetermined ply etching is performed to form the p-side electrode 107.
In this process, the so-called lift-off method is used to selectively form the p-side electrode 107 such as an ITO film only on the upper portion of the p-type contact layer 135. ITO is sputtering or CVD
It may be deposited by a method or the like. Then, a metal such as Ti / Au is deposited by a sputtering method or an EB vapor deposition method, and a photolithography method is used in combination with an RIE method to form a light transmission opening (window portion) in a shape as shown in FIG. The p-side electrode pad 128 is patterned.

(D) Next, the SiO ₂ film 106 is CVD-deposited on the entire surface at a low temperature of 380 to 300 ° C. or lower. Plasma CVD
It is preferable to use the or photo CVD because the CVD can be performed at a low temperature of 150 ° C. or lower. Then, by using photolithography method and RIE method, SiO ₂ above the p-side pad 128 is formed.
The film 106 and the SiO ₂ film 106 at the bottom of the U groove are selectively removed. This selective etching has a high directional RIE.
Is used, the SiO ₂ film on the sidewall of the U groove remains and a contact hole is opened at the bottom of the U groove.

(E) Next, metals such as Ti, Al and Ni are deposited by the sputtering method or the EB vapor deposition method, and the n-side electrode and the n-side electrode are formed into the shape as shown in FIG. 6 by the photolithography method and the RIE method. Electrode wiring part 105 from
Pattern.

(C) After the basic structure of the short-wavelength LED is completed in this way, a large number of chips are obtained by cutting into a suitable size with a diamond cutter or the like. Then, these chips are mounted on a predetermined stem, and after wire bonding and molding, the short wavelength LED of the fourth embodiment of the present invention is completed.

As is clear from the above description, the short wavelength LED according to the fourth embodiment of the present invention has the advantages that the manufacturing process is easy and the yield is high. As the insulating film 106 forming the additional capacitance portion Cox, Ta ₂ O ₅ , ST
If a high dielectric material such as O, BTO, BSTO, PZT or a ferroelectric material is used, a larger Cex can be obtained while keeping the thickness of the insulating film thick, and the surge withstand voltage is further improved.

(Fifth Embodiment) FIG. 7 shows a fifth embodiment of the present invention.
3 is a cross-sectional view of a short wavelength LED according to the embodiment of FIG. It is sectional drawing of the short wavelength LED which concerns on the 4th Embodiment of this invention. The short-wavelength LED according to the fifth embodiment of the present invention is a flip-chip type LED, and has a thickness of 10 to 200 nm of GaN, AlN and GaA on a sapphire substrate 101.
a buffer layer 132 made of 1N or the like, an n-type contact layer 133 made of Si-doped n-type GaN having a thickness of 4 μm to be the first semiconductor layer, and a Si-doped In having a thickness of 2.5 nm.
Active layer 103 consisting of _0.3 Ga _0.7 N well layer, thickness 40
nm, a cap layer 134 made of Mg-doped p-type Al _0.2 Ga _0.8 N, and a p-type contact layer 135 made of Mg-doped p-type GaN having a thickness of 0.5 μm to be the second semiconductor layer.
Are formed. It should be noted that the fifth embodiment of the present invention is a flip-chip type LED, and therefore FIG. The p-side electrode 137 that serves as the second electrode is the p-type contact layer 13
5 (under the p-type contact layer 135 in FIG. 7). The p-side electrode 137 is made of, for example, Ni.
Metals such as / Au and Ti / Au.

The n-side electrode 105 serving as the first electrode penetrates the p-type contact 135, the cap layer 134, and the active layer 103, and further has a U-shaped groove formed by etching a part of the surface of the n-type contact layer 133. It is in contact with the n-type contact layer 133 at the bottom. The U groove has a substantially vertical side wall, and the insulating film 106 extended to the upper portion of the p-side electrode 137 is formed on the side wall. That is, the n-side electrode 105 and the n-type contact layer 133 are in contact with each other through the contact hole opened in the insulating film 106.
The n-side electrode 105 has an electrode wiring portion extended to a flat portion around the U-groove opening. And the p-side electrode 1
37, insulating film 106, and electrode wiring portion 105 from the n-side electrode
And form an additional capacitance portion composed of a parallel plate capacitor Cex.

As shown in FIG. 7, in the flip-chip type LED according to the fifth embodiment of the present invention, the p-side electrode 137 and the p-side wiring (the first wiring) on the wiring board 173 are provided via the protrusions (solder balls) 166. Second wiring) 171 is connected.
In addition, the n-side wiring (first wiring) 172 on the wiring board 173
And the n-side electrode 105 are electrically connected to each other via a protrusion (solder ball) 167. The protrusions 166 and 167 are not limited to the solder balls, and needless to say, may be a highly conductive substance such as another metal, a metal paste, a conductive adhesive, or the like. As a result of the flip arrangement as described above, the light emitted in the light emitting region can be taken out from the sapphire substrate 101 side as shown in FIG. 7, so that the aperture ratio is 100%, and there is no fear of shielding by the electrode. Further, the light emitted in the direction of the p-side electrode 137 is also reflected by the p-side electrode 137 and can be extracted from the sapphire substrate side, so that the external quantum efficiency is increased.

In the flip-chip type LED according to the fifth embodiment of the present invention, since there is no concern about a decrease in light extraction efficiency, it is easy to increase the area of the additional capacitance portion Cex and a large-capacity capacitor is provided. There is an advantage that can be secured. That is, there is a large degree of freedom in selection of the material forming the insulating film 106, the thickness, and the area sandwiched by the n-side and p-side electrodes, and the desired capacitance C
An additional capacitance part (capacitor) of ex can be realized, and the resistance of the device to surge voltage can be improved. As in the first to fourth embodiments, the capacitance Cex of the capacitor is the pn of the element.
By being added to the electrostatic capacitance Ci unique to the junction, the electrostatic capacitance of the entire element increases, the response of the current becomes gentle to the momentary voltage application, and the migration of metal caused by the current is caused. It is possible to suppress the characteristic deterioration of the element due to the proliferation of defects and defects. As the insulating film 106 forming the additional capacitance portion Cox, Ta ₂ O ₅ , STO, BTO, BSTO, PZT is used.
If a high dielectric material or a ferroelectric material such as is used, a larger Cex can be obtained while keeping the thickness of the insulating film thick, and the surge withstand voltage is further improved.

Further, in the conventional flip chip type LED, the solder ball is connected to the n-side electrode at the bottom of the U groove, so that the solder ball on the n-side should be extremely larger than the solder ball on the p-side. Although it has been necessary, according to the fifth embodiment of the present invention, as shown in FIG. 7, it is possible to employ thin solder balls. Further, since it is not necessary to accurately place the solder balls at the positions of the U grooves, the mounting process on the wiring board 173 can be simplified.

(Sixth Embodiment) FIG. 8 shows a sixth embodiment of the present invention.
3 is a cross-sectional view of the short wavelength semiconductor laser according to the embodiment of FIG. The short wavelength semiconductor laser according to the sixth embodiment of the present invention has a thickness of 10 to 200 on a sapphire substrate 101.
buffer layer 132 made of GaN, AlN, GaAlN, etc., having a thickness of 4 μm, n-type contact layer 133 made of Si-doped n-type GaN having a thickness of 4 μm, and Si-doped n-type Ga _0.85 Ga _0.15 having a thickness of 300 nm to be the first semiconductor layer. N-type clad layer 102 made of N, active layer 143 having a multiple quantum well (MQW) structure, and a thickness of 300 nm to be the second semiconductor layer.
Mg-doped p-type Ga _0.85 Ga _0.15 N p-type cladding layer 104, 0.5 μm thick Mg-doped p-type GaN
A p-type contact layer 135 made of is formed. Here, the active layer 143 is in contact with the n-type cladding layer 102 and has a thickness of 100 nm, which is a first optical guide layer made of non-doped GaN, an MQW structure layer in contact with the first optical guide layer, and a thickness in contact with the MQW structure layer. 40 nm Mg-doped p-type Al _0.2 G
a _0.8 N cap layer and Mg-doped p having a thickness of 100 nm between the cap layer and the p-type cladding layer 104.
Second GaN-based light guide layer. The MQW structure is 2 nm thick undoped In _0.2 Ga
_0.8 N well layer and 4 nm thick undoped In _0.05 Ga
_This structure has a pair of _0.95 N layers repeated for 10 cycles. p
The width of the p-type contact layer 135 and the p-type cladding layer 104 is 3 μm.
The periphery is removed by the RIE method or the like so as to form a stripe of m, and a ridge as shown in FIG. 8 is formed.

A groove (U groove) reaching the n-type contact layer 133 is further formed from the bottom of the recess forming the ridge, and the n-side electrode (first electrode) 10 is formed at the bottom of the groove.
5 and the n-type contact layer 133 are in contact with each other. An insulating film 146 such as a SiO ₂ film or a Si ₃ N ₄ film is formed on the side wall surface of the groove and the bottom and side surfaces of the recess around the ridge. The insulating film 146 on the upper surface of the ridge is removed, and the p-type contact layer 135 and the p-side electrode (second electrode)
108 are in contact with each other. A capacitor insulating film 106 is formed on an upper portion of the p-side electrode 108, and an electrode wiring portion 105 extending from the bottom of the groove portion and formed from the n-side electrode is arranged on the capacitor insulating film 106. That is, the p-side electrode 10 is formed on the p-type contact layer 135 forming the ridge.
8, an additional capacitance portion Cex including the capacitor insulating film 106 and the electrode wiring portion 105 extending from the n-side electrode is formed. A part of the capacitor insulating film 106 on the p-side electrode 108 is removed, and the p-side bonding wire 73 is connected to the removed portion. On the other hand, the n-side electrode 1
A bonding wire 74 on the n side is connected to 05.

In the semiconductor laser according to the sixth embodiment of the present invention shown in FIG. 8, the manufacturing process of the additional capacitance portion Cex is easy, and the area of the additional capacitance portion Cex can be easily increased. Further, since the heat dissipation is good, the long-term reliability is improved together with the surge withstand voltage improvement due to the effect of the additional capacitance portion Cex. As the insulating film 106 forming the additional capacitance portion Cex, Ta ₂ O ₅ , STO, BTO, BSTO, PZT is used.
If a high dielectric material or a ferroelectric material such as is used, a larger Cex can be obtained while keeping the thickness of the insulating film thick, and the surge withstand voltage is further improved.

(Seventh Embodiment) FIG. 9 shows a seventh embodiment of the present invention.
3 is a cross-sectional view of the flip chip type short wavelength semiconductor laser according to the embodiment of FIG. The flip-chip type short wavelength semiconductor laser according to the seventh embodiment of the present invention comprises a sapphire substrate 101, a GaN and Al layer having a thickness of 10 to 200 nm.
Buffer layer 132 made of N, GaAlN, etc., thickness 4
μm Si-doped n-type GaN n-type contact layer 133, 300 nm thick Si-doped n-type Ga _0.85 Ga
N-type clad layer (first semiconductor layer) 10 made of _0.15 N 10
2, an active layer 143 having a multiple quantum well (MQW) structure, a p-type clad layer (second semiconductor layer) 104 made of Mg-doped p-type Ga _0.85 Ga _0.15 N having a thickness of 300 nm, and a thickness 1.
A current blocking layer 125 made of Si-doped n-type GaN having a thickness of 5 μm and a p-type contact layer 135 made of Mg-doped p-type GaN having a thickness of 1 μm are formed. It should be noted that FIG. 9 shows the flip chip arrangement, and therefore the vertical relationship is reversed. In addition, the p-type contact 13
Reference numeral 5 is in contact with the p-type cladding layer 104 through a stripe-shaped window portion having a width of μm opened in the current blocking layer 125. The active layer 143 shown in FIG. 9 is the n-type cladding layer 102.
In order from the side, the first optical guide layer made of non-doped GaN having a thickness of 100 nm, the MQW structure layer, and the M having a thickness of 40 nm.
The second light guide layer is composed of a cap layer made of g-doped p-type Al _0.2 Ga _0.8 N and a second light guide layer made of Mg-doped p-type GaN having a thickness of 100 nm.
It is in contact with the mold cladding layer 104. MQW structure has a thickness of 2
nm undoped In _0.2 Ga _0.8 N well layer with a thickness of 4
nm non-doped In _0.05 Ga _0.95 N layer with a pair of 10
It is a cyclically repeated structure.

The p-side electrode (second electrode) 137 is formed on the p-type contact layer 134. p-side electrode 13
For 7, metal such as Ni / Au or Ti / Au may be used. The n-side electrode (first electrode) 105 penetrates the p-type contact layer 135, the current blocking layer 125, the p-type clad layer 104, the active layer 143, and the n-type clad layer 102, and further on the surface of the n-type contact layer 133. It is in contact with the n-type contact layer at the bottom of the U groove formed by etching a part. The U groove has a substantially vertical side wall, and the insulating film 106 extended to the upper portion of the p-side electrode 137 is formed on the side wall. That is, the n-side electrode 105 is opened through the contact hole formed in the insulating film 106.
And the n-type contact layer 133 are in contact with each other. The n-side electrode 105 has an electrode wiring portion 105 formed to extend to a flat portion around the U groove opening. And the p-side electrode 13
7, an insulating film 106, and an electrode wiring portion 105 from the n-side electrode, an additional capacitance portion C formed of a parallel plate type capacitor.
ex is formed.

As shown in FIG. 9, in the flip-chip type semiconductor laser according to the seventh embodiment of the present invention, the p-side electrode 137 and the p-side wiring (on the heat sink 174) via the protrusions (solder balls) 166 are provided. Second wiring) 171 is connected. The n-side wiring (first wiring) 172 on the heat sink 174 and the n-side electrode 105 are electrically connected to each other via a protrusion (solder ball) 167. Protrusion 1
66 and 167 are metals and metal pastes other than solder balls,
A conductive adhesive may be used.

The flip-chip type semiconductor laser according to the seventh embodiment of the present invention has an advantage that the area of the additional capacitance portion (capacitor) Cex can be easily increased and a large-capacity capacitor can be secured. That is, there is a large degree of freedom in selection of the material and thickness of the insulating film 106 and the area sandwiched by the n-side and p-side electrodes, so that a capacitor having a desired capacitance Cex can be realized, and the resistance of the device to surge voltage can be improved. . The capacitance C of the capacitor is the same as in the first to sixth embodiments.
By adding ex to the capacitance Ci that is specific to the pn junction of the element, the capacitance of the entire element increases, and the response of the current to the momentary voltage application becomes slower. It is possible to suppress the deterioration of the characteristics of the element due to the migration of metal and the proliferation of defects. As the insulating film 106 forming the additional capacitance portion Cox, Ta ₂ O ₅ , STO, BTO, B is used.
If a high dielectric material such as STO or PZT or a ferroelectric material is used, a larger Cex can be obtained while keeping the thickness of the insulating film large.
The surge withstand voltage is further improved.

According to the structure shown in FIG. 9, the n-side electrode 105
And the n-side wiring 172 can be connected with the thin solder ball 167 (when the n-side electrode 105 is present only at the bottom of the U groove, the n-side electrode 105 can be formed with an extremely thick solder ball or structure.
However, such thick solder balls are not necessary in the structure shown in FIG. 9). Further, it is difficult to form a gap between the semiconductor laser and the heat sink, and heat dissipation is good. The seventh aspect of the present invention
According to the above embodiment, there is an advantage that the mounting is easy because the step difference of the soldering is small and the horizontal position margin is large (it is not necessary to align the solder ball with the bottom of the U groove).

(Eighth Embodiment) FIG. 10 relates to an eighth embodiment of the present invention, and an additional capacitance section (capacitor).
The other structural example of Cex is shown. That is, the capacitor Cex of the present invention has a sandwich structure (parallel plate type capacitor) with the electrode wiring portion 108, the insulating film 106, and the n-side electrode 105 as shown in the first to seventh embodiments, or a p-side electrode. 1
08, 128, 137, the insulating film 106, and the electrode wiring part 105 from the n-side electrode are not limited to the sandwich structure, but as shown in FIG.
8 and the n-type semiconductor layer 1 on which the n-side electrode 105 is formed
It is also possible to realize a structure in which at least part of the insulating film 106 sandwiches the insulating film 106. Alternatively, FIG.
The same effect can be obtained by a metal-semiconductor junction structure in which a part of the electrode wiring portion 108 is directly joined to at least a part of the surface of the n-type semiconductor layer 102 as shown in 0 (b).
That is, FIG. 10B shows a structure in which the electrode wiring portion 108 and the n-side electrode 105 are formed at different positions on the surface of the n-type semiconductor layer 102.

FIG. 10A shows a MOS junction type capacitor, and FIG. 10B shows a Schottky junction type capacitor if the electrode material is selected. Further, when it is desired to increase the value of the capacitor Cex, a trench type capacitor used in DRAM may be formed. That is, n
A trench may be formed inside the type semiconductor layer 102, and a capacitor may be formed inside the trench. That is, the additional capacitor portion (capacitor) of the present invention is not limited to the parallel plate type capacitor, but may be a cylindrical shape or other shapes.

(Ninth Embodiment) FIGS. 11A and 11B relate to the ninth embodiment of the present invention and show a case where an additional capacitance portion Cex is formed in a package. Figure 11
In (a), the semiconductor light emitting device 1 such as an LED or a semiconductor laser is fixed on the lead 61 with its n-type electrode in contact with the lead 61 with a conductive adhesive or the like. The lead 62 is connected to the p-side electrode of the semiconductor light emitting device 1 by the bonding wire 71. As shown in FIG. 11A, the n-side lead 6
The surge withstand voltage is increased by forming the additional capacitance portion Cex between the 1 and the p-side lead 62. In this case, the capacitance value Cex and the withstand voltage can be selected without being limited by the structure of the light emitting element, and therefore, it is 100 with respect to the internal capacitance Ci of the light emitting element.
Cex of more than twice can be easily selected. Therefore, 100
A surge withstand voltage of 0 V or more can be easily realized.

FIG. 11B shows a case where an additional capacitance portion (capacitor) Cex is formed on the ceramic package 66 made of alumina or the like. In FIG. 11B, the thickness is 0.1
The semiconductor light emitting device 1 such as an LED or a semiconductor laser is mounted on the Cu wiring 68 of about 0.2 mm.
The Cu wiring 68 is sintered (directly bonded) to the alumina substrate 66, and its surface is plated with Au to a thickness of about 5 to 20 μm. The n-side electrode of the light emitting element 1 is connected to the Cu wiring 68 (in the ninth embodiment of the present invention, n
It is not necessary to take out the side electrode and the p-side electrode from the same plane side, and from the different main surface side of the semiconductor light emitting element,
The side electrode and the p-side electrode may be taken out). The p-side electrode of the light emitting element 1 is Cu plated with Au.
The wiring 69 and the bonding wire 72 are connected. The Cu wiring 69 is electrically insulated from the Cu wiring 68 and is formed in the orthogonal direction. The Cu wiring 69 is also directly bonded to the aluminum substrate, but the portion orthogonal to the Cu wiring 68 is insulated by the SiO ₂ film 266.
The Cu wirings 68 and 69 also serve as leads (external electrodes). The upper part of the SiO ₂ film 266 is made of Al having a thickness of about 10 μm.
Membrane bridge 267 is formed. Instead of the Al film bridge, another metal thin film may be used, for example, the Au film bridge 267 may be used. The Al film bridge 267, the SiO ₂ film 266, and the Cu wiring 68 form an additional capacitance portion (capacitor) Cex. The area of the capacitor Cex and the thickness of the SiO ₂ film 266 can be selected with a wide degree of freedom. . With the structure shown in FIG. 11B, the structure (area) of the semiconductor element 1 is not limited and the value of Cex can be arbitrarily selected, so that a surge withstand voltage of 1000 V or more can be easily realized.

Further, in the structure of FIGS. 11A and 11B, if the number of leads or Cu wiring is increased so that the bonding wire can be connected also to the n-side electrode of the light emitting element, the p of the light emitting element can be formed. It can also be applied to a structure in which the side electrode and the n-side electrode are on the same plane side. Therefore, the ninth aspect of the present invention
The embodiment can be applied regardless of the arrangement of the p-side electrode and the n-side electrode. That is, the ninth embodiment is characterized in that the applicable range of the light emitting element is extremely wide and the surge withstand voltage is high.

[0068]

As described above, according to the present invention,
It is possible to prevent the element from deteriorating due to instantaneous voltage (surge) application, and it is possible to provide a highly reliable light emitting element.

[Brief description of drawings]

FIG. 1 is an equivalent circuit for explaining the basic principle of the present invention.

FIG. 2 is a short wavelength LED according to a first embodiment of the present invention.
It is a figure which shows the structure of.

FIG. 3 is a diagram showing a relationship between a capacitance value Cex and a surge withstand voltage.

FIG. 4 is a diagram showing a structure of an LED having a multilayer reflective film according to a second embodiment of the present invention.

FIG. 5 is a diagram showing a structure of a semiconductor laser according to a third embodiment of the present invention.

FIG. 6 is a short wavelength LED according to a fourth embodiment of the present invention.
It is a figure which shows the structure of.

FIG. 7 is a diagram showing a structure of a flip chip type short wavelength LED according to a fifth embodiment of the present invention.

FIG. 8 is a diagram showing a structure of a semiconductor laser according to a sixth embodiment of the present invention.

FIG. 9 is a diagram showing a structure of a flip-chip type semiconductor laser according to a seventh embodiment of the present invention.

FIG. 10 is a diagram showing an example of a structure of an additional capacitance section (capacitor) Cex according to an eighth embodiment of the present invention.

FIG. 11 is a structural diagram when an additional capacitance portion (capacitor) Cex is arranged in the package according to the ninth embodiment of the present invention.

FIG. 12 is a diagram showing a structure of a conventional blue LED.

[Explanation of symbols]

1 Semiconductor Light-Emitting Element 2 Capacitor 61, 62 Lead 66 Alumina Substrate 68, 69 Cu Wiring (Lead) 71, 72, 73, 74, 78, 79 Bonding Wire 101 Sapphire Substrate 102 n-type Cladding Layer 103 Active Layer 104, 126 p-type Cladding layer 105 n-side electrode (first electrode) 106, 266 insulating film 107 p-side electrode (second electrode: translucent electrode) 108 electrode wiring portion (base electrode) 112 n-type layer 114 p-type layer 118 pedestal Electrode 124 p ⁺ contact layer 125 current block layer 128 p-side electrode pad 132 buffer layer 133 n-type contact layer 134 cap layer 135 p-type contact layer 137 p-side electrode 143 MQW active layer 146 insulating film 161, 162 balls 166, 167 protrusions Object (solder ball) 171 p-side wiring (second wiring) 17 n-side wiring (first wiring) 173 wiring board 174 heat sink 201 semiconductor substrate 202 multilayer reflection film 267 Al film bridge

Continuation of the front page (56) Reference JP-A-6-314825 (JP, A) JP-A-5-13816 (JP, A) JP-A-4-159784 (JP, A) JP-A-5-308158 (JP , A) JP-A-9-307141 (JP, A) JP-A-10-326943 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01S 5 / 00-5 / 50 H01L 33/00

Claims (16)

(57) [Claims] 1. A first-conductivity-type first semiconductor layer formed on a substrate, a second-conductivity-type second semiconductor layer formed on a portion of the first semiconductor layer, A first electrode formed on the other part of the first semiconductor layer, an insulating film formed on the first electrode, and a second electrode formed on the second semiconductor layer. And an electrode wiring portion extended from the second electrode on the insulating film, forming a pn junction diode with the first and second semiconductor layers, and the first electrode,
The semiconductor light emitting device, wherein the insulating film and the electrode wiring portion constitute an additional capacitance portion connected in parallel to the pn junction diode. 2. The first electrode, the insulating film, and the electrode wiring portion that form the additional capacitance portion each have a flat plate structure, and the first electrode, the insulating film, and the electrode. The semiconductor light emitting device according to claim 1, wherein a parallel plate type capacitor is constituted by the wiring portion. 3. The semiconductor light emitting device according to claim 1, wherein the area of the insulating film and the area of the electrode wiring portion that form the additional capacitance portion are substantially the same. element. 4. The capacitance value of the additional capacitance portion is the p-value.
The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device has a value equivalent to or higher than the equivalent capacitance value of the n-junction diode. 5. The area of the electrode wiring portion forming the additional capacitance portion and the area of the first electrode are substantially 1: 2, respectively. A semiconductor light-emitting device according to item. 6. The second electrode is a translucent electrode,
The said electrode wiring part is arrange | positioned so that light can be taken out from the said translucent electrode, and is electrically connected with the said 2nd electrode, The any one of the Claims 1-5 characterized by the above-mentioned. Semiconductor light emitting device. 7. The first semiconductor layer is a first cladding layer, the second semiconductor layer is a second cladding layer, and the first and second cladding layers are between the first and second cladding layers.
7. The semiconductor light emitting device according to claim 1, further comprising an active layer made of a semiconductor having a forbidden band width smaller than that of the clad layer. 8. The first and second semiconductor layers are gallium nitride based compound semiconductors.
8. The semiconductor light emitting device according to any one of items 1 to 7. 9. The electrode wiring section and the first electrode in a portion where the electrode wiring section and the insulating film are not present also serve as a bonding pad, respectively. The semiconductor light-emitting device according to. 10. A first conductivity type first formed on a substrate.
Semiconductor layer, a second conductive type second semiconductor layer formed on a portion of the first semiconductor layer, and a first semiconductor layer formed on another portion of the first semiconductor layer. An electrode, a second electrode formed on the second semiconductor layer, an insulating film formed on the second electrode, and an extension formed on the insulating film from the first electrode. An electrode wiring portion, a pn junction diode is formed by the first and second semiconductor layers, and the second electrode,
The semiconductor light emitting device, wherein the insulating film and the electrode wiring portion constitute an additional capacitance portion connected in parallel to the pn junction diode. 11. The second portion forming the additional capacitance portion.
The electrode, the insulating film, and the electrode wiring portion each have a flat plate structure, and the second electrode, the insulating film, and the electrode wiring portion form a parallel plate capacitor. The semiconductor light emitting device according to claim 10. 12. The semiconductor light emitting device according to claim 10, wherein the area of the insulating film and the area of the electrode wiring portion, which form the additional capacitance portion, are substantially the same. element. 13. The capacitance value of the additional capacitance portion is equal to or higher than the equivalent capacitance value of the pn junction diode, and the capacitance value of the additional capacitance portion is equal to or higher than the equivalent capacitance value. The semiconductor light-emitting device as described above. 14. The semiconductor light emitting device according to claim 10, wherein the insulating substrate is a sapphire substrate. 15. The first and second electrodes are respectively connected to first and second wirings formed on a predetermined wiring board or a heat sink via protrusions, and light is extracted from the sapphire substrate side. The semiconductor light emitting element according to claim 10, wherein the semiconductor light emitting element is a semiconductor light emitting element. 16. The semiconductor light emitting device according to claim 4, wherein the capacitance value of the additional capacitance portion is a value which is several times or less the equivalent capacitance value of the pn junction diode.