JP2011124555A - プリント配線板及びプリント配線板の製造方法 - Google Patents
プリント配線板及びプリント配線板の製造方法 Download PDFInfo
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Abstract
【解決手段】 プリント配線板10は、絶縁層42がビルドアップ多層配線板の層間樹脂絶縁層を構成する層間樹脂絶縁材からなるため、薄く、搭載するICチップ60からの熱を効率的に逃がすことができる。導体回路40A、40Bが、絶縁層42の第1面42U側に埋め込まれ、絶縁層42の第1面と同一平面に位置し、絶縁層上に凸凹が無くフラットであるため、ICチップ60を信頼性高く搭載することができる。
【選択図】 図5
Description
前記層間樹脂絶縁層の第1面側に埋め込まれ、絶縁層の第1面と同一平面に位置する第1面と、該第1面とは反対側で、前記開口により露出される第2面とを備える導体回路と、
前記導体回路の第1面上に形成されている第1表面処理膜と、
前記開口により露出される前記導体回路の第2面上に形成されている第2表面処理膜とを備えることを技術的特徴とする。
図5、図6を参照して第1実施形態に係るプリント配線板について説明する。図5はプリント配線板の一部断面を示し、図6(A)は図5中のサイクルCで囲んだ部位を更に拡大して示し、図6(B)は、図6(A)の導体回路のB矢視図である。
プリント配線板10は、単層の樹脂製の絶縁層42から成り、上面(第1面42U)側に、パッド用導体回路40Aと、配線用導体回路40Bとが形成されている。パッド用導体回路40Aと配線用導体回路40Bとの上面(第1面40U)は、絶縁層42の上面と同一平面になるように形成されている。パッド用導体回路40Aの上面には、図6(A)中に示すように、ニッケル膜54、パラジウム膜55、金膜56からなる表面処理膜を有するボンディングパッド57Uが形成されている。図6(B)に示すようにボンディングパッド57Uは矩形に形成されている。
厚さ0.2〜0.8mmのガラスエポキシ樹脂またはBT(ビスマレイミドトリアジン)樹脂からなる絶縁性基板30の両面に5〜250μmの銅箔32がラミネートされている両面銅張積層板30Aを出発材料とし、銅箔32に厚み100μmのキャリア銅箔34を超音波溶接する(図1(A))。キャリア銅箔34上にNi膜36をスパッタリングで形成する(図1(B))。そして、めっきレジスト組成物を被覆し、露光・現像によりパターニングしてめっきレジスト38を形成する(図1(C))。めっきレジスト非形成部に電解銅めっきにより導体回路40A、40Bを形成し、めっきレジストを剥離する(図1(D))。
図11、図12を参照して第2実施形態に係るプリント配線板について説明する。図11はプリント配線板の一部断面を示し、図12(A)は図11中のサイクルCで囲んだ部位を更に拡大して示し、図12(B)は、図12(A)の導体回路のB矢視図である。
プリント配線板10は、単層の樹脂製の絶縁層42から成り、上面(第1面42U)側に、パッド用導体回路40Aと、配線用導体回路40Bとが形成されている。パッド用導体回路40Aと配線用導体回路40Bとの上面(第1面40U)は、絶縁層42の上面と同一平面になるように形成されている。パッド用導体回路40Aの上面には、図12(A)中に示すように、ニッケル膜54、パラジウム膜55、金膜56からなる表面処理膜が形成されている。ボンディングパッド57Uの上面は、パッド用導体回路40Aの上面(第1面40U)、及び、絶縁層42の上面と同一平面になるように形成されている。図12(B)に示すようにボンディングパッド57Uは矩形に形成されている。
厚さ0.2〜0.8mmのガラスエポキシ樹脂またはBT(ビスマレイミドトリアジン)樹脂からなる絶縁性基板30の両面に5〜250μmの銅箔32がラミネートされている両面銅張積層板30Aを出発材料とし、銅箔32に厚み100μmのキャリア銅箔34を超音波溶接する(図7(A))。キャリア銅箔34上にNi膜36をスパッタリングで形成する(図7(B))。
30 絶縁基板
32 銅箔
34 キャリア銅箔
40A パッド用導体回路
40B 配線用導体回路
40U 第1面
40D 第2面
42 樹脂層
42U 第1面
42D 第2面
44 ニッケル膜
45 パラジウム膜
46 金膜
50 支持体
54 ニッケル膜
55 パラジウム膜
56 金膜
57D ボンディングパッド
60 ICチップ
66 ボンディングワイヤ
68 モールド樹脂
Claims (10)
- 第1面、該第1面の反対側の第2面とを有し、第2面に開口する開口部を備える絶縁層と、
前記絶縁層の第1面側に埋め込まれ、絶縁層の第1面と同一平面に位置する第1面と、該第1面とは反対側で、前記開口部により露出される第2面とを備える導体回路と、
前記導体回路の第1面側に形成されている第1表面処理膜と、
前記開口により露出される前記導体回路の第2面上に形成されている第2表面処理膜とを備えるプリント配線板。 - 前記第1表面処理膜は、前記導体回路の第1面上に形成されていることを特徴とする請求項1のプリント配線板。
- 前記第1表面処理膜の表面は、前記導体回路の第1面と同一平面に位置することを特徴とする請求項1のプリント配線板。
- 前記第1表面処理膜及び前記第2表面処理膜は、無電解めっき膜からなる請求項1のプリント配線板。
- 前記第1表面処理膜及び前記第2表面処理膜は、ニッケル、パラジウム及び金からなる請求項1のプリント配線板。
- 前記導体回路が1層設けられている請求項1のプリント配線板。
- 前記導体回路の厚みをaとし、前記絶縁層の厚みをbとしたとき、0.2<a/b<0.8となる請求項1のプリント配線板。
- 以下の工程を備えるプリント配線板の製造方法:
第1支持体上に導体回路を形成することと、
前記導体回路を覆うように前記第1支持体上に絶縁層を形成することと、
前記導体回路の表面の一部を露出させる開口部を前記絶縁層の内部に形成することと、
前記絶縁層の開口部から露出された前記導体回路の表面上に第1表面処理膜を形成することと、
前記絶縁層上に第2支持体を貼り付けることと、
前記第1支持体を前記絶縁層から剥離することと、
前記第1支持体を剥離した後に露出された前記導体回路の表面上に第2表面処理膜を形成することと、
前記第2支持体を前記絶縁層から剥離することと、
を有するプリント配線板の製造方法。 - 前記第1表面処理膜及び前記第2表面処理膜は無電解めっきにより形成される請求項8のプリント配線板の製造方法。
- 以下の工程を備えるプリント配線板の製造方法:
第1支持体上に第1表面処理膜を形成することと、
前記第1表面処理膜を覆うようにして前記第1支持体上に導体回路を形成することと、
前記導体回路を覆うようにして前記第1支持体上に絶縁層を形成することと、
前記導体回路の表面の一部を露出させる開口部を前記絶縁層の内部に形成することと、
前記絶縁層の開口部から露出された前記導体回路の表面上に第2表面処理膜を形成することと、
前記絶縁層上に第2支持体を貼り付けることと、
前記第1支持体を前記絶縁層から剥離することと、
を有するプリント配線板の製造方法。
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Cited By (4)
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JP2013070043A (ja) * | 2011-09-06 | 2013-04-18 | Daisho Denshi Co Ltd | 片面プリント配線板およびその製造方法 |
JP2017112199A (ja) * | 2015-12-16 | 2017-06-22 | 新光電気工業株式会社 | 配線基板、半導体装置 |
US9799595B2 (en) | 2015-10-28 | 2017-10-24 | Shinko Electric Industries Co., Ltd. | Careless wiring substrate having an insulation layer with a bulged covering portion and semiconductor device thereof |
US10170405B2 (en) | 2016-07-12 | 2019-01-01 | Shinko Electric Industries Co., Ltd. | Wiring substrate and semiconductor package |
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US8923008B2 (en) | 2011-03-08 | 2014-12-30 | Ibiden Co., Ltd. | Circuit board and method for manufacturing circuit board |
KR102005487B1 (ko) * | 2011-12-21 | 2019-07-30 | 엘지이노텍 주식회사 | 메모리카드, 메모리 카드용 인쇄회로기판 및 이의 제조 방법 |
KR102014088B1 (ko) * | 2012-03-20 | 2019-08-26 | 엘지이노텍 주식회사 | 메모리카드, 메모리 카드용 인쇄회로기판 및 이의 제조 방법 |
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JP2001332654A (ja) * | 2000-03-17 | 2001-11-30 | Matsushita Electric Ind Co Ltd | 電気素子内蔵モジュール及びその製造方法 |
JP2006324542A (ja) * | 2005-05-20 | 2006-11-30 | Cmk Corp | プリント配線板とその製造方法 |
WO2008001915A1 (fr) * | 2006-06-30 | 2008-01-03 | Nec Corporation | Carte de câblage, dispositif à semi-conducteurs l'utilisant et leurs procédés de fabrication |
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US9799595B2 (en) | 2015-10-28 | 2017-10-24 | Shinko Electric Industries Co., Ltd. | Careless wiring substrate having an insulation layer with a bulged covering portion and semiconductor device thereof |
JP2017112199A (ja) * | 2015-12-16 | 2017-06-22 | 新光電気工業株式会社 | 配線基板、半導体装置 |
US10109580B2 (en) | 2015-12-16 | 2018-10-23 | Shinko Electric Industries Co., Ltd. | Wiring board and semiconductor device |
US10170405B2 (en) | 2016-07-12 | 2019-01-01 | Shinko Electric Industries Co., Ltd. | Wiring substrate and semiconductor package |
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