JP2011119767A - Method for dicing wafer, method for mounting, method for manufacturing chip with adhesive layer, and mounted body - Google Patents

Method for dicing wafer, method for mounting, method for manufacturing chip with adhesive layer, and mounted body Download PDF

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Publication number
JP2011119767A
JP2011119767A JP2011049336A JP2011049336A JP2011119767A JP 2011119767 A JP2011119767 A JP 2011119767A JP 2011049336 A JP2011049336 A JP 2011049336A JP 2011049336 A JP2011049336 A JP 2011049336A JP 2011119767 A JP2011119767 A JP 2011119767A
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Prior art keywords
wafer
dicing
adhesive layer
mounting
adhesive
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JP2011049336A
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Japanese (ja)
Inventor
Ryoji Kojima
亮二 小嶋
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Dexerials Corp
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Sony Chemical and Information Device Corp
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Publication date
Application filed by Sony Chemical and Information Device Corp filed Critical Sony Chemical and Information Device Corp
Priority to JP2011049336A priority Critical patent/JP2011119767A/en
Publication of JP2011119767A publication Critical patent/JP2011119767A/en
Priority to TW101107621A priority patent/TW201237955A/en
Priority to PCT/JP2012/055881 priority patent/WO2012121307A1/en
Pending legal-status Critical Current

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Dicing (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To secure the visibility of a wafer cutting line and to simply stick an adhesive layer to each chip. <P>SOLUTION: A method for dicing a wafer includes: a mounting step of mounting a wafer 20 on a dicing sheet 21; a dicing step of dicing the wafer 20 into a plurality of chips 30; an adhesive layer forming step of forming an adhesive layer 31 on a surface of the wafer 20 after the dicing step; and an expanding step of expanding the dicing sheet 21, on which the wafer 20 is mounted, to separate the wafer 20 and the adhesive layer 31 into each piece. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、一面に接着剤層が貼着されてなる接着剤層付きチップを形成するウエハのダイシング方法、接着剤層付きチップを実装する実装方法、この接着剤層付きチップの製造方法、及び接着剤層付きチップが実装された実装体に関する。   The present invention provides a wafer dicing method for forming a chip with an adhesive layer formed by adhering an adhesive layer on one side, a mounting method for mounting a chip with an adhesive layer, a method for manufacturing the chip with an adhesive layer, and The present invention relates to a mounting body on which a chip with an adhesive layer is mounted.

従来、半導体集積回路は、半導体集積回路を構成する基板に実装される半導体チップを半導体ウエハから切り出すダイシング工程と、切り出された半導体チップを基板に実装する実装工程とを経て製造されている。   Conventionally, a semiconductor integrated circuit is manufactured through a dicing process of cutting a semiconductor chip mounted on a substrate constituting the semiconductor integrated circuit from a semiconductor wafer and a mounting process of mounting the cut semiconductor chip on the substrate.

ダイシング工程では、例えば、図７に示すようなダイシング装置１００が用いられている。ダイシング装置１００は、半導体ウエハ１０１がセットされる台座１０２と、半導体ウエハ１０１を切断するソーブレード１０３と、台座１０２上に設けられ半導体ウエハ１０１を保持する仮固定シート１０４と、仮固定シート１０４を伸張させるエクスパンドシート１０５と、台座１０２、ソーブレード１０３及びエクスパンドシート１０５を制御する制御部１０６とを備える。エクスパンドシート１０５は、台座１０２に真空吸着塔によって保持されると共に、上面に仮固定シート１０４が積層される。   In the dicing process, for example, a dicing apparatus 100 as shown in FIG. 7 is used. The dicing apparatus 100 includes a pedestal 102 on which a semiconductor wafer 101 is set, a saw blade 103 for cutting the semiconductor wafer 101, a temporary fixing sheet 104 provided on the pedestal 102 and holding the semiconductor wafer 101, and a temporary fixing sheet 104. An expanding sheet 105 to be expanded, and a control unit 106 for controlling the pedestal 102, the saw blade 103, and the expanding sheet 105 are provided. The expanded sheet 105 is held on the pedestal 102 by a vacuum adsorption tower, and a temporarily fixed sheet 104 is laminated on the upper surface.

制御部１０６は、所定のタイミングで台座１０２を所定角度だけ回転させるとともに、ソーブレード１０３を駆動させることにより、図８（ａ）に示すように、所定の方向に半導体ウエハ１０１を切断させる。また、制御部１０６は、図８（ｂ）に示すように、半導体ウエハ１０１の切断後、エクスパンドシート１０５を伸張することにより、半導体ウエハ１０１を複数の半導体チップに個片化する。   The control unit 106 rotates the pedestal 102 by a predetermined angle at a predetermined timing and drives the saw blade 103 to cut the semiconductor wafer 101 in a predetermined direction as shown in FIG. Further, as shown in FIG. 8B, the control unit 106 divides the semiconductor wafer 101 into a plurality of semiconductor chips by extending the expanded sheet 105 after cutting the semiconductor wafer 101.

個片化された各半導体チップ１１０は、図９（ａ）に示すように、フィルム状あるいはペースト状の接着剤層１１１を介して、半導体集積回路の基板１１２に実装される。接着剤層１１１は、バインダー樹脂中に導電性粒子を分散させて形成された異方性導電接着フィルムや導電性接着ペースト、あるいは導電性粒子を含まない絶縁性接着フィルムや絶縁性接着ペーストが用いられる。   Each separated semiconductor chip 110 is mounted on a substrate 112 of a semiconductor integrated circuit via a film-like or paste-like adhesive layer 111 as shown in FIG. 9A. For the adhesive layer 111, an anisotropic conductive adhesive film or conductive adhesive paste formed by dispersing conductive particles in a binder resin, or an insulating adhesive film or insulating adhesive paste that does not contain conductive particles is used. It is done.

接着剤層１１１は、予め基板１１２の実装部に設けられる。そして、個片化された各半導体チップ１１０は、接着剤層１１１上に配置された後、図９（ｂ）に示すように、加熱ボンダー１１３によって所定の温度、圧力、時間だけ加熱押圧される。これにより、接着剤層１１１のバインダー樹脂が溶融し、対向する半導体チップ１１０及び基板１１２の各電極間から流出すると共に導電性粒子が挟持される。この状態でバインダー樹脂が硬化することにより、半導体チップ１１０は、基板１１２の実装部との導通が図られるとともに、基板１１２に接続される。   The adhesive layer 111 is provided in advance on the mounting portion of the substrate 112. Then, after the individual semiconductor chips 110 are arranged on the adhesive layer 111, as shown in FIG. 9B, they are heated and pressed by a heating bonder 113 for a predetermined temperature, pressure, and time. . As a result, the binder resin of the adhesive layer 111 is melted, flows out between the electrodes of the semiconductor chip 110 and the substrate 112 facing each other, and the conductive particles are sandwiched. By curing the binder resin in this state, the semiconductor chip 110 is connected to the mounting portion of the substrate 112 and connected to the substrate 112.

なお、接着剤層１１１として、絶縁性接着フィルムや絶縁性接着ペーストを用いた場合には、半導体チップ１１０に設けられたバンプ電極が基板１１２の電極と当接することにより導通が図られる。   In the case where an insulating adhesive film or an insulating adhesive paste is used as the adhesive layer 111, the bump electrode provided on the semiconductor chip 110 is brought into contact with the electrode of the substrate 112 so that conduction is achieved.

ところで、上述した半導体集積回路の製造方法においては、複数のサイズで形成される半導体チップ１１０に応じて、複数のサイズで接着剤層１１１を形成し基板１１２上に配置する必要がある。このため同一基板上に複数のサイズの半導体チップ１１０を実装する場合などでは、一律に機械によって各種サイズの接着剤層１１１を配置することが困難であり、製造工数やタクトタイムが増加する。   By the way, in the above-described method for manufacturing a semiconductor integrated circuit, it is necessary to form the adhesive layer 111 in a plurality of sizes and dispose it on the substrate 112 in accordance with the semiconductor chip 110 formed in a plurality of sizes. For this reason, when mounting a plurality of sizes of semiconductor chips 110 on the same substrate, it is difficult to uniformly arrange the adhesive layers 111 of various sizes by a machine, which increases the number of manufacturing steps and tact time.

また、各種半導体チップ１１０のサイズに応じて導電性接着フィルムを形成することや、各種半導体チップ１１０のサイズに応じて導電性接着フィルムを切断することは、製造コストの増加や、切断による廃棄ロスが生じてしまう。   In addition, forming a conductive adhesive film according to the size of various semiconductor chips 110, or cutting the conductive adhesive film according to the size of various semiconductor chips 110, increases the manufacturing cost and causes a loss due to cutting. Will occur.

そこで、図１０に示すように、半導体ウエハ１０１の切断に先立って、予め半導体ウエハ１０１の表面に接着剤層１１１となる接着フィルム１１５を貼着する工法も提案されている。かかる工法によれば、接着フィルム１１５を複数の半導体素子が形成された半導体ウエハ１０１表面に接着した後、ダイシングにより接着フィルム１１５及び半導体チップ１１０を一括して個片化する。これにより、半導体チップ１１０の大きさに合わせた接着フィルム１１５を用意し、それを基板１１２上に供給する必要がなく、また実装コストの削減が図られる。   Therefore, as shown in FIG. 10, prior to cutting the semiconductor wafer 101, a method of attaching an adhesive film 115 to be the adhesive layer 111 to the surface of the semiconductor wafer 101 in advance has been proposed. According to this construction method, after bonding the adhesive film 115 to the surface of the semiconductor wafer 101 on which a plurality of semiconductor elements are formed, the adhesive film 115 and the semiconductor chip 110 are collectively separated by dicing. Thus, it is not necessary to prepare an adhesive film 115 that matches the size of the semiconductor chip 110 and supply it to the substrate 112, and the mounting cost can be reduced.

特開２００８−１３０７００号公報JP 2008-130700 A 特階２００１−２３７２６８号公報Special Floor 2001-237268

しかし、ダイシングにより接着剤層１１１及び半導体チップ１１０を一括して個片化する工法では、接着剤層１１１として異方性導電接着フィルムや異方性導電接着ペーストを用いた場合、バインダー樹脂中に分散されている導電性粒子が接着剤層１１１の視認性を著しく悪化させてしまい、接着剤層１１１を通じて半導体ウエハ１０１の表面に設けられたスクライブラインを視認することが困難となってしまう。   However, in the construction method in which the adhesive layer 111 and the semiconductor chip 110 are separated into one piece by dicing, when an anisotropic conductive adhesive film or an anisotropic conductive adhesive paste is used as the adhesive layer 111, the binder resin The dispersed conductive particles remarkably deteriorate the visibility of the adhesive layer 111, and it becomes difficult to visually recognize the scribe line provided on the surface of the semiconductor wafer 101 through the adhesive layer 111.

また、異方性導電接着フィルムや絶縁性接着フィルムなどの半導体実装用の樹脂は、線膨張係数を下げるために、フィラーを添加することが必須となっている。しかし、このフィラーが接着剤層１１１の視認性を更に悪化させている。また、通常、フィラーにはシリカが用いられているが、シリカの添加量を減らしたり、シリカよりも視認性を悪化させないアルミナ等のフィラーを添加したりすることで接着剤層１１１の視認性を改善することはできるが、線膨張係数を下げる効果が不十分となり、基板１１２と半導体チップ１１０との導通信頼性が低くなってしまう。   Moreover, it is essential to add a filler to a resin for semiconductor mounting such as an anisotropic conductive adhesive film or an insulating adhesive film in order to lower the linear expansion coefficient. However, this filler further deteriorates the visibility of the adhesive layer 111. Also, silica is usually used as the filler, but the visibility of the adhesive layer 111 can be increased by reducing the amount of silica added or by adding a filler such as alumina that does not deteriorate the visibility compared to silica. Although it can be improved, the effect of lowering the linear expansion coefficient becomes insufficient, and the conduction reliability between the substrate 112 and the semiconductor chip 110 is lowered.

さらに、ソーブレード１０３によるダイシングには、切断箇所に水を吹き付けながらダイシングを行うことから、水による接着剤層１１１の製品寿命や性能の劣化が懸念される。また、ダイシングの際に発生する切り粉や塵埃が接着剤層１１１に付着することによる接続不良の危険もある。また、かかる水や切り粉等による悪影響を抑えるために、接着剤層１１１に透明なカバーフィルムを貼り付けることも提案されているが、ダイシング後に個片化された半導体チップ１１０の接着剤層１１１よりカバーフィルムを剥離することは困難且つ煩雑となる。   Furthermore, dicing by the saw blade 103 is performed while water is sprayed on the cut portion, so there is a concern that the product life and performance of the adhesive layer 111 may deteriorate due to water. Further, there is a risk of poor connection due to chips and dust generated during dicing adhering to the adhesive layer 111. In addition, in order to suppress adverse effects due to such water and chips, it has also been proposed to attach a transparent cover film to the adhesive layer 111, but the adhesive layer 111 of the semiconductor chip 110 separated into pieces after dicing is proposed. It is more difficult and complicated to peel the cover film.

そこで、本発明は、ダイシング工程におけるスクライブラインの視認性を悪化させることなく、また接着剤層１１１を個々の半導体チップ１１０に簡易に貼着することができるウエハのダイシング方法、実装方法、接着剤層付きチップの製造方法、実装体を提供することを目的とする。   Accordingly, the present invention provides a wafer dicing method, mounting method, and adhesive that can easily attach the adhesive layer 111 to each semiconductor chip 110 without deteriorating the visibility of the scribe line in the dicing process. An object of the present invention is to provide a method for manufacturing a chip with a layer and a mounting body.

上述した課題を解決するために、本発明に係るウエハのダイシング方法は、ダイシングシート上にウエハを載置する載置工程と、上記ウエハを複数のチップにダイシングするダイシング工程と、上記ダイシング工程の後に、上記ウエハの表面に接着剤層を形成する接着剤層形成工程と、上記ウエハが載置された上記ダイシングシートを伸張させることにより上記ウエハ及び上記接着剤層を個片化するエクスパンド工程とを備えるものである。   In order to solve the above-described problems, a wafer dicing method according to the present invention includes a placing step of placing a wafer on a dicing sheet, a dicing step of dicing the wafer into a plurality of chips, and the dicing step. An adhesive layer forming step of forming an adhesive layer on the surface of the wafer, and an expanding step of separating the wafer and the adhesive layer by stretching the dicing sheet on which the wafer is placed; Is provided.

また、本発明に係る実装方法は、ダイシングシート上にウエハを載置する載置工程と、上記ウエハを複数のチップにダイシングするダイシング工程と、上記ダイシング工程の後に、上記ウエハの表面に接着剤層を形成する接着剤層形成工程と、上記ウエハが載置された上記ダイシングシートを伸張させることにより上記ウエハ及び上記接着剤層を個片化するエクスパンド工程と、上記個片化された上記ウエハを、上記接着剤層を介して基板の実装部に実装する実装工程とを備えるものである。   Further, the mounting method according to the present invention includes a mounting step of mounting a wafer on a dicing sheet, a dicing step of dicing the wafer into a plurality of chips, and an adhesive on the surface of the wafer after the dicing step. An adhesive layer forming step for forming a layer; an expanding step for separating the wafer and the adhesive layer by stretching the dicing sheet on which the wafer is placed; and the wafer that has been separated into pieces. Is mounted on the mounting portion of the substrate via the adhesive layer.

また、本発明に係る接着剤層付きチップの製造方法は、ダイシングシート上にウエハを載置する載置工程と、上記ウエハを複数のチップにダイシングするダイシング工程と、上記ダイシング工程の後に、上記ウエハの表面に接着剤層を形成する接着剤層形成工程と、上記ウエハが載置された上記ダイシングシートを伸張させることにより上記ウエハ及び上記接着剤層を個片化するエクスパンド工程とを備えるものである。   Moreover, the manufacturing method of the chip | tip with an adhesive layer which concerns on this invention is the above-mentioned after the mounting process which mounts a wafer on a dicing sheet, the dicing process which dices the said wafer into several chip | tips, and the said dicing process. An adhesive layer forming step for forming an adhesive layer on the surface of the wafer; and an expanding step for separating the wafer and the adhesive layer by stretching the dicing sheet on which the wafer is placed. It is.

また、本発明に係る実装体は、上記記載の方法により製造されたものである。   The mounting body according to the present invention is manufactured by the above-described method.

本発明によれば、ウエハのダイシング後に接着面に接着剤層が形成される。したがって、ウエハは、接着剤層がスクライブラインの視認性を損なうことがなく、確実に所定のダイシング処理を行うことができる。また、接着剤層は、ダイシング工程において発生する切り粉や塵埃、ノズルより供給される水等の影響を受けることがなく、製品寿命の劣化もなく、また導通信頼性を確保することができる。   According to the present invention, an adhesive layer is formed on the bonding surface after dicing the wafer. Therefore, the wafer can be reliably subjected to a predetermined dicing process without the adhesive layer impairing the visibility of the scribe line. In addition, the adhesive layer is not affected by chips or dust generated in the dicing process, water supplied from the nozzle, or the like, the product life is not deteriorated, and the conduction reliability can be ensured.

本実施の形態に係るウエハのダイシング方法の工程を示す図である。It is a figure which shows the process of the dicing method of the wafer which concerns on this Embodiment. 本実施の形態に用いることができるダイシング装置を示す側面図である。It is a side view which shows the dicing apparatus which can be used for this Embodiment. 載置工程及びダイシング工程を示す側面図である。It is a side view which shows a mounting process and a dicing process. 接着剤層形成工程を示す側面図である。It is a side view which shows an adhesive bond layer formation process. エクスパンド工程を示す側面図である。It is a side view which shows an expanding process. 半導体チップの実装工程を示す側面図である。It is a side view which shows the mounting process of a semiconductor chip. ダイシング装置を示す斜視図である。It is a perspective view which shows a dicing apparatus. ウエハのダイシング工程及びエクスパンド工程を示す平面図である。It is a top view which shows a wafer dicing process and an expanding process. 従来の半導体チップの実装工程を示す側面図であり、（ａ）は接着フィルム及び半導体チップの配置工程、（ｂ）は加熱ボンダーによる接着工程を示す。It is a side view which shows the mounting process of the conventional semiconductor chip, (a) shows the arrangement | positioning process of an adhesive film and a semiconductor chip, (b) shows the adhesion process by a heating bonder. 接着フィルム付きウエハを切断する工程を示す側面図である。It is a side view which shows the process of cut | disconnecting the wafer with an adhesive film.

以下、本発明が適用されたウエハのダイシング方法、実装方法、接着剤層付きチップの製造方法、実装体について、図面を参照しながら詳細に説明する。   Hereinafter, a wafer dicing method, a mounting method, a manufacturing method of a chip with an adhesive layer, and a mounting body to which the present invention is applied will be described in detail with reference to the drawings.

図１に示すように、本実施の形態に係るウエハのダイシング方法は、載置工程と、ダイシング工程と、接着剤層形成工程と、エクスパンド工程とを有する。本実施の形態に係るウエハのダイシング方法は、例えば図２に示すダイシング装置１を用いて行うことができる。   As shown in FIG. 1, the wafer dicing method according to the present embodiment includes a placing process, a dicing process, an adhesive layer forming process, and an expanding process. The wafer dicing method according to the present embodiment can be performed using, for example, the dicing apparatus 1 shown in FIG.

［ダイシング装置１］
ダイシング装置１は、ウエハ２０を保持した治具２２が載置されるチャックテーブル２と、チャックテーブル２の位置を調整するアライメントステージ３と、ウエハ２０のスクライブラインを視認するための撮像部４と、ウエハ２０のダイシングを行う切削部５と、ダイシング部分に水を供給するノズル６と、装置全体を制御する制御部７とを備える。 [Dicing machine 1]
The dicing apparatus 1 includes a chuck table 2 on which a jig 22 holding a wafer 20 is placed, an alignment stage 3 that adjusts the position of the chuck table 2, and an imaging unit 4 that visually recognizes a scribe line of the wafer 20. A cutting unit 5 for dicing the wafer 20, a nozzle 6 for supplying water to the dicing part, and a control unit 7 for controlling the entire apparatus are provided.

チャックテーブル２は、例えば、図示しない減圧装置により治具２２を吸引、固定する。アライメントステージ３は、制御部７の指示に基づいて、チャックテーブル２を図２中ｘ方向およびｙ方向に移動させる。   For example, the chuck table 2 sucks and fixes the jig 22 by a decompression device (not shown). The alignment stage 3 moves the chuck table 2 in the x and y directions in FIG. 2 based on instructions from the control unit 7.

撮像部４は、例えば、赤外線カメラで構成され、ウエハ２０の表面、すなわち、ウエハ２０の接着面２０ａで反射した光を受光する光学系と、光学系が捉えた像を撮像する撮像素子とを有する。撮像部４は、例えば、ウエハ２０の接着面２０ａあるいは載置面２０ｂ側から光を照射し、ウエハ２０の接着面２０ａからの反射光あるいはウエハ２０を透過した透過光を受光することにより、ウエハ２０の接着面２０ａの画像を撮像する。そして、撮像部４は、撮像した画像の情報を制御部７に送信する。   The imaging unit 4 includes, for example, an infrared camera, and includes an optical system that receives light reflected by the surface of the wafer 20, that is, the adhesive surface 20 a of the wafer 20, and an imaging device that captures an image captured by the optical system. Have. For example, the imaging unit 4 irradiates light from the bonding surface 20 a or the mounting surface 20 b of the wafer 20 and receives reflected light from the bonding surface 20 a of the wafer 20 or transmitted light that has passed through the wafer 20, thereby allowing the wafer to be captured. An image of 20 adhesive surfaces 20a is taken. Then, the imaging unit 4 transmits information on the captured image to the control unit 7.

切削部５は、制御部７の指示に基づいて、ウエハ２０を切削する。切削部５は、例えば、ウエハ２０を切削するブレード８を有する。切削部５は、回転するブレード８をウエハ２０のスクライブラインに沿って押圧して、ウエハ２０を切削する。ノズル６は、制御部７の指示に基づいて、ブレード８によるダイシング部分に水を供給する。   The cutting unit 5 cuts the wafer 20 based on an instruction from the control unit 7. The cutting unit 5 includes, for example, a blade 8 that cuts the wafer 20. The cutting unit 5 presses the rotating blade 8 along the scribe line of the wafer 20 to cut the wafer 20. The nozzle 6 supplies water to a dicing portion by the blade 8 based on an instruction from the control unit 7.

制御部７は、撮像部４が撮影した画像を処理する画像処理部９と、画像処理部９からウエハ２０のスクライブラインに関する情報を受けとりアライメントステージ３及び切削部５を駆動する駆動部１０と、切削部５のダイシング動作に応じてノズル６からダイシング部分に水を供給させるノズル制御部１１とを有する。   The control unit 7 includes an image processing unit 9 that processes an image captured by the imaging unit 4, a drive unit 10 that receives information on the scribe line of the wafer 20 from the image processing unit 9 and drives the alignment stage 3 and the cutting unit 5. And a nozzle control unit 11 that supplies water from the nozzle 6 to the dicing portion in accordance with the dicing operation of the cutting unit 5.

［載置工程］
次いで、図３を参照してダイシング装置１のチャックテーブル２にウエハ２０を載置する載置工程について説明する。ウエハ２０は、ダイシング装置１によって複数の半導体チップ３０に個片化されるものであり、例えばシリコンウエハ等の半導体ウエハが挙げられる。ウエハ２０は、一方の表面を半導体チップ３０に個片化されたときに接着剤層３１を介して基板３３の実装部に形成された基板電極３４と導通接続される接着面２０ａとし、他方の面をダイシングテープ２１に貼着されることにより治具２２に固定される載置面２０ｂとする。ウエハ２０の接着面２０ａは、スクライブライン２５によって区分される各半導体チップ３０毎に、基板３３側の電極と導通接続されるチップ電極３２が設けられている。 [Placement process]
Next, with reference to FIG. 3, a mounting process for mounting the wafer 20 on the chuck table 2 of the dicing apparatus 1 will be described. The wafer 20 is separated into a plurality of semiconductor chips 30 by the dicing apparatus 1, and examples thereof include a semiconductor wafer such as a silicon wafer. The wafer 20 has an adhesive surface 20a that is electrically connected to the substrate electrode 34 formed on the mounting portion of the substrate 33 via the adhesive layer 31 when the one surface is separated into semiconductor chips 30 and the other surface. The surface is a mounting surface 20 b that is fixed to the jig 22 by being attached to the dicing tape 21. On the bonding surface 20 a of the wafer 20, a chip electrode 32 that is conductively connected to an electrode on the substrate 33 side is provided for each semiconductor chip 30 divided by the scribe line 25.

ウエハ２０を固定する治具２２は、例えば、ウエハ２０の直径よりも大きな直径を有するリング状又は枠状のフレーム２３と、フレーム２３に貼り付けられたダイシングテープ２１とを備えている。フレーム２３は、チャックテーブル２の指示によって図２中ｘ方向及びｙ方向にエクスパンド可能に設けられている。   The jig 22 for fixing the wafer 20 includes, for example, a ring-shaped or frame-shaped frame 23 having a diameter larger than the diameter of the wafer 20 and a dicing tape 21 attached to the frame 23. The frame 23 is provided so as to be expandable in the x direction and the y direction in FIG.

ダイシングテープ２１は、ウエハ２０の載置面２０ｂが貼り付けられるものであり、ダイシング工程においてウエハ２０を固定すると共に、半導体チップ３０に分割された各チップのチップ飛びなどを防止するものである。また、ダイシングテープ２１は、エクスパンド性を有し、ダイシングされたウエハ２０を複数の半導体チップ３０に個片化させるものである。   The dicing tape 21 is attached to the mounting surface 20 b of the wafer 20, and fixes the wafer 20 in the dicing process and prevents chip jumps of the chips divided into the semiconductor chips 30. The dicing tape 21 has expandability, and diced wafer 20 is divided into a plurality of semiconductor chips 30.

ダイシングテープ２１は、例えば、フレーム２３の一方の面の側に貼り付けられ、フレーム２３の内側に展張されている。ダイシングテープ２１としては、例えば、紫外線を照射することにより剥離力が小さくなる粘着フィルムが用いられる。これにより、ダイシングテープ２１は、ウエハ２０が複数の半導体チップ３０に個片化された後、紫外線が照射されることで、個々の半導体チップ３０をピックアップするときに半導体チップ３０を容易に分離することができる。   For example, the dicing tape 21 is affixed to one surface side of the frame 23 and is spread inside the frame 23. As the dicing tape 21, for example, an adhesive film whose peeling force is reduced by irradiating ultraviolet rays is used. Thus, the dicing tape 21 is easily separated when the individual semiconductor chips 30 are picked up by being irradiated with ultraviolet rays after the wafer 20 is separated into a plurality of semiconductor chips 30. be able to.

載置工程では、ダイシングテープ２１に、ウエハ２０が、例えば、治具２２の一方の面の中央部に貼り付けられる。   In the mounting process, the wafer 20 is attached to the dicing tape 21 at, for example, the center of one surface of the jig 22.

［ダイシング工程］
治具２２にウエハ２０が固定されると、ウエハ２０を切断するスクライブライン２５を確定するために、撮像部４によるウエハ２０の接着面２０ａの撮像が行われる。撮像は、撮像部４と対峙するウエハ２０の接着面２０ａ側から光を照射して接着面２０ａからの反射光を撮像部４によって受光することにより行うことができる。また、撮像は、チャックテーブル２からウエハ２０の載置面２０ｂに向かってウエハ２０の接着面２０ａまで透過する光を照射し、この透過光を撮像部４によって受光してもよい。 [Dicing process]
When the wafer 20 is fixed to the jig 22, the imaging of the bonding surface 20 a of the wafer 20 is performed by the imaging unit 4 in order to determine the scribe line 25 for cutting the wafer 20. Imaging can be performed by irradiating light from the bonding surface 20 a side of the wafer 20 facing the imaging unit 4 and receiving reflected light from the bonding surface 20 a by the imaging unit 4. Alternatively, the imaging may be performed by irradiating light that passes from the chuck table 2 toward the mounting surface 20 b of the wafer 20 to the bonding surface 20 a of the wafer 20 and receiving the transmitted light by the imaging unit 4.

撮像部４は、撮像した画像情報を制御部７に送信する。制御部７は、画像処理部９によりこの画像情報から所定のスクライブライン２５を決定する。そして、制御部７は、駆動部１０が画像処理部９によって決定されたスクライブライン２５に沿ってウエハ２０を切断するようにアライメントステージ３及び切削部５を駆動する。   The imaging unit 4 transmits the captured image information to the control unit 7. The controller 7 determines a predetermined scribe line 25 from the image information by the image processor 9. Then, the control unit 7 drives the alignment stage 3 and the cutting unit 5 so that the driving unit 10 cuts the wafer 20 along the scribe line 25 determined by the image processing unit 9.

例えば、スクライブライン２５に沿ってウエハ２０を図２中ｘ方向に分割する場合、駆動部１０は、アライメントステージ３を駆動してスクライブライン２５の一端がブレード８の下方に位置するようにチャックテーブル２を移動させる。次いで、駆動部１０は、切削部５を駆動して、ブレード８を回転させた状態で切削部５を降下させ、ブレード８によってウエハ２０を切削する。続いて、駆動部１０は、アライメントステージ３を駆動して、ウエハ２０をｘ方向に移動させていく。   For example, when the wafer 20 is divided in the x direction in FIG. 2 along the scribe line 25, the driving unit 10 drives the alignment stage 3 so that one end of the scribe line 25 is positioned below the blade 8. Move 2. Next, the driving unit 10 drives the cutting unit 5 to lower the cutting unit 5 while rotating the blade 8, and cuts the wafer 20 with the blade 8. Subsequently, the driving unit 10 drives the alignment stage 3 to move the wafer 20 in the x direction.

このように、ダイシング工程では、スクライブライン２５に沿ってウエハ２０を所定方向に切断することで、複数の半導体チップ３０に分割することができる。このとき、ウエハ２０は、載置面２０ｂがダイシングテープ２１に貼着されているため、複数の半導体チップ３０に分割された各チップのチップ飛びもなく、円盤状に保持されている。   As described above, in the dicing process, the wafer 20 can be divided into a plurality of semiconductor chips 30 by cutting the wafer 20 in a predetermined direction along the scribe line 25. At this time, since the mounting surface 20b is stuck to the dicing tape 21, the wafer 20 is held in a disk shape without chip skipping of each chip divided into the plurality of semiconductor chips 30.

なお、ダイシング工程では、ノズル制御部１１によって、ノズル６よりダイシング部分に水が供給される。   In the dicing process, the nozzle controller 11 supplies water from the nozzle 6 to the dicing portion.

［接着剤層形成工程］
次いで、図４に示すように、ウエハ２０の接着面２０ａに接着剤層３１が形成される。接着剤層３１は、バインダー樹脂中に導電性粒子を分散させて形成された異方性導電接着フィルム（ＡＣＦ：Anisotropic Conductive Film）や導電性接着ペースト、あるいは導電性粒子を含まない絶縁性接着フィルム（ＮＣＦ：Non Particle Conductive Film）や絶縁性接着ペースト、ＡＣＦとＮＣＦとを積層したものなどを用いて形成される。なお、接着剤層として、導電性接着ペーストや絶縁性接着ペーストを用いる場合、ウエハ２０の接着面２０ａに積層する前に、予め導電性接着ペーストや絶縁性接着ペーストを１００℃程度に加熱することによりＢステージ化しておく。 [Adhesive layer forming step]
Next, as shown in FIG. 4, an adhesive layer 31 is formed on the bonding surface 20 a of the wafer 20. The adhesive layer 31 includes an anisotropic conductive adhesive film (ACF) formed by dispersing conductive particles in a binder resin, a conductive adhesive paste, or an insulating adhesive film that does not contain conductive particles. (NCF: Non Particle Conductive Film), an insulating adhesive paste, or a laminate of ACF and NCF. In the case where a conductive adhesive paste or an insulating adhesive paste is used as the adhesive layer, the conductive adhesive paste or the insulating adhesive paste is preheated to about 100 ° C. before being laminated on the adhesive surface 20a of the wafer 20. To B stage.

接着剤層３１は、例えば、膜形成樹脂、液状硬化成分及び硬化剤を含んでいる。また、接着剤層３１は、例えば、各種ゴム成分、柔軟剤、各種フィラー類等の添加剤を含んでいてもよい。   The adhesive layer 31 includes, for example, a film forming resin, a liquid curing component, and a curing agent. The adhesive layer 31 may contain additives such as various rubber components, softeners, various fillers, and the like.

膜形成樹脂としては、フェノキシ樹脂、ポリエステル樹脂、ポリアミド樹脂、ポリイミド樹脂を例示できる。膜形成樹脂は、材料の入手の容易さ及び接続信頼性の観点から、フェノキシ樹脂を含むことが好ましい。液状硬化成分としては、液状エポキシ樹脂、アクリレートを例示できる。液状硬化成分は、接続信頼性及び硬化物の安定性の観点から、２以上の官能基を有することが好ましい。硬化剤としては、液状硬化成分が液状エポキシ樹脂の場合は、イミダゾール、アミン類、スルホニウム塩、オニウム塩、フェノール類を例示できる。液状硬化成分がアクリレートの場合には、硬化剤として有機過酸化物を例示できる。   Examples of the film forming resin include phenoxy resin, polyester resin, polyamide resin, and polyimide resin. The film-forming resin preferably contains a phenoxy resin from the viewpoint of easy availability of materials and connection reliability. Examples of the liquid curing component include liquid epoxy resins and acrylates. The liquid curing component preferably has two or more functional groups from the viewpoint of connection reliability and stability of the cured product. Examples of the curing agent include imidazole, amines, sulfonium salts, onium salts, and phenols when the liquid curing component is a liquid epoxy resin. When the liquid curing component is an acrylate, an organic peroxide can be exemplified as the curing agent.

異方性導電接着フィルムや導電性接着ペーストに含有される導電性粒子としては、異方性導電フィルムにおいて使用されている公知の何れの導電性粒子を挙げることができ、例えば、ニッケル、鉄、銅、アルミニウム、錫、鉛、クロム、コバルト、銀、金等の各種金属や金属合金の粒子、金属酸化物、カーボン、グラファイト、ガラス、セラミック、プラスチック等の粒子の表面に金属をコートしたもの、或いは、これらの粒子の表面に更に絶縁薄膜をコートしたもの等が挙げられる。樹脂粒子の表面に金属をコートしたものである場合、樹脂粒子としては、例えば、エポキシ樹脂、フェノール樹脂、アクリル樹脂、アクリロニトリル・スチレン（ＡＳ）樹脂、ベンゾグアナミン樹脂、ジビニルベンゼン系樹脂、スチレン系樹脂等の粒子を挙げることができる。   Examples of the conductive particles contained in the anisotropic conductive adhesive film and the conductive adhesive paste include any known conductive particles used in anisotropic conductive films, such as nickel, iron, Various metal and metal alloy particles such as copper, aluminum, tin, lead, chromium, cobalt, silver, gold, etc., metal oxide, carbon, graphite, glass, ceramic, plastic, etc. Or what coated the surface of these particle | grains further with the insulating thin film etc. are mentioned. In the case where the surface of the resin particle is coated with metal, examples of the resin particle include an epoxy resin, a phenol resin, an acrylic resin, an acrylonitrile / styrene (AS) resin, a benzoguanamine resin, a divinylbenzene resin, a styrene resin, and the like. Can be mentioned.

なお、異方性導電接着フィルムや絶縁性接着フィルムは、取り扱いの容易さ、保存安定性等の見地から、剥離処理が施されたＰＥＴ等の剥離フィルム上に塗布形成される。異方性導電接着フィルムや絶縁性接着フィルムは、ウエハ２０の接着面２０ａには剥離フィルムが設けられた面と反対側の面が貼着される。また、異方性導電接着フィルムや絶縁性接着フィルムの形状は、ウエハ２０と同一形状の例えば円形状に形成される。   In addition, the anisotropic conductive adhesive film and the insulating adhesive film are formed by coating on a release film such as PET subjected to a release treatment from the viewpoint of easy handling and storage stability. In the anisotropic conductive adhesive film and the insulating adhesive film, the surface opposite to the surface on which the release film is provided is attached to the adhesive surface 20 a of the wafer 20. Further, the anisotropic conductive adhesive film and the insulating adhesive film are formed in the same shape as the wafer 20, for example, in a circular shape.

接着剤層の形成工程では、ウエハ２０の接着面２０ａに異方性導電接着フィルムや絶縁性接着フィルムが配置される。次いで、図示しない加熱ボンダーによって、剥離フィルムの上から異方性導電接着フィルムや絶縁性接着フィルムに流動性が生じるが本硬化は生じない程度の所定の温度、圧力、時間で加熱押圧される。これによりウエハ２０は、接着面２０ａに異方性導電接着フィルムや絶縁性接着フィルムからなる接着剤層３１が形成される。接着剤層３１の形成後、剥離フィルムは剥離される。   In the step of forming the adhesive layer, an anisotropic conductive adhesive film or an insulating adhesive film is disposed on the adhesive surface 20 a of the wafer 20. Next, a heat bonder (not shown) is heated and pressed from above the release film at a predetermined temperature, pressure, and time such that fluidity occurs in the anisotropic conductive adhesive film and the insulating adhesive film, but main curing does not occur. Thereby, the adhesive layer 31 which consists of an anisotropic conductive adhesive film and an insulating adhesive film is formed in the wafer 20 at the adhesive surface 20a. After the formation of the adhesive layer 31, the release film is peeled off.

なお、加熱ボンダーは、ウエハ２０との間にシリコーンゴム等の弾性体を介在して加熱押圧してもよい。弾性体を介在させることにより、加熱ボンダーは、ウエハ２０の全面に亘って均等に圧力をかけることができる。   The heating bonder may be heated and pressed by interposing an elastic body such as silicone rubber between the wafer 20. By interposing the elastic body, the heating bonder can apply pressure evenly over the entire surface of the wafer 20.

［エクスパンド工程］
次いで、図５に示すように、ウエハ２０をエクスパンドすることにより各半導体チップ３０毎に個片化する。このエクスパンド工程では、チャックテーブル２の指示によってダイシングテープ２１が図２中ｘ方向及びｙ方向に亘って水平方向に伸張される。これにより、ウエハ２０は、スクライブライン２５に沿って分割された複数の半導体チップ３０毎に個片化される。 [Expanding process]
Next, as shown in FIG. 5, the wafer 20 is expanded to be separated into individual semiconductor chips 30. In this expanding step, the dicing tape 21 is stretched in the horizontal direction in the x and y directions in FIG. As a result, the wafer 20 is separated into pieces for each of the plurality of semiconductor chips 30 divided along the scribe line 25.

このとき、ウエハ２０の接着面２０ａに形成された接着剤層３１は、ウエハ２０が個々の半導体チップ３０に個片化されると同時に、エクスパンドによる応力によりスクライブライン２５に沿って半導体チップ３０と同形状に切断される。したがって、エクスパンド工程により、接着剤層３１が形成されたウエハ２０は、基板３３への実装面に接着剤層３１が設けられた複数の半導体チップ３０毎に個片化される。   At this time, the adhesive layer 31 formed on the bonding surface 20a of the wafer 20 is separated from the semiconductor chip 30 along the scribe line 25 by the stress caused by the expansion while the wafer 20 is separated into individual semiconductor chips 30. Cut into the same shape. Therefore, the wafer 20 on which the adhesive layer 31 is formed by the expanding process is divided into pieces for each of the plurality of semiconductor chips 30 provided with the adhesive layer 31 on the mounting surface to the substrate 33.

その後、ダイシングテープ２１に紫外線を照射するなどにより粘着力を減じさせた後、各接着剤層３１付き半導体チップ３０を引っ張ることで、ダイシングテープ２１より剥離する。これにより、接着剤層３１が形成されたウエハ２０より、複数の接着剤層３１付き半導体チップ３０が形成される。この接着剤層３１付き半導体チップ３０は、ウエハ２０の接着面２０ａであった面が、基板３３の基板電極３４と導通接続されるチップ電極３２が形成された接着面３０ａとなり、この載置面３０ａに接着剤層３１が形成されている。   Thereafter, after the adhesive force is reduced by irradiating the dicing tape 21 with ultraviolet rays or the like, the semiconductor chip 30 with the adhesive layer 31 is pulled to peel off the dicing tape 21. As a result, a plurality of semiconductor chips 30 with the adhesive layers 31 are formed from the wafer 20 on which the adhesive layers 31 are formed. In the semiconductor chip 30 with the adhesive layer 31, the surface that was the adhesive surface 20 a of the wafer 20 becomes an adhesive surface 30 a on which the chip electrode 32 that is conductively connected to the substrate electrode 34 of the substrate 33 is formed. An adhesive layer 31 is formed on 30a.

なお、半導体チップ３０は、接着剤層３１として絶縁性接着フィルムを用いる場合には、チップ電極３２として、バンプ電極を形成してもよい。   In the semiconductor chip 30, when an insulating adhesive film is used as the adhesive layer 31, a bump electrode may be formed as the chip electrode 32.

このように、本実施の形態に係るウエハのダイシング方法及び接着剤層付き半導体チップの製造方法によれば、ウエハ２０のダイシング後に接着面２０ａに接着剤層３１が形成される。したがって、ウエハ２０は、接着剤層３１がスクライブライン２５の視認性を損なうことがなく、確実に所定のダイシング処理を行うことができる。また、接着剤層３１は、ダイシング工程において発生する切り粉や塵埃、ノズル６より供給される水等の影響を受けることがなく、製品寿命の劣化もなく、また導通信頼性を確保することができる。   As described above, according to the wafer dicing method and the method of manufacturing the semiconductor chip with the adhesive layer according to the present embodiment, the adhesive layer 31 is formed on the adhesive surface 20a after the wafer 20 is diced. Therefore, the wafer 20 can be reliably subjected to predetermined dicing without the adhesive layer 31 impairing the visibility of the scribe line 25. In addition, the adhesive layer 31 is not affected by chips or dust generated in the dicing process, water supplied from the nozzle 6, etc., is not deteriorated in product life, and can secure conduction reliability. it can.

また、本実施の形態に係るウエハのダイシング方法及び接着剤層付き半導体チップの製造方法によれば、ウエハ２０のダイシング工程までは、従来の工法を用いることができ、製造設備や製造工程の大きな変更を伴うことなく導入できる。また、ダイシング工程の後に接着剤層を形成するため、接着剤層３１の材料として、視認性の低い導電性接着フィルムやフィラー充填量の多い絶縁性接着フィルムを用いることができ、接着剤層３１の線膨張係数を降下させることができる。   Further, according to the wafer dicing method and the method of manufacturing the semiconductor chip with an adhesive layer according to the present embodiment, the conventional method can be used until the dicing process of the wafer 20, and the manufacturing equipment and the manufacturing process are large. Can be introduced without change. In addition, since the adhesive layer is formed after the dicing process, a conductive adhesive film with low visibility or an insulating adhesive film with a large filler filling amount can be used as the material of the adhesive layer 31. The linear expansion coefficient can be lowered.

［実装工程］
ダイシングテープ２１よりピックアップされた接着剤層３１付き半導体チップ３０は、図６に示すように、接着剤層３１を介して半導体集積回路を構成する基板３３に実装される。基板３３は、例えばリジット基板やフレキシブル基板であり、半導体チップ３０が実装される実装部には、半導体チップ３０の接着面３０ａに形成されたチップ電極３２と導通接続される基板電極３４が形成されている。 [Mounting process]
The semiconductor chip 30 with the adhesive layer 31 picked up from the dicing tape 21 is mounted on the substrate 33 constituting the semiconductor integrated circuit via the adhesive layer 31 as shown in FIG. The substrate 33 is, for example, a rigid substrate or a flexible substrate, and a substrate electrode 34 that is electrically connected to the chip electrode 32 formed on the bonding surface 30a of the semiconductor chip 30 is formed on the mounting portion where the semiconductor chip 30 is mounted. ing.

半導体チップ３０は、例えば図６に示す実装装置４０を用いて実装することができる。実装装置４０は、基板３３が載置されるステージ４１と、ステージ４１と対向して支持され半導体チップ３０を基板３３に加熱押圧する加熱ボンダー４２とを有する。加熱ボンダー４２は、シリコンラバーのエラストマーなどの弾性体からなる押圧部材４３が取り付けられ、この押圧部材４３によって半導体チップ３０を加熱押圧する。   The semiconductor chip 30 can be mounted using, for example, the mounting apparatus 40 shown in FIG. The mounting apparatus 40 includes a stage 41 on which the substrate 33 is placed, and a heating bonder 42 that is supported to face the stage 41 and heats and presses the semiconductor chip 30 to the substrate 33. The heating bonder 42 is attached with a pressing member 43 made of an elastic body such as an elastomer of silicon rubber, and the semiconductor chip 30 is heated and pressed by the pressing member 43.

実装工程では、まず、ステージ４１に載置された基板３３上に複数の接着剤層３１付き半導体チップ３０が仮搭載される。このとき、接着剤層３１付き半導体チップ３０は、接着剤層３１が設けられた接着面３０ａが基板３３に向けて仮搭載される。また、接着剤層３１付き半導体チップ３０は、接着面３０ａに形成されたチップ電極３２と、基板３３に設けられた基板電極３４とが対向するように位置合わせされて仮搭載される。   In the mounting process, first, the plurality of semiconductor chips 30 with the adhesive layer 31 are temporarily mounted on the substrate 33 placed on the stage 41. At this time, the semiconductor chip 30 with the adhesive layer 31 is temporarily mounted with the adhesive surface 30 a provided with the adhesive layer 31 facing the substrate 33. Further, the semiconductor chip 30 with the adhesive layer 31 is temporarily mounted by being aligned so that the chip electrode 32 formed on the bonding surface 30a and the substrate electrode 34 provided on the substrate 33 face each other.

次いで、実装装置４０は、加熱ボンダー４２を下降させ、押圧部材４３で接着剤層３１付き半導体チップ３０を基板３３へ加熱押圧する。このとき、例えば、ＥＢＳ（Elasticity Bonding System）工法と呼ばれる基板３３全体を弾性体で覆った状態で押圧する方法によれば、同一基板上に複数仮搭載された半導体チップ３０を一括して圧着することができる。   Next, the mounting apparatus 40 lowers the heating bonder 42 and heats and presses the semiconductor chip 30 with the adhesive layer 31 to the substrate 33 with the pressing member 43. At this time, for example, according to a method called an EBS (Elasticity Bonding System) method in which the entire substrate 33 is pressed in a state of being covered with an elastic body, a plurality of semiconductor chips 30 temporarily mounted on the same substrate are collectively bonded. be able to.

加熱ボンダー４２によって、所定の温度、圧力、時間で加熱押圧されることにより、接着剤層３１は、バインダー樹脂が流動し、導電性粒子がチップ電極３２と基板電極３４との間に挟持されるとともに、この状態で熱硬化する。これにより、半導体チップ３０のチップ電極３２が基板３３の基板電極３４と電気的、機械的に接続された実装体が形成される。   By being heated and pressed at a predetermined temperature, pressure, and time by the heating bonder 42, the binder resin flows in the adhesive layer 31, and the conductive particles are sandwiched between the chip electrode 32 and the substrate electrode 34. At the same time, it hardens in this state. As a result, a mounting body is formed in which the chip electrode 32 of the semiconductor chip 30 is electrically and mechanically connected to the substrate electrode 34 of the substrate 33.

ここで、本実施の形態に係る実装方法、及び実装体によれば、上述したように、ウエハ２０のダイシング後に接着面２０ａに接着剤層３１が形成されることから、接着剤層３１は、ダイシング工程において発生する切り粉や塵埃、ノズル６より供給される水等の影響を受けることがなく、半導体チップ３０が実装された実装体の製品寿命の劣化もなく、また長期に亘る導通信頼性を確保することができる。   Here, according to the mounting method and the mounting body according to the present embodiment, as described above, the adhesive layer 31 is formed on the adhesive surface 20a after the wafer 20 is diced. It is not affected by chips and dust generated in the dicing process, water supplied from the nozzle 6, etc., there is no deterioration in the product life of the mounting body on which the semiconductor chip 30 is mounted, and long-term conduction reliability. Can be secured.

［コールドエクスパンド］
また、上述したエクスパンド工程において、１０℃以下に冷却した環境下で行うと、異方性導電接着フィルムや絶縁性接着フィルムといった接着剤層３１は、低温のため伸縮性が低くなっている（コールドエクスパンド）。したがって、かかる低温環境下でエクスパンド工程を実施することにより、ウエハ２０の接着面２０ａに形成された接着剤層３１は、より確実にスクライブライン２５に沿って半導体チップ３０と同形状に切断される。 [Cold Expand]
Further, when the expansion process described above is performed in an environment cooled to 10 ° C. or lower, the adhesive layer 31 such as an anisotropic conductive adhesive film or an insulating adhesive film has low elasticity due to low temperature (cold). Expand). Therefore, by performing the expanding process under such a low temperature environment, the adhesive layer 31 formed on the bonding surface 20a of the wafer 20 is more reliably cut into the same shape as the semiconductor chip 30 along the scribe line 25. .

［その他］
なお、上記実施形態では、押圧部材４３にエラストマーなどの弾性体を用いて、複数の接着剤層３１付き半導体チップ３０を基板３３に一括して実装する場合について説明した。しかし、基板３３に接着剤層３１付き半導体チップ３０を実装する方法は、これに限定されない。例えば、エラストマーなどの弾性体を用いずに、接着剤層３１付き半導体チップ３０を基板３３に実装してもよい。また、複数の接着剤層３１付き半導体チップ３０を、１つずつ基板３３に実装してもよい。 [Others]
In the above-described embodiment, the case where a plurality of semiconductor chips 30 with the adhesive layer 31 are collectively mounted on the substrate 33 using an elastic body such as an elastomer for the pressing member 43 has been described. However, the method of mounting the semiconductor chip 30 with the adhesive layer 31 on the substrate 33 is not limited to this. For example, the semiconductor chip 30 with the adhesive layer 31 may be mounted on the substrate 33 without using an elastic body such as an elastomer. Further, the plurality of semiconductor chips 30 with the adhesive layer 31 may be mounted on the substrate 33 one by one.

また、加熱ボンダー４２は、セラミックや金属等の硬質ヘッド、あるいは超音波ヘッドを用いて形成してもよい。   The heating bonder 42 may be formed using a hard head such as ceramic or metal, or an ultrasonic head.

１ ダイシング装置、２ チャックテーブル、３ アライメントステージ、４ 撮像部、５ 切削部、６ ノズル、７ 制御部、８ ブレード、９ 画像処理部、１０ 駆動部、１１ ノズル制御部、２０ ウエハ、２０ａ 接着面、２０ｂ 載置面、２２ 治具、２３ フレーム、３０ 半導体チップ、３０ａ 接着面、３１ 接着剤層、３２ チップ電極、３３ 基板、３４ 基板電極、４０ 実装装置、４１ ステージ、４２ 加熱ボンダー、４３ 押圧部材 DESCRIPTION OF SYMBOLS 1 Dicing apparatus, 2 Chuck table, 3 Alignment stage, 4 Imaging part, 5 Cutting part, 6 Nozzle, 7 Control part, 8 Blade, 9 Image processing part, 10 Driving part, 11 Nozzle control part, 20 Wafer, 20a Bonding surface 20b Mounting surface, 22 Jig, 23 Frame, 30 Semiconductor chip, 30a Adhesive surface, 31 Adhesive layer, 32 Chip electrode, 33 Substrate, 34 Substrate electrode, 40 Mounting device, 41 Stage, 42 Heat bonder, 43 Press Element

Claims (7)

ダイシングシート上にウエハを載置する載置工程と、
上記ウエハを複数のチップにダイシングするダイシング工程と、
上記ダイシング工程の後に、上記ウエハの表面に接着剤層を形成する接着剤層形成工程と、
上記ウエハが載置された上記ダイシングシートを伸張させることにより上記ウエハ及び上記接着剤層を個片化するエクスパンド工程とを備えるウエハのダイシング方法。 A placing step of placing a wafer on a dicing sheet;
A dicing step of dicing the wafer into a plurality of chips;
An adhesive layer forming step of forming an adhesive layer on the surface of the wafer after the dicing step;
A wafer dicing method comprising: an expanding step of separating the wafer and the adhesive layer by stretching the dicing sheet on which the wafer is placed. 上記エクスパンド工程は、１０℃以下で行われるコールドエクスパンドである請求項１記載のウエハのダイシング方法。   2. The wafer dicing method according to claim 1, wherein the expanding step is a cold expanding performed at 10 [deg.] C. or lower. 上記接着剤層形成工程は、接着フィルムを上記ウエハ表面に貼着することにより行う請求項１又は請求項２に記載のウエハのダイシング方法。   The wafer dicing method according to claim 1, wherein the adhesive layer forming step is performed by attaching an adhesive film to the wafer surface. 上記接着フィルムは、絶縁性接着フィルム又は導電性粒子を含有する異方性導電接着フィルムである請求項３記載のウエハのダイシング方法。   4. The wafer dicing method according to claim 3, wherein the adhesive film is an insulating adhesive film or an anisotropic conductive adhesive film containing conductive particles. ダイシングシート上にウエハを載置する載置工程と、
上記ウエハを複数のチップにダイシングするダイシング工程と、
上記ダイシング工程の後に、上記ウエハの表面に接着剤層を形成する接着剤層形成工程と、
上記ウエハが載置された上記ダイシングシートを伸張させることにより上記ウエハ及び上記接着剤層を個片化するエクスパンド工程と、
上記個片化された上記ウエハを、上記接着剤層を介して基板の実装部に実装する実装工程とを備える実装方法。 A placing step of placing a wafer on a dicing sheet;
A dicing step of dicing the wafer into a plurality of chips;
An adhesive layer forming step of forming an adhesive layer on the surface of the wafer after the dicing step;
An expanding step of separating the wafer and the adhesive layer by stretching the dicing sheet on which the wafer is placed;
A mounting method comprising: mounting the separated wafer on a mounting portion of a substrate through the adhesive layer. ダイシングシート上にウエハを載置する載置工程と、
上記ウエハを複数のチップにダイシングするダイシング工程と、
上記ダイシング工程の後に、上記ウエハの表面に接着剤層を形成する接着剤層形成工程と、
上記ウエハが載置された上記ダイシングシートを伸張させることにより上記ウエハ及び上記接着剤層を個片化するエクスパンド工程とを備える接着剤層付きチップの製造方法。 A placing step of placing a wafer on a dicing sheet;
A dicing step of dicing the wafer into a plurality of chips;
An adhesive layer forming step of forming an adhesive layer on the surface of the wafer after the dicing step;
The manufacturing method of the chip | tip with an adhesive layer provided with the expanding process which separates the said wafer and the said adhesive bond layer by extending | stretching the said dicing sheet in which the said wafer was mounted. 請求項５記載の方法により製造された実装体。   A mounting body manufactured by the method according to claim 5.
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