JP2011113568A - 帯域幅同期化回路及び帯域幅同期化方法とこれを含むデータプロセッシングシステム - Google Patents

帯域幅同期化回路及び帯域幅同期化方法とこれを含むデータプロセッシングシステム Download PDF

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Publication number
JP2011113568A
JP2011113568A JP2010263433A JP2010263433A JP2011113568A JP 2011113568 A JP2011113568 A JP 2011113568A JP 2010263433 A JP2010263433 A JP 2010263433A JP 2010263433 A JP2010263433 A JP 2010263433A JP 2011113568 A JP2011113568 A JP 2011113568A
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JP
Japan
Prior art keywords
sync
data
clock
synchronization circuit
frequency
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Pending
Application number
JP2010263433A
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English (en)
Japanese (ja)
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JP2011113568A5 (https=
Inventor
Jae-Geun Yun
栽 根 尹
Hyunuk Jung
賢 旭 鄭
Junhyung Um
濬 亨 嚴
Sunghoon Shim
聖 勳 沈
Sung-Min Hong
性 ミン 洪
Bub-Chul Jeong
法 チョル 鄭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JP2011113568A publication Critical patent/JP2011113568A/ja
Publication of JP2011113568A5 publication Critical patent/JP2011113568A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08—Clock generators with changeable or programmable clock frequency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Power Sources (AREA)
  • Executing Machine-Instructions (AREA)
  • Bus Control (AREA)
JP2010263433A 2009-11-26 2010-11-26 帯域幅同期化回路及び帯域幅同期化方法とこれを含むデータプロセッシングシステム Pending JP2011113568A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2009-0115414 2009-11-26
KR1020090115414A KR20110058575A (ko) 2009-11-26 2009-11-26 데이터 프로세싱 시스템에서의 대역폭 동기화 회로 및 그에 따른 대역폭 동기화 방법

Publications (2)

Publication Number Publication Date
JP2011113568A true JP2011113568A (ja) 2011-06-09
JP2011113568A5 JP2011113568A5 (https=) 2014-01-30

Family

ID=44062069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010263433A Pending JP2011113568A (ja) 2009-11-26 2010-11-26 帯域幅同期化回路及び帯域幅同期化方法とこれを含むデータプロセッシングシステム

Country Status (4)

Country Link
US (1) US8582709B2 (https=)
JP (1) JP2011113568A (https=)
KR (1) KR20110058575A (https=)
CN (1) CN102083196B (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8959398B2 (en) * 2012-08-16 2015-02-17 Advanced Micro Devices, Inc. Multiple clock domain debug capability
US20160103778A1 (en) * 2013-06-28 2016-04-14 Hewlett-Packard Development Company, L.P. Memory component capable to communicate at multiple data widths
US20150199286A1 (en) * 2014-01-10 2015-07-16 Samsung Electronics Co., Ltd. Network interconnect with reduced congestion
KR102206313B1 (ko) 2014-02-07 2021-01-22 삼성전자주식회사 시스템 인터커넥트 및 시스템 인터커넥트의 동작 방법
US9489009B2 (en) * 2014-02-20 2016-11-08 Samsung Electronics Co., Ltd. System on chip, bus interface and method of operating the same
KR102588600B1 (ko) * 2018-11-12 2023-10-16 에스케이하이닉스 주식회사 데이터 저장 장치 및 동작 방법, 이를 포함하는 스토리지 시스템

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02150949A (ja) * 1988-12-01 1990-06-11 Fujitsu Ltd バス接続装置
JPH06295283A (ja) * 1993-04-08 1994-10-21 Fuji Xerox Co Ltd 計算機システム
JPH09297729A (ja) * 1995-12-23 1997-11-18 Lg Semicon Co Ltd データ伝送装置及びデータ伝送方法
JP2001134420A (ja) * 1999-11-02 2001-05-18 Hitachi Ltd データ処理装置
JP2002135132A (ja) * 2000-10-25 2002-05-10 Seiko Epson Corp シリアル／パラレル変換回路、データ転送制御装置及び電子機器

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3956580A (en) * 1970-12-30 1976-05-11 Ricoh Co., Ltd. System for reducing the transmission time of similar portions of visible images
JPH0916511A (ja) 1995-07-04 1997-01-17 Toshiba Corp Ｃｐｕバスとローカルバスの変換方式
JPH11126483A (ja) * 1997-10-20 1999-05-11 Fujitsu Ltd 省電力同期回路及びそれを有する半導体記憶装置
US6718449B2 (en) * 2001-07-09 2004-04-06 Sony Corporation System for data transfer between different clock domains, and for obtaining status of memory device during transfer
JP2006164119A (ja) 2004-12-10 2006-06-22 Renesas Technology Corp データ処理装置
KR20060103683A (ko) 2005-03-28 2006-10-04 엘지전자 주식회사 Ｃｐｕ를 내장한 ｓｏｃ 구조
US7454632B2 (en) * 2005-06-16 2008-11-18 Intel Corporation Reducing computing system power through idle synchronization
EP1994668A2 (en) * 2005-11-23 2008-11-26 Nxp B.V. A data processor system and a method for communicating data

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02150949A (ja) * 1988-12-01 1990-06-11 Fujitsu Ltd バス接続装置
JPH06295283A (ja) * 1993-04-08 1994-10-21 Fuji Xerox Co Ltd 計算機システム
JPH09297729A (ja) * 1995-12-23 1997-11-18 Lg Semicon Co Ltd データ伝送装置及びデータ伝送方法
JP2001134420A (ja) * 1999-11-02 2001-05-18 Hitachi Ltd データ処理装置
JP2002135132A (ja) * 2000-10-25 2002-05-10 Seiko Epson Corp シリアル／パラレル変換回路、データ転送制御装置及び電子機器

Also Published As

Publication number Publication date
KR20110058575A (ko) 2011-06-01
CN102083196B (zh) 2015-07-08
US8582709B2 (en) 2013-11-12
CN102083196A (zh) 2011-06-01
US20110122982A1 (en) 2011-05-26

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