JP2011054233A - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP2011054233A
JP2011054233A JP2009201971A JP2009201971A JP2011054233A JP 2011054233 A JP2011054233 A JP 2011054233A JP 2009201971 A JP2009201971 A JP 2009201971A JP 2009201971 A JP2009201971 A JP 2009201971A JP 2011054233 A JP2011054233 A JP 2011054233A
Authority
JP
Japan
Prior art keywords
memory cell
voltage
wiring
circuit
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009201971A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011054233A5 (https=
Inventor
Takafumi Shimotori
貴文 霜鳥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2009201971A priority Critical patent/JP2011054233A/ja
Priority to US12/873,756 priority patent/US8363448B2/en
Publication of JP2011054233A publication Critical patent/JP2011054233A/ja
Publication of JP2011054233A5 publication Critical patent/JP2011054233A5/ja
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G11C13/0026—Bit-line or column circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0038—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
JP2009201971A 2009-09-01 2009-09-01 半導体記憶装置 Pending JP2011054233A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009201971A JP2011054233A (ja) 2009-09-01 2009-09-01 半導体記憶装置
US12/873,756 US8363448B2 (en) 2009-09-01 2010-09-01 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009201971A JP2011054233A (ja) 2009-09-01 2009-09-01 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2011054233A true JP2011054233A (ja) 2011-03-17
JP2011054233A5 JP2011054233A5 (https=) 2012-04-26

Family

ID=43624696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009201971A Pending JP2011054233A (ja) 2009-09-01 2009-09-01 半導体記憶装置

Country Status (2)

Country Link
US (1) US8363448B2 (https=)
JP (1) JP2011054233A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9123412B2 (en) 2013-03-22 2015-09-01 Masahiro Takahashi Resistance change memory
JP2022553949A (ja) * 2019-10-22 2022-12-27 マイクロン テクノロジー，インク． メモリセルにおける読み出しディスターブの低減のための電圧プロファイル

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5404674B2 (ja) * 2011-03-02 2014-02-05 株式会社東芝 不揮発性半導体記憶装置
CN102624229B (zh) * 2012-03-31 2016-05-11 上海华虹宏力半导体制造有限公司 升压电路以及集成电路
US9070440B2 (en) 2013-08-26 2015-06-30 Masahiro Takahashi Resistance change memory
KR102712691B1 (ko) * 2019-09-16 2024-10-04 에스케이하이닉스 주식회사 메모리 장치

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007157317A (ja) * 2005-11-30 2007-06-21 Samsung Electronics Co Ltd 相変化メモリ装置及びそれの読み出し方法
JP2010182353A (ja) * 2009-02-04 2010-08-19 Elpida Memory Inc 半導体記憶装置とその読み出し方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4427560B2 (ja) * 2007-05-21 2010-03-10 株式会社東芝 不揮発性メモリ装置のデータ書き込み方法
KR101415877B1 (ko) * 2008-05-19 2014-07-07 삼성전자 주식회사 저항체를 이용한 비휘발성 메모리 장치

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007157317A (ja) * 2005-11-30 2007-06-21 Samsung Electronics Co Ltd 相変化メモリ装置及びそれの読み出し方法
JP2010182353A (ja) * 2009-02-04 2010-08-19 Elpida Memory Inc 半導体記憶装置とその読み出し方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9123412B2 (en) 2013-03-22 2015-09-01 Masahiro Takahashi Resistance change memory
US9336871B2 (en) 2013-03-22 2016-05-10 Masahiro Takahashi Resistance change memory
JP2022553949A (ja) * 2019-10-22 2022-12-27 マイクロン テクノロジー，インク． メモリセルにおける読み出しディスターブの低減のための電圧プロファイル

Also Published As

Publication number Publication date
US20110051498A1 (en) 2011-03-03
US8363448B2 (en) 2013-01-29

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