JP2010532541A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2010532541A5 JP2010532541A5 JP2010515250A JP2010515250A JP2010532541A5 JP 2010532541 A5 JP2010532541 A5 JP 2010532541A5 JP 2010515250 A JP2010515250 A JP 2010515250A JP 2010515250 A JP2010515250 A JP 2010515250A JP 2010532541 A5 JP2010532541 A5 JP 2010532541A5
- Authority
- JP
- Japan
- Prior art keywords
- storage elements
- programming
- level
- voltage
- reference potential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012795 verification Methods 0.000 claims 20
- 238000000034 method Methods 0.000 claims 8
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/773,035 | 2007-07-03 | ||
| US11/773,032 | 2007-07-03 | ||
| US11/773,035 US7599224B2 (en) | 2007-07-03 | 2007-07-03 | Systems for coarse/fine program verification in non-volatile memory using different reference levels for improved sensing |
| US11/773,032 US7508715B2 (en) | 2007-07-03 | 2007-07-03 | Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing |
| PCT/US2008/068988 WO2009006513A1 (en) | 2007-07-03 | 2008-07-02 | Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010532541A JP2010532541A (ja) | 2010-10-07 |
| JP2010532541A5 true JP2010532541A5 (enExample) | 2011-04-14 |
| JP5198563B2 JP5198563B2 (ja) | 2013-05-15 |
Family
ID=39760547
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010515250A Active JP5198563B2 (ja) | 2007-07-03 | 2008-07-02 | センシング向上のための異なる参照レベルを用いた不揮発性記憶メモリ内の雑/高精度プログラム検証 |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP2165338B1 (enExample) |
| JP (1) | JP5198563B2 (enExample) |
| KR (1) | KR20100057784A (enExample) |
| CN (1) | CN101796591B (enExample) |
| TW (1) | TWI389124B (enExample) |
| WO (1) | WO2009006513A1 (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8081514B2 (en) * | 2009-08-25 | 2011-12-20 | Sandisk Technologies Inc. | Partial speed and full speed programming for non-volatile memory using floating bit lines |
| JP5002632B2 (ja) * | 2009-09-25 | 2012-08-15 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| KR101658118B1 (ko) * | 2010-06-10 | 2016-09-20 | 삼성전자 주식회사 | 반도체 메모리 장치, 및 이의 독출 및 검증 방법 |
| KR101212745B1 (ko) | 2010-09-30 | 2012-12-14 | 에스케이하이닉스 주식회사 | 플래시 메모리 장치 및 프로그램 검증 방법 |
| KR101798013B1 (ko) * | 2010-12-30 | 2017-11-16 | 삼성전자주식회사 | 비휘발성 메모리 장치의 프로그램 방법 |
| KR101861084B1 (ko) | 2011-07-11 | 2018-05-28 | 삼성전자주식회사 | 비휘발성 메모리 장치, 이의 동작 방법, 및 비휘발성 메모리 장치를 포함하는 전자 장치 |
| KR101775660B1 (ko) | 2011-09-29 | 2017-09-07 | 삼성전자주식회사 | 워드 라인 전압의 변화없이 상이한 문턱 전압들을 갖는 메모리 셀들을 읽는 방법 및 그것을 이용한 불 휘발성 메모리 장치 |
| KR101881595B1 (ko) * | 2011-12-22 | 2018-07-25 | 에스케이하이닉스 주식회사 | 불휘발성 메모리 장치 및 이의 소거 방법 |
| KR102192539B1 (ko) * | 2014-05-21 | 2020-12-18 | 삼성전자주식회사 | 반도체 장치 및 이의 프로그램 방법 |
| CN109390030A (zh) * | 2018-10-16 | 2019-02-26 | 长江存储科技有限责任公司 | 一种寄存器以及闪存单元的分组设备和方法 |
| CN109979515B (zh) * | 2019-03-25 | 2021-08-31 | 长江存储科技有限责任公司 | 一种存储器编程方法及相关装置 |
| US10930355B2 (en) * | 2019-06-05 | 2021-02-23 | SanDiskTechnologies LLC | Row dependent sensing in nonvolatile memory |
| WO2021068231A1 (en) | 2019-10-12 | 2021-04-15 | Yangtze Memory Technologies Co., Ltd. | Method of programming memory device and related memory device |
| US11682459B2 (en) * | 2020-05-13 | 2023-06-20 | Silicon Storage Technology, Inc. | Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3631463B2 (ja) * | 2001-12-27 | 2005-03-23 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| KR100496866B1 (ko) * | 2002-12-05 | 2005-06-22 | 삼성전자주식회사 | 미프로그램된 셀들 및 과프로그램된 셀들 없이 균일한문턱 전압 분포를 갖는 플레쉬 메모리 장치 및 그프로그램 검증 방법 |
| US7139198B2 (en) | 2004-01-27 | 2006-11-21 | Sandisk Corporation | Efficient verification for coarse/fine programming of non-volatile memory |
| US7023733B2 (en) * | 2004-05-05 | 2006-04-04 | Sandisk Corporation | Boosting to control programming of non-volatile memory |
| JP4271168B2 (ja) * | 2004-08-13 | 2009-06-03 | 株式会社東芝 | 半導体記憶装置 |
| JP4786171B2 (ja) * | 2004-12-10 | 2011-10-05 | 株式会社東芝 | 半導体記憶装置 |
| WO2006107651A1 (en) * | 2005-04-01 | 2006-10-12 | Sandisk Corporation | Multi-state memory having data recovery after program fail |
-
2008
- 2008-07-02 CN CN200880105358.3A patent/CN101796591B/zh active Active
- 2008-07-02 EP EP08772349A patent/EP2165338B1/en active Active
- 2008-07-02 JP JP2010515250A patent/JP5198563B2/ja active Active
- 2008-07-02 WO PCT/US2008/068988 patent/WO2009006513A1/en not_active Ceased
- 2008-07-02 KR KR1020107002519A patent/KR20100057784A/ko not_active Withdrawn
- 2008-07-03 TW TW97125067A patent/TWI389124B/zh not_active IP Right Cessation
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2010532541A5 (enExample) | ||
| US7898876B2 (en) | Page buffer circuit, nonvolatile memory device including the page buffer circuit, and method of operating the nonvolatile memory device | |
| JP5376839B2 (ja) | 不揮発性メモリ装置の消去方法 | |
| US9013924B2 (en) | Semiconductor device and operating method thereof | |
| USRE44978E1 (en) | Method of verifying programming of a nonvolatile memory device | |
| US7561474B2 (en) | Program verifying method and programming method of flash memory device | |
| KR100869849B1 (ko) | 플래시 메모리소자의 구동방법 | |
| US9093169B2 (en) | Nonvolatile semiconductor memory apparatus and data sensing method thereof | |
| WO2009038961A3 (en) | Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells | |
| TWI384480B (zh) | 記憶體及其讀取方法 | |
| US9036424B2 (en) | Memory device and method for verifying the same | |
| US9171635B2 (en) | Semiconductor memory device having page buffer and method of operating the same | |
| US20130163331A1 (en) | Semiconductor memory device and operating method thereof | |
| US8238163B2 (en) | Nonvolatile memory device | |
| JP2008305536A5 (enExample) | ||
| CN101640072A (zh) | 闪速存储设备的编程方法 | |
| US20130163333A1 (en) | Semiconductor memory device and method of operating the same | |
| US7426143B2 (en) | Semiconductor memory device and related programming method | |
| US9672875B2 (en) | Methods and apparatuses for providing a program voltage responsive to a voltage determination | |
| US9564230B2 (en) | Semiconductor memory device and method of operating the same | |
| US20150270003A1 (en) | Non-volatile memory and method for programming the same | |
| JP5385435B1 (ja) | 不揮発性半導体記憶装置とその読み出し方法 | |
| US7295471B2 (en) | Memory device having a virtual ground array and methods using program algorithm to improve read margin loss | |
| KR101674070B1 (ko) | 불휘발성 메모리 소자의 프로그램 동작 방법 | |
| KR20140063146A (ko) | 반도체 메모리 장치 및 이의 동작 방법 |