JP2010511943A5 - - Google Patents

Download PDF

Info

Publication number
JP2010511943A5
JP2010511943A5 JP2009539576A JP2009539576A JP2010511943A5 JP 2010511943 A5 JP2010511943 A5 JP 2010511943A5 JP 2009539576 A JP2009539576 A JP 2009539576A JP 2009539576 A JP2009539576 A JP 2009539576A JP 2010511943 A5 JP2010511943 A5 JP 2010511943A5
Authority
JP
Japan
Prior art keywords
address
type
identification
semiconductor device
serial input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009539576A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010511943A (ja
JP5683813B2 (ja
Filing date
Publication date
Priority claimed from US11/622,828 external-priority patent/US8271758B2/en
Priority claimed from US11/771,241 external-priority patent/US7925854B2/en
Application filed filed Critical
Priority claimed from PCT/CA2007/002182 external-priority patent/WO2008067658A1/en
Publication of JP2010511943A publication Critical patent/JP2010511943A/ja
Publication of JP2010511943A5 publication Critical patent/JP2010511943A5/ja
Application granted granted Critical
Publication of JP5683813B2 publication Critical patent/JP5683813B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2009539576A 2006-12-06 2007-12-04 混合されたタイプのメモリデバイスを動作させるシステムおよび方法 Expired - Fee Related JP5683813B2 (ja)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US86877306P 2006-12-06 2006-12-06
US60/868,773 2006-12-06
US87089206P 2006-12-20 2006-12-20
US60/870,892 2006-12-20
US11/622,828 2007-01-12
US11/622,828 US8271758B2 (en) 2006-12-06 2007-01-12 Apparatus and method for producing IDS for interconnected devices of mixed type
US11/771,241 US7925854B2 (en) 2006-12-06 2007-06-29 System and method of operating memory devices of mixed type
US11/771,241 2007-06-29
PCT/CA2007/002182 WO2008067658A1 (en) 2006-12-06 2007-12-04 System and method of operating memory devices of mixed type

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2010257825A Division JP5351130B2 (ja) 2006-12-06 2010-11-18 混合されたタイプのメモリデバイスを動作させるシステムおよび方法
JP2013257579A Division JP5695724B2 (ja) 2006-12-06 2013-12-13 混合されたタイプのメモリデバイスを動作させるシステムおよび方法

Publications (3)

Publication Number Publication Date
JP2010511943A JP2010511943A (ja) 2010-04-15
JP2010511943A5 true JP2010511943A5 (enExample) 2011-01-20
JP5683813B2 JP5683813B2 (ja) 2015-03-11

Family

ID=39491613

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2009539576A Expired - Fee Related JP5683813B2 (ja) 2006-12-06 2007-12-04 混合されたタイプのメモリデバイスを動作させるシステムおよび方法
JP2010257825A Expired - Fee Related JP5351130B2 (ja) 2006-12-06 2010-11-18 混合されたタイプのメモリデバイスを動作させるシステムおよび方法
JP2013257579A Expired - Fee Related JP5695724B2 (ja) 2006-12-06 2013-12-13 混合されたタイプのメモリデバイスを動作させるシステムおよび方法

Family Applications After (2)

Application Number Title Priority Date Filing Date
JP2010257825A Expired - Fee Related JP5351130B2 (ja) 2006-12-06 2010-11-18 混合されたタイプのメモリデバイスを動作させるシステムおよび方法
JP2013257579A Expired - Fee Related JP5695724B2 (ja) 2006-12-06 2013-12-13 混合されたタイプのメモリデバイスを動作させるシステムおよび方法

Country Status (5)

Country Link
EP (1) EP2118903A4 (enExample)
JP (3) JP5683813B2 (enExample)
KR (3) KR101441280B1 (enExample)
TW (1) TWI470645B (enExample)
WO (1) WO2008067658A1 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8463959B2 (en) * 2010-05-31 2013-06-11 Mosaid Technologies Incorporated High-speed interface for daisy-chained devices
TWI425362B (zh) * 2010-12-07 2014-02-01 Alpha Imaging Technology Corp 對應不同記憶體之記憶體介面晶片及建立記憶體傳輸通道之方法
US9697872B2 (en) * 2011-12-07 2017-07-04 Cypress Semiconductor Corporation High speed serial peripheral interface memory subsystem
US8614920B2 (en) 2012-04-02 2013-12-24 Winbond Electronics Corporation Method and apparatus for logic read in flash memory
JP5467134B1 (ja) * 2012-09-27 2014-04-09 華邦電子股▲ふん▼有限公司 フラッシュメモリ装置およびメモリ装置の操作方法
US10067903B2 (en) 2015-07-30 2018-09-04 SK Hynix Inc. Semiconductor device
KR102358177B1 (ko) 2015-12-24 2022-02-07 에스케이하이닉스 주식회사 제어회로 및 제어회로를 포함하는 메모리 장치
US11755255B2 (en) 2014-10-28 2023-09-12 SK Hynix Inc. Memory device comprising a plurality of memories sharing a resistance for impedance matching
KR102366767B1 (ko) * 2015-07-30 2022-02-23 에스케이하이닉스 주식회사 반도체 장치
US10146608B2 (en) 2015-04-06 2018-12-04 Rambus Inc. Memory module register access
FR3041806B1 (fr) * 2015-09-25 2017-10-20 Stmicroelectronics Rousset Dispositif de memoire non volatile, par exemple du type eeprom, ayant une capacite memoire importante, par exemple 16mbits
GB2568725B (en) * 2017-11-24 2021-08-18 Ge Aviat Systems Ltd Method and apparatus for initializing a controller module
GB2568724B (en) * 2017-11-24 2021-08-18 Ge Aviat Systems Ltd Method and apparatus for initializing a controller module
CN110413197B (zh) * 2018-04-28 2023-06-27 伊姆西Ip控股有限责任公司 管理存储系统的方法、设备和计算机程序产品
TWI696113B (zh) * 2019-01-02 2020-06-11 慧榮科技股份有限公司 用來進行組態管理之方法以及資料儲存裝置及其控制器
US20210081318A1 (en) 2019-09-17 2021-03-18 Micron Technology, Inc. Flexible provisioning of multi-tier memory
TWI749598B (zh) * 2020-06-18 2021-12-11 華邦電子股份有限公司 一種記憶體裝置及其連續讀寫方法
US11120851B1 (en) 2020-07-12 2021-09-14 Winbond Electronics Corp. Memory apparatus and burst read and burst write method thereof
CN113641595B (zh) * 2021-07-30 2023-08-11 珠海一微半导体股份有限公司 独立块保护模式的spi flash在brom阶段的类型识别方法及系统
US20230153094A1 (en) * 2021-11-18 2023-05-18 Toyota Motor North America, Inc. Robust over the air reprogramming

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4360870A (en) * 1980-07-30 1982-11-23 International Business Machines Corporation Programmable I/O device identification
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
JPH0484351A (ja) * 1990-07-27 1992-03-17 Sony Corp アドレス設定方法
JPH07105121A (ja) * 1993-09-30 1995-04-21 Nabco Ltd 分散制御装置
JP3168552B2 (ja) * 1993-12-17 2001-05-21 インターナショナル・ビジネス・マシーンズ・コーポレ−ション メモリ・アクセス制御システム及びその方法
US5404460A (en) * 1994-01-28 1995-04-04 Vlsi Technology, Inc. Method for configuring multiple identical serial I/O devices to unique addresses through a serial bus
US5636342A (en) * 1995-02-17 1997-06-03 Dell Usa, L.P. Systems and method for assigning unique addresses to agents on a system management bus
US5708773A (en) * 1995-07-20 1998-01-13 Unisys Corporation JTAG interface system for communicating with compliant and non-compliant JTAG devices
US5860080A (en) * 1996-03-19 1999-01-12 Apple Computer, Inc. Multicasting system for selecting a group of memory devices for operation
JP3850067B2 (ja) * 1996-04-24 2006-11-29 株式会社ルネサステクノロジ メモリシステムおよびそれに用いられる半導体記憶装置
US6175891B1 (en) * 1997-04-23 2001-01-16 Micron Technology, Inc. System and method for assigning addresses to memory devices
US6453365B1 (en) * 1998-02-11 2002-09-17 Globespanvirata, Inc. Direct memory access controller having decode circuit for compact instruction format
US6144576A (en) * 1998-08-19 2000-11-07 Intel Corporation Method and apparatus for implementing a serial memory architecture
US7356639B2 (en) * 2000-01-05 2008-04-08 Rambus Inc. Configurable width buffered module having a bypass circuit
JP2002236611A (ja) * 2000-12-04 2002-08-23 Hitachi Ltd 半導体装置と情報処理システム
US6996644B2 (en) * 2001-06-06 2006-02-07 Conexant Systems, Inc. Apparatus and methods for initializing integrated circuit addresses
US7073022B2 (en) * 2002-05-23 2006-07-04 International Business Machines Corporation Serial interface for a data storage array
US7032039B2 (en) * 2002-10-30 2006-04-18 Atmel Corporation Method for identification of SPI compatible serial memory devices
US7308524B2 (en) 2003-01-13 2007-12-11 Silicon Pipe, Inc Memory chain
JP2007508776A (ja) * 2003-10-18 2007-04-05 サムスン エレクトロニクス カンパニー リミテッド モバイルｉｐを支援するネットワークシステムにおけるモバイルアンカーポイントの探索及び移動ノードの移動性の管理のための方法及びシステム
US7031221B2 (en) * 2003-12-30 2006-04-18 Intel Corporation Fixed phase clock and strobe signals in daisy chained chips
US8375146B2 (en) * 2004-08-09 2013-02-12 SanDisk Technologies, Inc. Ring bus structure and its use in flash memory systems

Similar Documents

Publication Publication Date Title
JP2010511943A5 (enExample)
TWI629686B (zh) 用於同時存取非揮發性記憶體之多個分區之裝置及方法
KR102858982B1 (ko) 분리된 메모리 디바이스들의 공유 메모리 풀들에 걸친 중재
KR101545074B1 (ko) 메모리의 볼륨의 식별자를 판정하는 방법, 장치 및 시스템
CN105702277B (zh) 存储器系统和存储器控制器
JP2012181916A5 (enExample)
CN107636618B (zh) 在具有嵌入式可编程数据检查的非易失性系统存储器计算系统中的即时重启
US7881145B2 (en) Semiconductor device and semiconductor system having the same
KR20120079682A (ko) 디램 캐시를 포함하는 메모리 장치 및 이를 포함하는 시스템
US10581968B2 (en) Multi-node storage operation
CN105474319A (zh) 用于配置混合存储器模块的存储器的i/o的设备及方法
JP2004164633A5 (enExample)
KR20100121215A (ko) 반도체 장치, 및 상기 반도체 장치의 ｏｓ 이미지 라이트 방법
EP3506116A1 (en) Shared memory controller in a data center
TWI668703B (zh) 具有可程式化緩衝器及快取大小的記憶體協定
US20190155765A1 (en) Operation method of host system including storage device and operation method of storage device controller
JP5533963B2 (ja) 構成可能な入出力ポートを伴うメモリモジュール
CN109213687A (zh) 数据储存装置、存储器操作方法及操作指令执行方法
KR102219759B1 (ko) 저장 장치, 그것을 포함하는 데이터 저장 시스템 및 그것의 동작 방법
TW201735032A (zh) 記憶體系統及其控制方法
CN102955756A (zh) 多端口存储元件和包括其的半导体设备及系统
JP2008158955A5 (enExample)
CN110618877A (zh) 用于提供包队列的自适应轮询的技术
TWI634429B (zh) 基於spi界面的多記憶體協作結構
US11309055B2 (en) Power loss test engine device and method