JP2010511943A5 - - Google Patents
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- JP2010511943A5 JP2010511943A5 JP2009539576A JP2009539576A JP2010511943A5 JP 2010511943 A5 JP2010511943 A5 JP 2010511943A5 JP 2009539576 A JP2009539576 A JP 2009539576A JP 2009539576 A JP2009539576 A JP 2009539576A JP 2010511943 A5 JP2010511943 A5 JP 2010511943A5
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- 239000004065 semiconductor Substances 0.000 claims 18
- 230000004044 response Effects 0.000 claims 6
- 230000000717 retained Effects 0.000 claims 2
- 230000000644 propagated Effects 0.000 claims 1
Claims (17)
前記複数のデバイスが、シリアル相互接続され、前記シリアル相互接続構成の第1デバイスが、シリアル入力を受け取り、前記シリアル入力が、前記シリアル相互接続構成を介して伝搬され、前記シリアル入力が、デバイスタイプ識別、コマンド、およびデバイスアドレス識別を含み、前記デバイスが、前記デバイスタイプ識別および前記デバイスアドレス識別に基づいて前記コマンドを実行する、半導体デバイス。 A semiconductor device used in a serial interconnect configuration of multiple devices of mixed type,
The plurality of devices are serially interconnected, a first device of the serial interconnect configuration receives a serial input, the serial input is propagated through the serial interconnect configuration, and the serial input is a device type A semiconductor device comprising an identification, a command, and a device address identification, wherein the device executes the command based on the device type identification and the device address identification.
デバイスアドレスを保持するアドレスホルダであって、割り当てられたアドレスが、前記デバイスのアドレスを示す、アドレスホルダと
をさらに含む、請求項1に記載の半導体デバイス。 A device type holder for holding a device type indicating the type of the device;
The semiconductor device according to claim 1, further comprising: an address holder that holds a device address, wherein the assigned address indicates an address of the device.
前記デバイスアドレス識別が前記アドレスホルダによって保持される前記デバイスアドレスと一致するかどうかを判定するアドレス一致デターミナであって、それぞれ、前記デバイスアドレス識別が前記保持されるデバイスアドレスと一致する場合にアドレス一致結果を、前記デバイスアドレス識別が前記保持されるデバイスアドレスと一致しない場合に非デバイスアドレス一致結果を提供することができる、アドレス一致デターミナと
をさらに含む、請求項2に記載の半導体デバイス。 A type match determiner that determines whether the device type identification matches the device type held by the device type holder, each device if the device type identification matches the held device type A type match determiner that can provide a non-device type match result if the device type identification does not match the retained device type; and
An address match determiner that determines whether the device address identification matches the device address held by the address holder, each address match if the device address identification matches the held device address 3. The semiconductor device of claim 2, further comprising: an address match determiner that can provide a non-device address match result if the device address identification does not match the retained device address.
前記デバイスタイプ一致結果および前記アドレス一致結果に応答して、前記受け取られたシリアル入力に含まれる前記コマンドを実行する
デバイスコントローラをさらに含む、請求項3に記載の半導体デバイス。 Controlling the operation of the device in response to the received serial input;
4. The semiconductor device according to claim 3, further comprising a device controller that executes the command included in the received serial input in response to the device type match result and the address match result.
前記デバイスコントローラが、
前記デバイスタイプ一致結果および前記デバイスアドレス一致結果に応答して前記アドレス番号を変更し、
前記シリアル入力に含まれる前記データ情報を前記シリアル相互接続構成の次のデバイスに転送する
ことができる
請求項4に記載の半導体デバイス。 The serial input further includes data information including an address number;
The device controller is
Changing the address number in response to the device type match result and the device address match result;
5. The semiconductor device according to claim 4, wherein the data information included in the serial input can be transferred to a next device of the serial interconnection configuration.
前記シリアル入力に含まれる前記デバイスアドレス識別が、前記所期のアドレス番号を含み、
前記シリアル入力に含まれる前記データ情報の前記アドレス番号が、初期アドレス番号を含み、
前記デバイスコントローラが、前記アドレス一致結果に応答して前記初期アドレス番号を変更することができ、変更されたアドレス番号が、前記アドレスホルダ内に保持される前記所期のアドレス番号を置換する
請求項5に記載の半導体デバイス。 The address holder holds an intended address number;
The device address identification included in the serial input includes the intended address number;
The address number of the data information included in the serial input includes an initial address number;
The device controller can change the initial address number in response to the address match result, and the changed address number replaces the intended address number held in the address holder. 5. The semiconductor device according to 5.
前記シリアル入力に含まれる前記データ情報が、前記メモリに関する情報データをさらに含み、
前記デバイスコントローラが、前記デバイスタイプ一致結果および前記デバイスアドレス一致結果に応答して、前記メモリにアクセスするために、前記メモリ関連情報データに基づいて前記コマンドを実行することができる
請求項13に記載の半導体デバイス。 The device includes a memory;
The data information included in the serial input further includes information data relating to the memory;
The device controller can execute the command based on the memory-related information data to access the memory in response to the device type match result and the device address match result. Semiconductor devices.
Applications Claiming Priority (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US86877306P | 2006-12-06 | 2006-12-06 | |
US60/868,773 | 2006-12-06 | ||
US87089206P | 2006-12-20 | 2006-12-20 | |
US60/870,892 | 2006-12-20 | ||
US11/622,828 | 2007-01-12 | ||
US11/622,828 US8271758B2 (en) | 2006-12-06 | 2007-01-12 | Apparatus and method for producing IDS for interconnected devices of mixed type |
US11/771,241 | 2007-06-29 | ||
US11/771,241 US7925854B2 (en) | 2006-12-06 | 2007-06-29 | System and method of operating memory devices of mixed type |
PCT/CA2007/002182 WO2008067658A1 (en) | 2006-12-06 | 2007-12-04 | System and method of operating memory devices of mixed type |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010257825A Division JP5351130B2 (en) | 2006-12-06 | 2010-11-18 | System and method for operating mixed types of memory devices |
JP2013257579A Division JP5695724B2 (en) | 2006-12-06 | 2013-12-13 | System and method for operating mixed types of memory devices |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2010511943A JP2010511943A (en) | 2010-04-15 |
JP2010511943A5 true JP2010511943A5 (en) | 2011-01-20 |
JP5683813B2 JP5683813B2 (en) | 2015-03-11 |
Family
ID=39491613
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009539576A Expired - Fee Related JP5683813B2 (en) | 2006-12-06 | 2007-12-04 | System and method for operating mixed types of memory devices |
JP2010257825A Expired - Fee Related JP5351130B2 (en) | 2006-12-06 | 2010-11-18 | System and method for operating mixed types of memory devices |
JP2013257579A Expired - Fee Related JP5695724B2 (en) | 2006-12-06 | 2013-12-13 | System and method for operating mixed types of memory devices |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010257825A Expired - Fee Related JP5351130B2 (en) | 2006-12-06 | 2010-11-18 | System and method for operating mixed types of memory devices |
JP2013257579A Expired - Fee Related JP5695724B2 (en) | 2006-12-06 | 2013-12-13 | System and method for operating mixed types of memory devices |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP2118903A4 (en) |
JP (3) | JP5683813B2 (en) |
KR (3) | KR101441154B1 (en) |
TW (1) | TWI470645B (en) |
WO (1) | WO2008067658A1 (en) |
Families Citing this family (19)
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US8463959B2 (en) * | 2010-05-31 | 2013-06-11 | Mosaid Technologies Incorporated | High-speed interface for daisy-chained devices |
TWI425362B (en) * | 2010-12-07 | 2014-02-01 | Alpha Imaging Technology Corp | Memory interface chip corresponding to different memories and method of establishing memory transmission channel |
US9697872B2 (en) * | 2011-12-07 | 2017-07-04 | Cypress Semiconductor Corporation | High speed serial peripheral interface memory subsystem |
US8614920B2 (en) | 2012-04-02 | 2013-12-24 | Winbond Electronics Corporation | Method and apparatus for logic read in flash memory |
JP5467134B1 (en) * | 2012-09-27 | 2014-04-09 | 華邦電子股▲ふん▼有限公司 | Flash memory device and method of operating memory device |
US10067903B2 (en) | 2015-07-30 | 2018-09-04 | SK Hynix Inc. | Semiconductor device |
US11755255B2 (en) | 2014-10-28 | 2023-09-12 | SK Hynix Inc. | Memory device comprising a plurality of memories sharing a resistance for impedance matching |
KR102366767B1 (en) * | 2015-07-30 | 2022-02-23 | 에스케이하이닉스 주식회사 | Semiconductor device |
KR102358177B1 (en) | 2015-12-24 | 2022-02-07 | 에스케이하이닉스 주식회사 | Control circuit and memory device including the control circuit |
US10146608B2 (en) * | 2015-04-06 | 2018-12-04 | Rambus Inc. | Memory module register access |
FR3041806B1 (en) * | 2015-09-25 | 2017-10-20 | Stmicroelectronics Rousset | NON-VOLATILE MEMORY DEVICE, FOR EXAMPLE OF THE EEPROM TYPE, HAVING IMPORTANT MEMORY CAPACITY, FOR EXAMPLE 16MBITS |
GB2568725B (en) * | 2017-11-24 | 2021-08-18 | Ge Aviat Systems Ltd | Method and apparatus for initializing a controller module |
GB2568724B (en) * | 2017-11-24 | 2021-08-18 | Ge Aviat Systems Ltd | Method and apparatus for initializing a controller module |
CN110413197B (en) * | 2018-04-28 | 2023-06-27 | 伊姆西Ip控股有限责任公司 | Method, apparatus and computer program product for managing a storage system |
TWI696113B (en) * | 2019-01-02 | 2020-06-11 | 慧榮科技股份有限公司 | Method for performing configuration management, and associated data storage device and controller thereof |
US20210081318A1 (en) * | 2019-09-17 | 2021-03-18 | Micron Technology, Inc. | Flexible provisioning of multi-tier memory |
TWI749598B (en) * | 2020-06-18 | 2021-12-11 | 華邦電子股份有限公司 | Memory apparatus and method of burst read and burst write thereof |
US11120851B1 (en) | 2020-07-12 | 2021-09-14 | Winbond Electronics Corp. | Memory apparatus and burst read and burst write method thereof |
CN113641595B (en) * | 2021-07-30 | 2023-08-11 | 珠海一微半导体股份有限公司 | Type identification method and system of SPI FLASH in BROM stage of independent block protection mode |
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-
2007
- 2007-12-04 WO PCT/CA2007/002182 patent/WO2008067658A1/en active Application Filing
- 2007-12-04 KR KR1020097014049A patent/KR101441154B1/en not_active IP Right Cessation
- 2007-12-04 EP EP07855464A patent/EP2118903A4/en not_active Withdrawn
- 2007-12-04 KR KR1020147001536A patent/KR101441280B1/en not_active IP Right Cessation
- 2007-12-04 KR KR1020127027959A patent/KR101441225B1/en not_active IP Right Cessation
- 2007-12-04 JP JP2009539576A patent/JP5683813B2/en not_active Expired - Fee Related
- 2007-12-06 TW TW96146483A patent/TWI470645B/en not_active IP Right Cessation
-
2010
- 2010-11-18 JP JP2010257825A patent/JP5351130B2/en not_active Expired - Fee Related
-
2013
- 2013-12-13 JP JP2013257579A patent/JP5695724B2/en not_active Expired - Fee Related
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