JP2010093762A5 - - Google Patents

Download PDF

Info

Publication number
JP2010093762A5
JP2010093762A5 JP2008264635A JP2008264635A JP2010093762A5 JP 2010093762 A5 JP2010093762 A5 JP 2010093762A5 JP 2008264635 A JP2008264635 A JP 2008264635A JP 2008264635 A JP2008264635 A JP 2008264635A JP 2010093762 A5 JP2010093762 A5 JP 2010093762A5
Authority
JP
Japan
Prior art keywords
frequency
unit
signal
input
control value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008264635A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010093762A (ja
JP5264401B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2008264635A priority Critical patent/JP5264401B2/ja
Priority claimed from JP2008264635A external-priority patent/JP5264401B2/ja
Priority to US12/560,395 priority patent/US8085098B2/en
Publication of JP2010093762A publication Critical patent/JP2010093762A/ja
Publication of JP2010093762A5 publication Critical patent/JP2010093762A5/ja
Application granted granted Critical
Publication of JP5264401B2 publication Critical patent/JP5264401B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2008264635A 2008-10-10 2008-10-10 Ｐｌｌ回路 Expired - Fee Related JP5264401B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008264635A JP5264401B2 (ja) 2008-10-10 2008-10-10 Ｐｌｌ回路
US12/560,395 US8085098B2 (en) 2008-10-10 2009-09-15 PLL circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008264635A JP5264401B2 (ja) 2008-10-10 2008-10-10 Ｐｌｌ回路

Publications (3)

Publication Number Publication Date
JP2010093762A JP2010093762A (ja) 2010-04-22
JP2010093762A5 true JP2010093762A5 (zh) 2011-11-10
JP5264401B2 JP5264401B2 (ja) 2013-08-14

Family

ID=42256002

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008264635A Expired - Fee Related JP5264401B2 (ja) 2008-10-10 2008-10-10 Ｐｌｌ回路

Country Status (1)

Country Link
JP (1) JP5264401B2 (zh)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59132214A (ja) * 1983-01-19 1984-07-30 Toshiba Corp 利得可変回路
US5999028A (en) * 1997-12-22 1999-12-07 Hewlett-Packard Company Differential circuits with adjustable propagation timing
JP3425426B2 (ja) * 2000-01-31 2003-07-14 松下電器産業株式会社 トランスコンダクタおよびフィルタ回路
JP4273729B2 (ja) * 2002-09-18 2009-06-03 ソニー株式会社 可変利得増幅器
JP4866707B2 (ja) * 2006-11-10 2012-02-01 パナソニック株式会社 Ｐｌｌ回路及び信号送受信システム

Similar Documents

Publication Publication Date Title
US9270288B2 (en) Time-to-digital converter based on a voltage controlled oscillator
US6958639B2 (en) Digital duty cycle correction circuit and method for multi-phase clock
US7750742B2 (en) Enhanced all digital phase-locked loop and oscillation signal generation method thereof
US8253454B2 (en) Phase lock loop with phase interpolation by reference clock and method for the same
US9705512B1 (en) Self-calibrating fractional-N phase lock loop and method thereof
WO2017150241A1 (ja) 位相同期回路及びその制御方法
JP4723652B2 (ja) 位相差検出器、及び位相差検出方法
JP2011526752A (ja) 時間デジタル変換器を有する回路および位相測定方法
US9853650B1 (en) Method and apparatus of frequency synthesis
US11251797B2 (en) Time-to-digital converter and phase locked loop
US8797076B2 (en) Duty ratio correction circuit, double-edged device, and method of correcting duty ratio
KR101309465B1 (ko) 듀티 사이클 보정장치
WO2011161737A1 (ja) デジタル位相差検出器およびそれを備えた周波数シンセサイザ
JP2011205338A (ja) 局部発振器
JP2010028600A (ja) Ｔｄｃ回路、ｐｌｌ回路、並びに無線通信装置
JPWO2010047005A1 (ja) デジタルｐｌｌ回路及び通信装置
JP2013223112A (ja) Ａｄ変換回路
TWI613890B (zh) 數位控制振盪器的頻率校正方法及其頻率校正裝置
JP2010093762A5 (zh)
US9891641B2 (en) Equipment having noise elimination function, PLL circuit and voltage/current source
Xu et al. An all-digital PLL frequency synthesizer with an improved phase digitization approach and an optimized frequency calibration technique
US7923979B2 (en) Control system for dynamically adjusting output voltage of voltage converter
JP2010093761A5 (zh)
Li et al. A digitally calibrated low-power ring oscillator
Lin et al. Design of A 0.8 GHz-3GHz Duty-Cycle Corrector With a 20%-80% Input Duty Cycle