JP2010061779A5 - - Google Patents
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- Publication number
- JP2010061779A5 JP2010061779A5 JP2009080470A JP2009080470A JP2010061779A5 JP 2010061779 A5 JP2010061779 A5 JP 2010061779A5 JP 2009080470 A JP2009080470 A JP 2009080470A JP 2009080470 A JP2009080470 A JP 2009080470A JP 2010061779 A5 JP2010061779 A5 JP 2010061779A5
- Authority
- JP
- Japan
- Prior art keywords
- signal
- count
- latch
- crossing circuit
- unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 22
- 230000000630 rising effect Effects 0.000 claims 7
- 230000001360 synchronised effect Effects 0.000 claims 4
- 230000001934 delay Effects 0.000 claims 3
- 230000003111 delayed effect Effects 0.000 claims 2
- 238000000034 method Methods 0.000 claims 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020080087783A KR100925393B1 (ko) | 2008-09-05 | 2008-09-05 | 반도체 메모리 장치의 도메인 크로싱 회로 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010061779A JP2010061779A (ja) | 2010-03-18 |
| JP2010061779A5 true JP2010061779A5 (enExample) | 2012-05-24 |
Family
ID=41561294
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009080470A Pending JP2010061779A (ja) | 2008-09-05 | 2009-03-27 | 半導体メモリ装置のドメインクロシング回路 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8099620B2 (enExample) |
| JP (1) | JP2010061779A (enExample) |
| KR (1) | KR100925393B1 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8326364B2 (en) * | 2010-05-13 | 2012-12-04 | Texas Instruments Incorporated | High resolution, low power design for CPRI/OBSAI latency measurement |
| US8977881B2 (en) * | 2011-08-12 | 2015-03-10 | Apple Inc. | Controller core time base synchronization |
| DE102016104767B4 (de) * | 2016-03-15 | 2017-10-12 | Pilz Gmbh & Co. Kg | Vorrichtung und Verfahren zum Steuern einer automatisierten Anlage |
| KR102491691B1 (ko) * | 2018-02-23 | 2023-01-27 | 에스케이하이닉스 주식회사 | 읽기 타임아웃 관리부 및 이를 포함하는 메모리 시스템과, 읽기 타임아웃 관리방법 |
| KR20190134037A (ko) * | 2018-05-24 | 2019-12-04 | 에스케이하이닉스 주식회사 | 도메인 크로싱 기능을 갖는 반도체 장치 |
| US12449835B2 (en) * | 2023-08-02 | 2025-10-21 | Xilinx, Inc. | Measuring and compensating for clock tree variation |
| WO2025136397A1 (en) * | 2023-12-21 | 2025-06-26 | Google Llc | Clock domain crossing for time tracking |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3078934B2 (ja) | 1992-12-28 | 2000-08-21 | 富士通株式会社 | 同期型ランダムアクセスメモリ |
| KR100532441B1 (ko) * | 2003-06-09 | 2005-11-30 | 삼성전자주식회사 | 레이턴시 회로를 구비하는 반도체 메모리 장치 및 그데이터 출력 제어 방법 |
| KR100522433B1 (ko) | 2003-04-29 | 2005-10-20 | 주식회사 하이닉스반도체 | 도메인 크로싱 회로 |
| TWI267871B (en) * | 2004-01-10 | 2006-12-01 | Hynix Semiconductor Inc | Domain crossing device |
| US7084680B2 (en) * | 2004-08-31 | 2006-08-01 | Micron Technology, Inc. | Method and apparatus for timing domain crossing |
| KR100625296B1 (ko) * | 2004-12-30 | 2006-09-19 | 주식회사 하이닉스반도체 | 고주파수 동작을 위한 동기식 반도체 장치의 레이턴시제어장치 및 그 제어방법 |
| KR100829455B1 (ko) | 2006-11-13 | 2008-05-15 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 데이터 출력 제어신호 생성회로 및방법 |
-
2008
- 2008-09-05 KR KR1020080087783A patent/KR100925393B1/ko not_active Expired - Fee Related
- 2008-12-30 US US12/346,675 patent/US8099620B2/en not_active Expired - Fee Related
-
2009
- 2009-03-27 JP JP2009080470A patent/JP2010061779A/ja active Pending
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