JP2009529125A - 電子コンポーネントに問い合わせをする方法および装置 - Google Patents
電子コンポーネントに問い合わせをする方法および装置 Download PDFInfo
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Abstract
Description
SiPモジュールの試験は電子製造産業における著しくかつ高まりつつある問題である。ほんの8年でSiPパッケージングは、パッケージングされたIC市場の5%未満から50%近くにまで成長した。このように、SiPおよびSiP試験はごく短期間に数十億ドル産業になったのである。半導体産業協会(SIA: Semiconductor Industry Association)はSiPを、半導体、受動要素および相互接続が単一のパッケージに集積された任意の組み合わせと定義している。SiPの経済性は、複数の異なる技術(能動および受動)を微小パッケージに組み合わせる能力に基づいている。
先述したPCBおよびICの試験の問題は、一組のVLSI ICおよび離散コンポーネントが基板上に配置されてコンパクトなシステムを創り出すSiPパッケージングにも継続する。SiP組み立ては、物理的に小型だが低コストのパッケージにおいて非常に高レベルのシステム集積を提供するためにベア・ダイおよび反転チップの技法を含む。さらに、受動要素が別個の部品として含められ、あるいはSiP基板中に統合されることさえできる。SiPにおいて使用される基板はICと同じ道をたどって、ただしより微細な特徴およびより高い複雑さをもって、進化しつつある。大量のSiPを同時に単一のウェーハ上で生産する能力がボトルネックを生じる。というのも、SiP試験が現在は直列的に行われているからである。
i)一対一マッピング;
ii)一対多マッピング;
iii)多対一マッピング;
iv)多対多マッピング
と記述される。
i)送信機16および/または受信機22とDAP12が同じチップ上
ii)送信機16および/または受信機22とDAP12が別個のチップ上だが、両方とも同じ半導体基板上にマウントされている
iii)送信機16および/または受信機22とDAP12が同じ半導体基板上
iv)送信機16および/または受信機22が一つの半導体基板上、DAP12が別の半導体基板上で、半導体基板間は同じパッケージ内で連絡
v)送信機16および/または受信機22とDAP12が同じ基板上
vi)送信機16および/または受信機22が一つの基板上、DAP12が別の基板上で、両基板間が連絡している
というものである。
無線通信ブロック(WCB)10は、試験プローブに/からデータを送信および受信するために使われる。下記の実施形態は試験装置であるが、本装置が、試験以外の目的のための通信も含め、システム・イン・パッケージの諸コンポーネントへの問い合わせのために使われることは理解されるであろう。試験プローブについては図29ないし図31を参照して述べる。物理層での無線通信のための技術は近距離場(容量性、誘導性)結合または遠距離(放射)結合を含む。光学的または磁気的結合を使ってもよい。
ここで、SAP100について図21ないし23を参照して述べる。SAP100は、DUT20中に組み込まれていてもよい。ここで、接触試験ポート102を提供するボディを有するそのようなSAP100はDUT20の基板104上に設けられて、図21に示されるように、タッチパッド108の形の接触インターフェースへのプローブ106を使った結線試験を可能にする。試験ポート102は伝導性であり、試験されるべき一つまたは複数のDUT20上のコンポーネントと直接的な電子的連絡がある。WTAP18はDUT20上の組み合わせにおいて提供されてもよい。
アンテナ構造およびトランシーバ回路のパフォーマンスはWTAPの動作に決定的である。これらは広範にモデル化され、シミュレートされてきた。アンテナについては、シミュレーションは四つの異なるシミュレーション・ソフトウェア3Dパッケージの組み合わせを使って実行された。最初の二つのパッケージ、Totem(学術的な環境で開発された)およびAxFDTDは有限差分時間領域(FDTD: Finite Difference Time Domain)法を使う。第三および第四のパッケージは、先進設計システム(ADS: Advanced Design System)およびSonnetであった。これらはモーメント法(MoM: Method-of-Moments)解析を使う。異なるパッケージのそれぞれでのシミュレーションを使って、理論的な観点から、最適なアンテナ幾何学、アンテナ・ピッチ、アンテナ・サイズ、マッチング回路およびアンテナ終端が決定される。無線チップ間通信のための基本的なアンテナ設計モデリングの議論は、たとえば、Sellathamby et al., “Wireless Probe Card”, Southwest Test Workshop, Session 7, 2004およびFloyd et al. “Wireless Interconnection in CMOS IC with Integrated Antennas”, IEEE ISSCC 2000, Paper WA 19.6, Feb. 2000, pp.238に見出すことができる。
アンテナについてのコンピュータ・モデルは助けになるものの、IC内の微小環境的な詳細のため、必然的に不完全である。たとえば、多層金属チップを用いた製造性(manufacturability)および歩留まり(yield)を許容するために、CMP金属がサブミクロンのVLSIチップ上に使われる。それはチップ生産を可能にする主たるものであるが、特にチップ外への無線通信をもとうとするときに、電磁的な微小環境に対する重要な影響を作り出す。VLSI中で直接これを製作および実験することは高価で時間がかかるので、チップ上でのアンテナ環境の実験モデルの設計が、アンテナ微小環境に関する未知数に答えるために着想された。いくつかのアンテナ環境が標準的な電子工学材料を使って200倍のチップ・スケールで生産された。これらの結果は、最終的なシリコン設計のための微小環境問題の迅速なテストを許容した。
データ転送のために使われるトランシーバ回路は、CADソフトウェア・ツールを用いて設計され、シミュレートされた。JTAGのこの実装のためのシステム要件が10Mボー(M-baud)のスループットを要求していたので、最も現実的で設計リスクが最低の通信方法として振幅変調(AM)が選ばれた。システム要件、GHzの搬送波および低いエラーレートの理由で、AMは主としてその設計および実装の単純さのため、合理的な選択である。より早期のシミュレーションはAM、FMおよび直接デジタル変調技法を含んでいた。
・技術:CMOS 0.13μm
・金属層の数:8が利用可能、8が使用
・RF設計周波数:1.0〜1.5GHz
・アンテナ・サイズ:120μm×120μm
設計された。
図35は、ハイブリッド無線プローブ・カードを示している。図34に示された無線プローブは標準的なプローブ・カードの中央の開口に置かれる。無線プローブ・カードの周部に見られる標準的なプローブ探針はSiP無線DUTに電力を提供する。
1.プローブ・トランシーバIC
2.セラミック遷移(transition)ハイブリッド
3.プローブPCBへのリボン・コネクタをもつPCB
4.背面マウント・ポスト
5.無線プローブ・マウント(上側プローブ・カードPCBリング内にはまる)
これらのすべては、未修正のプローブ・カードの開口ののど(throat)にはまらなければならない。ベンチ試験は標準的なプローバー(prober)上で実行された。面を突き合わせた(face to face)エラーレート試験がカスタムxyzプローブ・ホルダ上で実行された。フランス国カン(Caen)のNXP生産施設の生産フロア上でAgilent 4070テスターを用いてSiP生産試験がElectroglas 4090uプローバー上で実行された。
システム・データ・エラーレートの完全性(integrity)を試験するために、理想的および非理想的なDUTプローブ配置条件のもとで生のエラーレートを評価するとともに、可能な機械的なオフセットの範囲を見るために試験が実行された。ビット・エラーレート試験が、無線通信リンクのエラーレートを決定するために使われた。送信(デジタル入力)プローブ側では、試験パターンがTektronix CSA 907T試験を用いてセットされた。DUT受信信号(デジタル出力)は相棒のTektronix CSA 907R受信機に接続された。試験に際して、ユニットが10Mボーのデータ・レートという設計目標にマッチするため、クロックレートは、20MHzにセットされた。擬似ランダムなビット・パターンが送信機上で選択された。受信試験セットが同じパターンを観察するためにセットされた。受信レベルは0.4ボルトに落ち着いた。この低電圧はCMOS DUT出力をロードするTektronix試験セットの50オームの終端のためである。DUTの低電力CMOS論理出力は通常、50オームは見ず、よって出力をより低い電圧レベルにロードした。プローブがSiP基板上にマウントされたDUTの上に位置されていたとき、30μmのギャップがDUTとプローブの間にセットされた。
Claims (17)
- 電子コンポーネント(20)に問い合わせする方法であって:
前記電子コンポーネント(20)の試験において問い合わせデバイス(48/50または106)がコンジットとして使うためのインターフェース(10または108)をもつボディ(18または102)を設け、該ボディは前記電子コンポーネントとは別個でかつ相異なるものであり;
前記問い合わせデバイス(48/50または106)が前記電子コンポーネント(20)に物理的に接触することなく、前記ボディ(18または102)のインターフェース(10または108)を介して、前記電子コンポーネント(20)への複数回の離散的問い合わせを実行することを含む、
方法。 - 電子コンポーネント(20)に問い合わせする装置であって:
問い合わせデバイス(48/50または106)が前記電子コンポーネント(20)に物理的に接触することなく前記電子コンポーネント(20)への複数回の離散的な問い合わせを信頼できる形で実行する際に、該問い合わせデバイス(48/50または106)がコンジットとして使うためのインターフェース(10、24または108、154)をもつボディ(18または102)を有し、該ボディは前記電子コンポーネントとは別個でかつ相異なるものである、
装置。 - 前記インターフェース(10)が送信機(16)、受信機(22)またはトランシーバ(24)のうちの少なくとも一つを含む、請求項2記載の装置。
- 前記インターフェースが別個の送信器回路(16)および別個の受信機回路(22)を有する少なくとも一つのトランシーバ(24)を含む、請求項3記載の装置。
- 前記問い合わせデバイス(48/50または106)と前記インターフェース(10、24または108、154)が、無線通信する(48から22および55から16)、物理的接触を通じて通信する(106から108)またはその両方である、請求項2記載の装置。
- 無線通信が容量性結合、誘導性結合または電磁波のうちの一つを含む、請求項5記載の装置。
- 前記ボディが、命令を前記電子コンポーネントに加えられるべき制御信号、通信信号またはその両方に変換するための論理回路(28)を有する、請求項2記載の装置。
- 前記ボディがパターン発生器(30)を有する、請求項2記載の装置。
- 前記ボディが前記電子コンポーネントの出力を検証するための出力検証回路(32、34、36、38)を有する、請求項2記載の装置。
- 前記ボディがアナログ‐デジタル変換器(40)またはデジタル‐アナログ変換器(42)のうちの少なくとも一つを有する、請求項2記載の装置。
- 前記ボディ(18)が、二つ以上の電子コンポーネント(20)と通信するために二つ以上のアクセス・ポート(12)をもつインターフェース(10)を有する、請求項2記載の装置。
- 前記ボディ(18)が、前記二つ以上の電子コンポーネントが、並列に、または逐次に、または個々にのうちの少なくとも一つで問い合わせされることを可能にする、請求項11記載の装置。
- 前記ボディ(18)が、問い合わせデバイスが前記電子コンポーネント(20)のためのアクセス・ポート(12)と通信するのに介するインターフェース(10)を二つ以上有する、請求項2記載の方法。
- 前記インターフェースが、送信機(16)および受信機(22)を有する無線通信ブロック(10)を有する、請求項2記載の装置。
- 前記インターフェースが、データおよび電力を受信するよう適応された有線入力(108または154)である、請求項2記載の装置。
- 前記有線入力が接触パッド(108)である、請求項15記載の装置。
- 前記有線入力が複数回接触パネル(154)である、請求項16記載の装置。
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PCT/CA2007/000368 WO2007101345A1 (en) | 2006-03-07 | 2007-03-06 | Method and apparatus for interrogating an electronic component |
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Also Published As
Publication number | Publication date |
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WO2007101345A9 (en) | 2007-12-06 |
EP1996955A4 (en) | 2011-10-19 |
US8390307B2 (en) | 2013-03-05 |
EP1996955A1 (en) | 2008-12-03 |
WO2007101345A1 (en) | 2007-09-13 |
CA2642884A1 (en) | 2007-09-13 |
KR101387085B1 (ko) | 2014-04-18 |
US20090072843A1 (en) | 2009-03-19 |
KR20090015895A (ko) | 2009-02-12 |
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