JP2009217926A - アドレス制御回路を含む半導体集積回路 - Google Patents
アドレス制御回路を含む半導体集積回路 Download PDFInfo
- Publication number
- JP2009217926A JP2009217926A JP2009008136A JP2009008136A JP2009217926A JP 2009217926 A JP2009217926 A JP 2009217926A JP 2009008136 A JP2009008136 A JP 2009008136A JP 2009008136 A JP2009008136 A JP 2009008136A JP 2009217926 A JP2009217926 A JP 2009217926A
- Authority
- JP
- Japan
- Prior art keywords
- address
- carry
- internal
- integrated circuit
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 74
- 230000003111 delayed effect Effects 0.000 claims description 38
- 230000004044 response Effects 0.000 claims description 33
- 230000003213 activating effect Effects 0.000 claims description 8
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 8
- 230000001934 delay Effects 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 5
- 230000004913 activation Effects 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 24
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 4
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 4
- 101150110971 CIN7 gene Proteins 0.000 description 3
- 101150110298 INV1 gene Proteins 0.000 description 3
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 3
- 101100508840 Daucus carota INV3 gene Proteins 0.000 description 2
- 230000003044 adaptive effect Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/06—Address interface arrangements, e.g. address buffers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020080022763A KR100945792B1 (ko) | 2008-03-12 | 2008-03-12 | 어드레스 제어 회로를 포함하는 반도체 집적 회로 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2009217926A true JP2009217926A (ja) | 2009-09-24 |
| JP2009217926A5 JP2009217926A5 (https=) | 2012-03-01 |
Family
ID=41062896
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009008136A Pending JP2009217926A (ja) | 2008-03-12 | 2009-01-16 | アドレス制御回路を含む半導体集積回路 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8068383B2 (https=) |
| JP (1) | JP2009217926A (https=) |
| KR (1) | KR100945792B1 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2575137A2 (en) | 2011-09-28 | 2013-04-03 | Elpida Memory, Inc. | Semiconductor device |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102471523B1 (ko) * | 2018-04-26 | 2022-11-28 | 에스케이하이닉스 주식회사 | 반도체 집적 회로 장치 및 이를 포함하는 반도체 메모리 시스템 |
| CN114882934B (zh) * | 2021-02-05 | 2024-06-21 | 长鑫存储技术有限公司 | 测试电路 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5652723A (en) * | 1991-04-18 | 1997-07-29 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device |
| KR0122099B1 (ko) * | 1994-03-03 | 1997-11-26 | 김광호 | 라이트레이턴시제어기능을 가진 동기식 반도체메모리장치 |
| US5481581A (en) | 1995-05-19 | 1996-01-02 | United Memories, Inc. | Programmable binary/interleave sequence counter |
| JPH10172298A (ja) * | 1996-12-05 | 1998-06-26 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JPH1186596A (ja) * | 1997-09-08 | 1999-03-30 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US6778443B2 (en) * | 2001-12-25 | 2004-08-17 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device having memory blocks pre-programmed before erased |
| JP4232714B2 (ja) | 2004-09-02 | 2009-03-04 | ソニー株式会社 | 読出アドレス制御方法、物理情報取得装置、および半導体装置 |
| KR100673103B1 (ko) * | 2005-07-14 | 2007-01-22 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 어드레스 제어 회로 |
| KR100776747B1 (ko) * | 2006-05-09 | 2007-11-19 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 로우 어드레스 제어 회로 및 방법 |
| KR100799124B1 (ko) * | 2006-06-30 | 2008-01-29 | 주식회사 하이닉스반도체 | 동기식 반도체 메모리 소자 및 그의 구동방법 |
-
2008
- 2008-03-12 KR KR1020080022763A patent/KR100945792B1/ko not_active Expired - Fee Related
- 2008-12-17 US US12/337,521 patent/US8068383B2/en active Active
-
2009
- 2009-01-16 JP JP2009008136A patent/JP2009217926A/ja active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2575137A2 (en) | 2011-09-28 | 2013-04-03 | Elpida Memory, Inc. | Semiconductor device |
| US8737143B2 (en) | 2011-09-28 | 2014-05-27 | Chikara Kondo | Semiconductor device having PDA function |
| US9087560B2 (en) | 2011-09-28 | 2015-07-21 | Ps4 Luxco S.A.R.L. | Semiconductor device having PDA function |
| EP3206209A1 (en) | 2011-09-28 | 2017-08-16 | PS4 Luxco S.a.r.l. | Controller for a semiconductor device |
| EP3401912A1 (en) | 2011-09-28 | 2018-11-14 | Longitude Semiconductor S.à.r.l. | Controller for a semiconductor device |
| EP3699912A2 (en) | 2011-09-28 | 2020-08-26 | Longitude Licensing Limited | Semiconductor device |
| US10930338B2 (en) | 2011-09-28 | 2021-02-23 | Longitude Licensing Limited | Semiconductor device having PDA function |
| US11417392B2 (en) | 2011-09-28 | 2022-08-16 | Longitude Licensing Limited | Semiconductor device having PDA function |
| US11948623B2 (en) | 2011-09-28 | 2024-04-02 | Longitude Licensing Limited | Semiconductor device having PDA function |
| US12374385B2 (en) | 2011-09-28 | 2025-07-29 | Longitude Licensing Limited | Semiconductor device having PDA function |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20090097555A (ko) | 2009-09-16 |
| US20090231947A1 (en) | 2009-09-17 |
| US8068383B2 (en) | 2011-11-29 |
| KR100945792B1 (ko) | 2010-03-08 |
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Legal Events
| Date | Code | Title | Description |
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| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120116 |
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| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20120116 |
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| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120306 |
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| A131 | Notification of reasons for refusal |
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| A02 | Decision of refusal |
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