JP2008530798A - 低速および高速信号経路を有する半導体パッケージ - Google Patents

低速および高速信号経路を有する半導体パッケージ Download PDF

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Publication number
JP2008530798A
JP2008530798A JP2007555108A JP2007555108A JP2008530798A JP 2008530798 A JP2008530798 A JP 2008530798A JP 2007555108 A JP2007555108 A JP 2007555108A JP 2007555108 A JP2007555108 A JP 2007555108A JP 2008530798 A JP2008530798 A JP 2008530798A
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JP
Japan
Prior art keywords
substrate
flexible conductor
semiconductor
semiconductor package
conductive layer
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Pending
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JP2007555108A
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English (en)
Japanese (ja)
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JP2008530798A5 (https=
Inventor
リ，ミン
カーリリ，サイェー
マレン，ドナルド，アール．
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ラムバス・インコーポレーテッド
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Publication of JP2008530798A publication Critical patent/JP2008530798A/ja
Publication of JP2008530798A5 publication Critical patent/JP2008530798A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/688—Flexible insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H10W44/255—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for operation at multiple different frequencies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H10W72/07554—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

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  • Wire Bonding (AREA)
  • Combinations Of Printed Boards (AREA)
JP2007555108A 2005-02-11 2006-01-19 低速および高速信号経路を有する半導体パッケージ Pending JP2008530798A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/056,535 US7705445B2 (en) 2005-02-11 2005-02-11 Semiconductor package with low and high-speed signal paths
PCT/US2006/002131 WO2006088609A2 (en) 2005-02-11 2006-01-19 Semiconductor package with low and high-speed signal paths

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012178468A Division JP2012248877A (ja) 2005-02-11 2012-08-10 低速および高速信号経路を有する半導体パッケージ

Publications (2)

Publication Number Publication Date
JP2008530798A true JP2008530798A (ja) 2008-08-07
JP2008530798A5 JP2008530798A5 (https=) 2009-03-26

Family

ID=36149054

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2007555108A Pending JP2008530798A (ja) 2005-02-11 2006-01-19 低速および高速信号経路を有する半導体パッケージ
JP2012178468A Pending JP2012248877A (ja) 2005-02-11 2012-08-10 低速および高速信号経路を有する半導体パッケージ

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2012178468A Pending JP2012248877A (ja) 2005-02-11 2012-08-10 低速および高速信号経路を有する半導体パッケージ

Country Status (5)

Country Link
US (2) US7705445B2 (https=)
EP (1) EP1851800A2 (https=)
JP (2) JP2008530798A (https=)
TW (1) TW200633083A (https=)
WO (1) WO2006088609A2 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7868440B2 (en) 2006-08-25 2011-01-11 Micron Technology, Inc. Packaged microdevices and methods for manufacturing packaged microdevices
DE102007034704A1 (de) * 2007-07-18 2009-01-22 Karl Storz Gmbh & Co. Kg Bildaufnehmermodul
US20090159709A1 (en) 2007-12-24 2009-06-25 Dynamics Inc. Advanced dynamic credit cards

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11121477A (ja) * 1997-10-21 1999-04-30 Toshiba Corp 半導体装置およびその製造方法

Family Cites Families (21)

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Publication number Priority date Publication date Assignee Title
US3893072A (en) 1973-08-03 1975-07-01 Int Data Sciences Inc Error correction system
US3980993A (en) 1974-10-17 1976-09-14 Burroughs Corporation High-speed/low-speed interface for data processing systems
CA1246755A (en) * 1985-03-30 1988-12-13 Akira Miyauchi Semiconductor device
EP0503545B1 (en) 1991-03-08 1997-06-11 Matsushita Electric Industrial Co., Ltd. Data transfer device
US5854534A (en) * 1992-08-05 1998-12-29 Fujitsu Limited Controlled impedence interposer substrate
JPH08153826A (ja) * 1994-11-30 1996-06-11 Hitachi Ltd 半導体集積回路装置
JP2891665B2 (ja) 1996-03-22 1999-05-17 株式会社日立製作所 半導体集積回路装置およびその製造方法
US6121676A (en) * 1996-12-13 2000-09-19 Tessera, Inc. Stacked microelectronic assembly and method therefor
JP3462026B2 (ja) 1997-01-10 2003-11-05 岩手東芝エレクトロニクス株式会社 半導体装置の製造方法
US6376904B1 (en) * 1999-12-23 2002-04-23 Rambus Inc. Redistributed bond pads in stacked integrated circuit die package
JP2002076250A (ja) 2000-08-29 2002-03-15 Nec Corp 半導体装置
US6624005B1 (en) * 2000-09-06 2003-09-23 Amkor Technology, Inc. Semiconductor memory cards and method of making same
US20030214802A1 (en) 2001-06-15 2003-11-20 Fjelstad Joseph C. Signal transmission structure with an air dielectric
KR20030029743A (ko) 2001-10-10 2003-04-16 삼성전자주식회사 플랙서블한 이중 배선기판을 이용한 적층 패키지
JP2003158353A (ja) * 2001-11-26 2003-05-30 Ngk Spark Plug Co Ltd 配線基板
US6933610B2 (en) 2002-02-20 2005-08-23 Silicon Pipe, Inc. Method of bonding a semiconductor die without an ESD circuit and a separate ESD circuit to an external lead, and a semiconductor device made thereby
US7307293B2 (en) * 2002-04-29 2007-12-11 Silicon Pipe, Inc. Direct-connect integrated circuit signaling system for bypassing intra-substrate printed circuit signal paths
US20040094328A1 (en) 2002-11-16 2004-05-20 Fjelstad Joseph C. Cabled signaling system and components thereof
JP4388284B2 (ja) * 2003-01-31 2009-12-24 アイ電子株式会社 高周波回路用パッケージ及びその実装構造
US6995465B2 (en) * 2003-06-04 2006-02-07 Intel Corporation Silicon building block architecture with flex tape
US7271461B2 (en) * 2004-02-27 2007-09-18 Banpil Photonics Stackable optoelectronics chip-to-chip interconnects and method of manufacturing

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11121477A (ja) * 1997-10-21 1999-04-30 Toshiba Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
WO2006088609A2 (en) 2006-08-24
US20060180902A1 (en) 2006-08-17
US20080150123A1 (en) 2008-06-26
JP2012248877A (ja) 2012-12-13
WO2006088609A3 (en) 2007-02-01
TW200633083A (en) 2006-09-16
US7705445B2 (en) 2010-04-27
EP1851800A2 (en) 2007-11-07

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