JP2008529283A - 誘電体の表面に埋め込まれた金属トレースを有する相互接続要素を作る構成および方法 - Google Patents

誘電体の表面に埋め込まれた金属トレースを有する相互接続要素を作る構成および方法 Download PDF

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Publication number
JP2008529283A
JP2008529283A JP2007552389A JP2007552389A JP2008529283A JP 2008529283 A JP2008529283 A JP 2008529283A JP 2007552389 A JP2007552389 A JP 2007552389A JP 2007552389 A JP2007552389 A JP 2007552389A JP 2008529283 A JP2008529283 A JP 2008529283A
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Japan
Prior art keywords
interconnect
metal
layer
metal interconnect
major surface
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Pending
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JP2007552389A
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English (en)
Japanese (ja)
Inventor
秀樹 小竹
清志 兵頭
稲太郎 黒澤
幸夫 橋本
篤 吉野
朝雄 飯島
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テセラ・インターコネクト・マテリアルズ,インコーポレイテッド
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Priority claimed from JP2005015970A external-priority patent/JP2006135277A/ja
Application filed by テセラ・インターコネクト・マテリアルズ,インコーポレイテッド filed Critical テセラ・インターコネクト・マテリアルズ,インコーポレイテッド
Publication of JP2008529283A publication Critical patent/JP2008529283A/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0376Flush conductors, i.e. flush with the surface of the printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0379Stacked conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/061Lamination of previously made multilayered subassemblies
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/0733Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1536Temporarily stacked PCBs
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
JP2007552389A 2005-01-24 2006-01-24 誘電体の表面に埋め込まれた金属トレースを有する相互接続要素を作る構成および方法 Pending JP2008529283A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005015970A JP2006135277A (ja) 2004-10-06 2005-01-24 配線基板と、その製造方法
PCT/US2006/002597 WO2006079097A1 (fr) 2005-01-24 2006-01-24 Structure et procede de fabrication d'element d'interconnexion presentant des traces de metaux integrees dans la surface d'un dielectrique

Publications (1)

Publication Number Publication Date
JP2008529283A true JP2008529283A (ja) 2008-07-31

Family

ID=36295509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007552389A Pending JP2008529283A (ja) 2005-01-24 2006-01-24 誘電体の表面に埋め込まれた金属トレースを有する相互接続要素を作る構成および方法

Country Status (2)

Country Link
JP (1) JP2008529283A (fr)
WO (1) WO2006079097A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009278065A (ja) * 2008-05-13 2009-11-26 Kinko Denshi Kofun Yugenkoshi 電気相互接続構造、その製造プロセス及び回路板構造
KR101575172B1 (ko) 2013-06-07 2015-12-07 주하이 어드밴스드 칩 캐리어스 앤드 일렉트로닉 서브스트레이트 솔루션즈 테크놀러지즈 컴퍼니 리미티드 칩과 기판 사이에서의 신규한 종결 및 결합
JP2016207959A (ja) * 2015-04-28 2016-12-08 新光電気工業株式会社 配線基板及び配線基板の製造方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02159789A (ja) * 1988-12-14 1990-06-19 Meiko Denshi Kogyo Kk プリント配線板の製造方法
JPH1084186A (ja) * 1996-09-06 1998-03-31 Matsushita Electric Ind Co Ltd 配線基板の製造方法並びに配線基板
JP2002252250A (ja) * 2001-01-08 2002-09-06 Fujitsu Ltd 微細ピッチ小径ビアを有する基板の製造方法
JP2002290048A (ja) * 2001-03-23 2002-10-04 Fujitsu Ltd 多層回路基板におけるビア形成方法
JP2003218169A (ja) * 2002-01-21 2003-07-31 Hitachi Cable Ltd Tabテープ及びその製造方法
JP2003298212A (ja) * 2002-04-03 2003-10-17 Matsushita Electric Ind Co Ltd プリント配線板とその製造方法
JP2004007006A (ja) * 2003-09-16 2004-01-08 Kyocera Corp 多層配線基板
JP2004253432A (ja) * 2003-02-18 2004-09-09 Matsushita Electric Ind Co Ltd プリント配線基板の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3606677A (en) * 1967-12-26 1971-09-21 Rca Corp Multilayer circuit board techniques
US4631100A (en) * 1983-01-10 1986-12-23 Pellegrino Peter P Method and apparatus for mass producing printed circuit boards
DE69218344T2 (de) * 1991-11-29 1997-10-23 Hitachi Chemical Co., Ltd., Tokio/Tokyo Herstellungsverfahren für eine gedruckte Schaltung
US6703565B1 (en) * 1996-09-06 2004-03-09 Matsushita Electric Industrial Co., Ltd. Printed wiring board
US5878487A (en) * 1996-09-19 1999-03-09 Ford Motor Company Method of supporting an electrical circuit on an electrically insulative base substrate
JP2000101245A (ja) * 1998-09-24 2000-04-07 Ngk Spark Plug Co Ltd 積層樹脂配線基板及びその製造方法
JP3872648B2 (ja) * 1999-05-12 2007-01-24 株式会社ルネサステクノロジ 半導体装置およびその製造方法並びに電子装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02159789A (ja) * 1988-12-14 1990-06-19 Meiko Denshi Kogyo Kk プリント配線板の製造方法
JPH1084186A (ja) * 1996-09-06 1998-03-31 Matsushita Electric Ind Co Ltd 配線基板の製造方法並びに配線基板
JP2002252250A (ja) * 2001-01-08 2002-09-06 Fujitsu Ltd 微細ピッチ小径ビアを有する基板の製造方法
JP2002290048A (ja) * 2001-03-23 2002-10-04 Fujitsu Ltd 多層回路基板におけるビア形成方法
JP2003218169A (ja) * 2002-01-21 2003-07-31 Hitachi Cable Ltd Tabテープ及びその製造方法
JP2003298212A (ja) * 2002-04-03 2003-10-17 Matsushita Electric Ind Co Ltd プリント配線板とその製造方法
JP2004253432A (ja) * 2003-02-18 2004-09-09 Matsushita Electric Ind Co Ltd プリント配線基板の製造方法
JP2004007006A (ja) * 2003-09-16 2004-01-08 Kyocera Corp 多層配線基板

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009278065A (ja) * 2008-05-13 2009-11-26 Kinko Denshi Kofun Yugenkoshi 電気相互接続構造、その製造プロセス及び回路板構造
US8288663B2 (en) 2008-05-13 2012-10-16 Unimicron Technology Corp. Electrical interconnect structure and process thereof and circuit board structure
KR101575172B1 (ko) 2013-06-07 2015-12-07 주하이 어드밴스드 칩 캐리어스 앤드 일렉트로닉 서브스트레이트 솔루션즈 테크놀러지즈 컴퍼니 리미티드 칩과 기판 사이에서의 신규한 종결 및 결합
JP2016207959A (ja) * 2015-04-28 2016-12-08 新光電気工業株式会社 配線基板及び配線基板の製造方法

Also Published As

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WO2006079097A1 (fr) 2006-07-27

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