JP2008502150A - 改善された二重ダマシン集積構造およびその製造方法 - Google Patents

改善された二重ダマシン集積構造およびその製造方法 Download PDF

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Publication number
JP2008502150A
JP2008502150A JP2007515542A JP2007515542A JP2008502150A JP 2008502150 A JP2008502150 A JP 2008502150A JP 2007515542 A JP2007515542 A JP 2007515542A JP 2007515542 A JP2007515542 A JP 2007515542A JP 2008502150 A JP2008502150 A JP 2008502150A
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layer
gas cluster
hard mask
ion beam
cluster ion
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Japanese (ja)
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JP2008502150A5 (https=
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ゲフケン，ロバート，エム．
ハウタラ，ジョン，ジェイ．
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エピオン コーポレーション
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/072—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/46—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/06—Sources
    • H01J2237/08—Ion sources
    • H01J2237/0812—Ionized cluster beam [ICB] sources
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/10—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H10P70/12—Cleaning before device manufacture, i.e. Begin-Of-Line process by dry cleaning only

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
JP2007515542A 2004-06-03 2005-06-02 改善された二重ダマシン集積構造およびその製造方法 Withdrawn JP2008502150A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US57643904P 2004-06-03 2004-06-03
PCT/US2005/019316 WO2005122224A2 (en) 2004-06-03 2005-06-02 Improved dual damascene integration structures and method of forming improved dual damascene integration structures

Publications (2)

Publication Number Publication Date
JP2008502150A true JP2008502150A (ja) 2008-01-24
JP2008502150A5 JP2008502150A5 (https=) 2008-09-11

Family

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JP2007515542A Withdrawn JP2008502150A (ja) 2004-06-03 2005-06-02 改善された二重ダマシン集積構造およびその製造方法

Country Status (4)

Country Link
US (3) US7759251B2 (https=)
EP (1) EP1759407A2 (https=)
JP (1) JP2008502150A (https=)
WO (1) WO2005122224A2 (https=)

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JP2010003955A (ja) * 2008-06-23 2010-01-07 Japan Aviation Electronics Industry Ltd 固体表面の加工装置
JP2010157379A (ja) * 2008-12-26 2010-07-15 Japan Aviation Electronics Industry Ltd 固体表面の封孔処理方法
WO2010147141A1 (ja) * 2009-06-16 2010-12-23 東京エレクトロン株式会社 成膜方法、前処理装置及び処理システム
JP2011171736A (ja) * 2010-02-17 2011-09-01 Renesas Electronics Corp 半導体装置及びその製造方法
JP2012204591A (ja) * 2011-03-25 2012-10-22 Toshiba Corp 膜形成方法および不揮発性記憶装置
JP2013055336A (ja) * 2011-09-01 2013-03-21 Tel Epion Inc 複合材料の目標エッチングプロセス特性を達成するためのガスクラスタイオンビームエッチングプロセス
WO2015087689A1 (ja) * 2013-12-13 2015-06-18 富士フイルム株式会社 パターン形成方法、電子デバイスの製造方法

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US20070218698A1 (en) * 2006-03-16 2007-09-20 Tokyo Electron Limited Plasma etching method, plasma etching apparatus, and computer-readable storage medium
US7816253B2 (en) * 2006-03-23 2010-10-19 International Business Machines Corporation Surface treatment of inter-layer dielectric
US7838428B2 (en) * 2006-03-23 2010-11-23 International Business Machines Corporation Method of repairing process induced dielectric damage by the use of GCIB surface treatment using gas clusters of organic molecular species
US7781154B2 (en) * 2006-03-28 2010-08-24 Applied Materials, Inc. Method of forming damascene structure
US8034722B2 (en) * 2006-04-07 2011-10-11 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming dual damascene semiconductor device
US20080124924A1 (en) * 2006-07-18 2008-05-29 Applied Materials, Inc. Scheme for copper filling in vias and trenches
US7618889B2 (en) * 2006-07-18 2009-11-17 Applied Materials, Inc. Dual damascene fabrication with low k materials
US7884026B2 (en) * 2006-07-20 2011-02-08 United Microelectronics Corp. Method of fabricating dual damascene structure
US7815815B2 (en) 2006-08-01 2010-10-19 Sony Corporation Method and apparatus for processing the peripheral and edge portions of a wafer after performance of a surface treatment thereon
US7329956B1 (en) * 2006-09-12 2008-02-12 Taiwan Semiconductor Manufacturing Company, Ltd. Dual damascene cleaning method
US20080090402A1 (en) * 2006-09-29 2008-04-17 Griselda Bonilla Densifying surface of porous dielectric layer using gas cluster ion beam
US7622403B2 (en) * 2006-12-19 2009-11-24 Chartered Semiconductor Manufacturing Ltd. Semiconductor processing system with ultra low-K dielectric
US8618663B2 (en) * 2007-09-20 2013-12-31 International Business Machines Corporation Patternable dielectric film structure with improved lithography and method of fabricating same
US8084862B2 (en) * 2007-09-20 2011-12-27 International Business Machines Corporation Interconnect structures with patternable low-k dielectrics and method of fabricating same
US7709370B2 (en) 2007-09-20 2010-05-04 International Business Machines Corporation Spin-on antireflective coating for integration of patternable dielectric materials and interconnect structures
JP2009094378A (ja) * 2007-10-11 2009-04-30 Panasonic Corp 半導体装置及びその製造方法
US7981308B2 (en) 2007-12-31 2011-07-19 Robert Bosch Gmbh Method of etching a device using a hard mask and etch stop layer
US8202435B2 (en) * 2008-08-01 2012-06-19 Tel Epion Inc. Method for selectively etching areas of a substrate using a gas cluster ion beam
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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010003955A (ja) * 2008-06-23 2010-01-07 Japan Aviation Electronics Industry Ltd 固体表面の加工装置
JP2010157379A (ja) * 2008-12-26 2010-07-15 Japan Aviation Electronics Industry Ltd 固体表面の封孔処理方法
WO2010147141A1 (ja) * 2009-06-16 2010-12-23 東京エレクトロン株式会社 成膜方法、前処理装置及び処理システム
JP2011003569A (ja) * 2009-06-16 2011-01-06 Tohoku Univ 成膜方法、前処理装置及び処理システム
CN102460653A (zh) * 2009-06-16 2012-05-16 东京毅力科创株式会社 成膜方法、前处理装置和处理系统
US8865590B2 (en) 2009-06-16 2014-10-21 Tokyo Electron Limited Film forming method, pretreatment device, and processing system
JP2011171736A (ja) * 2010-02-17 2011-09-01 Renesas Electronics Corp 半導体装置及びその製造方法
JP2012204591A (ja) * 2011-03-25 2012-10-22 Toshiba Corp 膜形成方法および不揮発性記憶装置
JP2013055336A (ja) * 2011-09-01 2013-03-21 Tel Epion Inc 複合材料の目標エッチングプロセス特性を達成するためのガスクラスタイオンビームエッチングプロセス
WO2015087689A1 (ja) * 2013-12-13 2015-06-18 富士フイルム株式会社 パターン形成方法、電子デバイスの製造方法
JP2015132811A (ja) * 2013-12-13 2015-07-23 富士フイルム株式会社 パターン形成方法、電子デバイスの製造方法

Also Published As

Publication number Publication date
US20050272265A1 (en) 2005-12-08
WO2005122224A2 (en) 2005-12-22
EP1759407A2 (en) 2007-03-07
US20090130861A1 (en) 2009-05-21
US20050272237A1 (en) 2005-12-08
WO2005122224A3 (en) 2006-11-09
US7759251B2 (en) 2010-07-20

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