JP2008305837A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2008305837A JP2008305837A JP2007149167A JP2007149167A JP2008305837A JP 2008305837 A JP2008305837 A JP 2008305837A JP 2007149167 A JP2007149167 A JP 2007149167A JP 2007149167 A JP2007149167 A JP 2007149167A JP 2008305837 A JP2008305837 A JP 2008305837A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823871—Complementary field-effect transistors, e.g. CMOS interconnection or wiring or contact manufacturing related aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- General Engineering & Computer Science (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
【解決手段】半導体基板12には、N型領域14とP型領域16の境界線を斜めに横切るように、ゲート電極24が配置されている。これにより、N型領域14とP型領域16の境界線とゲート電極24が交差する領域幅(実効ゲート幅)が、ゲート電極24のゲート幅よりも大きくなる。したがって、ゲート電極24のゲート幅を物理的に大きくしなくても、N型領域14とP型領域16の境界線上のゲート電極24で電流が流れにくくなる抵抗異常の発生を抑制できる。また、抵抗異常の発生を抑制するために、ゲート電極24のゲート幅を大きくする必要性が低減でき、N型領域14とP型領域16の面積が大きくなることを抑え、半導体装置10全体として大型化することを低減できる。
【選択図】図1
Description
12 半導体基板
14 N型領域(Nチャネル型トランジスタ形成領域)
16 P型領域(Pチャネル型トランジスタ形成領域)
18 ソース拡散層
20 ドレイン拡散層
22 チャンネル領域
24 ゲート電極
28 ポリシリコン(導電層)
30 金属シリサイド層
40 MOS型半導体装置(半導体装置)
42 N型MOSトランジスタ形成領域(N型領域)
44 P型MOSトランジスタ形成領域(P型領域)
50 ゲート電極
Claims (6)
- 半導体基板に形成されたNチャネル型トランジスタ形成領域と、
前記半導体基板に形成され、前記Nチャネル型トランジスタ形成領域に隣り合って配置されたPチャネル型トランジスタ形成領域と、
前記Nチャネル型トランジスタ形成領域と前記Pチャネル型トランジスタ形成領域に跨って延在するゲート電極と、
を備え、
前記ゲート電極は、前記Nチャネル型トランジスタ形成領域と前記Pチャネル型トランジスタ形成領域の境界線を斜めに横切るように配置されていることを特徴とする半導体装置。 - 前記ゲート電極は、前記Pチャネル型トランジスタ形成領域と前記Nチャネル型トランジスタ形成領域の境界線に対して45度の角度をなして横切ることを特徴とする請求項1記載の半導体装置。
- 前記ゲート電極は、導電層上に金属シリサイド層を有する構成であることを特徴とする請求項1または請求項2記載の半導体装置。
- 前記Nチャネル型トランジスタ形成領域内のゲート電極の導電層はN型導電層であり、前記Pチャネル型トランジスタ形成領域内のゲート電極の導電層にはP型導電層であることを特徴とする請求項3記載の半導体装置。
- 前記導電層はシリコン層からなることを特徴とする請求項3または請求項4記載の半導体装置。
- 前記Nチャネル型トランジスタ形成領域は複数の第1のアクティブ領域を有し、前記Pチャネル型トランジスタ形成領域は複数の第2のアクティブ領域を有し、該第1のアクティブ領域のそれぞれと該第2のアクティブ領域のそれぞれは互いにずらして配置されていることを特徴とする請求項1〜5のいずれか1項に記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007149167A JP2008305837A (ja) | 2007-06-05 | 2007-06-05 | 半導体装置 |
US12/149,567 US7667244B2 (en) | 2007-06-05 | 2008-05-05 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007149167A JP2008305837A (ja) | 2007-06-05 | 2007-06-05 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2008305837A true JP2008305837A (ja) | 2008-12-18 |
Family
ID=40095061
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007149167A Pending JP2008305837A (ja) | 2007-06-05 | 2007-06-05 | 半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7667244B2 (ja) |
JP (1) | JP2008305837A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8633502B2 (en) | 2009-12-17 | 2014-01-21 | Suzuden Company, Limited | Lighting apparatus encapsulated with synthetic resin material having translucent illumination section and also having heat sink section mixed with thermal conductive material |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11538814B2 (en) * | 2021-01-29 | 2022-12-27 | Samsung Electronics Co., Ltd. | Static random access memory of 3D stacked devices |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS592363A (ja) * | 1982-06-09 | 1984-01-07 | テキサス・インスツルメンツ・インコ−ポレイテツド | 相補型絶縁ゲート電界効果型装置 |
JPH08288398A (ja) * | 1995-04-11 | 1996-11-01 | Oki Electric Ind Co Ltd | Mos型半導体装置及びその配列パターン |
JP2000243941A (ja) * | 1999-02-24 | 2000-09-08 | Sanyo Electric Co Ltd | 半導体装置 |
JP2001358319A (ja) * | 2000-06-12 | 2001-12-26 | Mitsubishi Electric Corp | 交差ゲート構造を持つ半導体装置およびその製造方法 |
JP2004336058A (ja) * | 2003-05-08 | 2004-11-25 | Au Optronics Corp | Cmosインバータ |
JP2008503878A (ja) * | 2004-06-17 | 2008-02-07 | テキサス インスツルメンツ インコーポレイテッド | スタガ配置のメモリ・セル・アレイ |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100242722B1 (ko) * | 1996-08-05 | 2000-02-01 | 윤종용 | 개선된 씨모오스 스태틱램 셀 구조 및 그 셀의 제조방법 |
JP3737914B2 (ja) | 1999-09-02 | 2006-01-25 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
-
2007
- 2007-06-05 JP JP2007149167A patent/JP2008305837A/ja active Pending
-
2008
- 2008-05-05 US US12/149,567 patent/US7667244B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS592363A (ja) * | 1982-06-09 | 1984-01-07 | テキサス・インスツルメンツ・インコ−ポレイテツド | 相補型絶縁ゲート電界効果型装置 |
JPH08288398A (ja) * | 1995-04-11 | 1996-11-01 | Oki Electric Ind Co Ltd | Mos型半導体装置及びその配列パターン |
JP2000243941A (ja) * | 1999-02-24 | 2000-09-08 | Sanyo Electric Co Ltd | 半導体装置 |
JP2001358319A (ja) * | 2000-06-12 | 2001-12-26 | Mitsubishi Electric Corp | 交差ゲート構造を持つ半導体装置およびその製造方法 |
JP2004336058A (ja) * | 2003-05-08 | 2004-11-25 | Au Optronics Corp | Cmosインバータ |
JP2008503878A (ja) * | 2004-06-17 | 2008-02-07 | テキサス インスツルメンツ インコーポレイテッド | スタガ配置のメモリ・セル・アレイ |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8633502B2 (en) | 2009-12-17 | 2014-01-21 | Suzuden Company, Limited | Lighting apparatus encapsulated with synthetic resin material having translucent illumination section and also having heat sink section mixed with thermal conductive material |
Also Published As
Publication number | Publication date |
---|---|
US7667244B2 (en) | 2010-02-23 |
US20080303100A1 (en) | 2008-12-11 |
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