JP2008113022A - Substrate with through-hole formed and multilayer printed wiring board - Google Patents

Substrate with through-hole formed and multilayer printed wiring board Download PDF

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JP2008113022A
JP2008113022A JP2007324769A JP2007324769A JP2008113022A JP 2008113022 A JP2008113022 A JP 2008113022A JP 2007324769 A JP2007324769 A JP 2007324769A JP 2007324769 A JP2007324769 A JP 2007324769A JP 2008113022 A JP2008113022 A JP 2008113022A
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hole
wiring board
substrate
printed wiring
copper
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JP4722904B2 (en
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Hiroshi Segawa
博史 瀬川
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Ibiden Co Ltd
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Ibiden Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To propose a technology for directly punching a copper clad laminate with a laser. <P>SOLUTION: A copper foil 132 with a thickness of 12 μm that is applied on both surfaces of a double-sided copper clad laminate 130A is etched with a sulfuric acid/hydrogen peroxide aqueous solution to make the thickness to 5 μm (step (B)). This double-sided copper clad laminate 130A is provided with a hole 116 with a diameter of 150 μm by using a carbon dioxide laser (step (C)). Electroless copper plating is performed in the hole 116 to form a plated through hole 136 (step (D)). <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、レーザを用いるスルーホールの形成基板、多層プリント配線板に関する。 The present invention relates to a substrate for forming a through hole using a laser and a multilayer printed wiring board.

近年、高密度多層化の要求により、ビルドアップ多層プリント配線板が注目されている。この多層配線板は、コア基板上に導体回路と層間樹脂層が交互に積層された多層配線板であり、各層の導体回路がバイアホールで接続されている。コア基板に設けられるスルーホールは、微細化が要求されており、直径100μm未満のスルーホールは、ドリルによる削孔は極めて困難であり、銅張積層板にレーザ加工により削孔する。 In recent years, a build-up multilayer printed wiring board has attracted attention due to the demand for higher density multilayers. This multilayer wiring board is a multilayer wiring board in which conductor circuits and interlayer resin layers are alternately laminated on a core substrate, and the conductor circuits of each layer are connected by via holes. The through hole provided in the core substrate is required to be miniaturized. A through hole having a diameter of less than 100 μm is extremely difficult to drill with a drill, and is drilled into a copper-clad laminate by laser processing.

使用されるレーザ光としては、炭酸ガスレーザがコストも安く、工業生産としては最適である。しかしながら、炭酸レーザ光では、銅箔表面で反射されてしまい、レーザ加工により直接銅張積層板に貫通孔を形成することは不可能というのが技術的な常識であった。このため、銅張積層板の銅箔表面を黒化処理(酸化処理)してレーザ光を照射する技術が特開昭61−99596号として提案されている。
特開昭61−99596号公報
As a laser beam to be used, a carbon dioxide laser is inexpensive and is optimal for industrial production. However, it was a common technical knowledge that carbonic acid laser light is reflected on the surface of the copper foil and it is impossible to directly form a through-hole in the copper-clad laminate by laser processing. For this reason, Japanese Patent Application Laid-Open No. 61-99596 has proposed a technique in which the copper foil surface of the copper-clad laminate is blackened (oxidized) and irradiated with laser light.
JP-A-61-99596

しかし、このような技術においては、最初に黒化処理が必要であり、工程が長くなるという問題がある。本発明者らは鋭意研究した結果、銅箔を薄くすることにより、表面での反射にもかかわらず、銅箔に開口を形成できるという意外な事実を発見した。 However, in such a technique, there is a problem that the blackening process is required first and the process becomes long. As a result of intensive studies, the present inventors have found an unexpected fact that an opening can be formed in the copper foil despite the reflection at the surface by making the copper foil thinner.

本発明は、上述した課題を解決するためになされたものであり、その目的とするところは、銅張積層板を直接レーザで穿孔できる技術とともに、このような方法で得られたスルーホールの形成基板および多層プリント配線板を提案することにある。 The present invention has been made in order to solve the above-described problems. The object of the present invention is to form a through hole obtained by such a method together with a technique capable of directly drilling a copper-clad laminate with a laser. It is to propose a substrate and a multilayer printed wiring board.

本発明のスルーホールの形成基板は、両面銅張積層板に貫通孔が設けられ、その内壁を導電化してスルーホールが形成された基板において、前記貫通孔にはテーパが形成されてなることを技術的特徴とする。 The substrate for forming a through hole according to the present invention is a substrate in which a through hole is provided in a double-sided copper-clad laminate, and the inner wall is made conductive to form a through hole. Technical features.

また、本発明の多層プリント配線板は、両面銅張積層板に貫通孔が設けられ、その内壁を導電化してスルーホールが形成された基板の少なくとも一方の面に層間樹脂絶縁層および導体回路が形成されてなる多層プリント配線板において、前記貫通孔にはテーパが形成されてなることを技術的特徴とする。 In the multilayer printed wiring board of the present invention, the double-sided copper-clad laminate is provided with a through-hole, and the interlayer resin insulation layer and the conductor circuit are provided on at least one surface of the substrate on which the inner wall is made conductive to form a through hole. The multilayer printed wiring board thus formed is characterized in that the through hole is tapered.

本発明者らは鋭意研究した結果、炭酸ガスレーザ光により12μm以上の銅箔に穿孔できない理由は、表面での反射ではなく、銅箔が厚くなることにより熱伝導しやすくなり、レーザ光のエネルギーが熱となって伝搬してしまうからであることを知見した。さらに、銅箔の厚さを12μm未満、望ましくは1〜10μm程度とすることにより、レーザ光のエネルギーが熱となって伝搬することを抑制し、レーザ光による穿孔を実現した。本発明で使用される銅張積層板は、ガラス布エポキシ樹脂、ガラス布ビスマレイミド−トリアジン樹脂、ガラス布フッ素樹脂などのプリプレグに銅箔を貼付した銅張積層板を使用することができる。 As a result of diligent research, the inventors of the present invention cannot pierce a copper foil of 12 μm or more with carbon dioxide laser light, but are not reflected on the surface, but heat conduction is facilitated by increasing the thickness of the copper foil, and the energy of the laser light is reduced. It was found that it was because it propagated as heat. Furthermore, by setting the thickness of the copper foil to less than 12 μm, desirably about 1 to 10 μm, the laser beam energy was prevented from propagating as heat, and the drilling by the laser beam was realized. The copper clad laminate used in the present invention may be a copper clad laminate obtained by attaching a copper foil to a prepreg such as a glass cloth epoxy resin, a glass cloth bismaleimide-triazine resin, or a glass cloth fluororesin.

銅箔の厚さは、1〜10μmが望ましい。10μm以下ならばレーザ光で穿孔しやすく、他方、1μm未満ではふくれなどが生じ易いからである。銅箔の厚さの調整は、エッチングにより行う。具体的には、硫酸−過酸化水素水溶液、過硫酸アンモニウム、塩化第二銅、塩化第二鉄の水溶液を用いた化学エッチング、イオンビームエッチングなどの物理エッチングで行う。銅張積層板の厚さは、0.5〜1.0mmが望ましい。厚すぎると穿孔できず、薄すぎると反りなどが発生しやすいからである。本発明で使用される炭酸ガスレーザは、20〜40mJ、10-4〜10-8 秒の短パルスレーザであることが望ましい。ショット数は、5〜100ショットである。 As for the thickness of copper foil, 1-10 micrometers is desirable. If it is 10 μm or less, it is easy to perforate with laser light, while if it is less than 1 μm, blistering or the like is likely to occur. The thickness of the copper foil is adjusted by etching. Specifically, physical etching such as chemical etching or ion beam etching using an aqueous solution of sulfuric acid-hydrogen peroxide, ammonium persulfate, cupric chloride, or ferric chloride is performed. The thickness of the copper clad laminate is preferably 0.5 to 1.0 mm. This is because if the thickness is too thick, drilling cannot be performed, and if the thickness is too thin, warping is likely to occur. The carbon dioxide laser used in the present invention is preferably a short pulse laser of 20 to 40 mJ, 10 −4 to 10 −8 seconds. The number of shots is 5 to 100 shots.

形成される貫通孔の直径は、50〜150μmが望ましい。50μm未満では、めっき等により壁面を導電化できず、また150μmを越えるとドリル加工の方が有利だからである。貫通孔の直径が、100μmを越えると貫通孔にテーパが生じる。レーザ光の入射側に貫通孔の直径が大きくなるようなテーパが生じる。また、レーザ光を表面および裏面から照射すると、断面がつつみ形の貫通孔が生じる。 As for the diameter of the through-hole formed, 50-150 micrometers is desirable. If it is less than 50 μm, the wall surface cannot be made conductive by plating or the like, and if it exceeds 150 μm, drilling is more advantageous. When the diameter of the through hole exceeds 100 μm, the through hole is tapered. A taper that increases the diameter of the through-hole is formed on the laser beam incident side. Further, when laser light is irradiated from the front surface and the back surface, through-holes having a cross section are formed.

この貫通孔を導電化する。導電化の方法としては、電気めっき、無電解めっき、スパッタ、蒸着、導電性ペーストの充填などの方法による。導電性ペーストを充填する場合には、貫通孔にはテーパが形成されていることが望ましい。ペーストを充填しやすいからである。電気めっき、無電解めっき、スパッタ、蒸着などにより、内壁面を金属化することによりスルーホールを形成した場合にも、このスルーホールに充填材を充填することができる。 This through hole is made conductive. As a conductive method, electroplating, electroless plating, sputtering, vapor deposition, conductive paste filling, or the like is used. When the conductive paste is filled, it is desirable that the through hole is tapered. This is because it is easy to fill the paste. Even when a through hole is formed by metallizing the inner wall surface by electroplating, electroless plating, sputtering, vapor deposition, or the like, the through hole can be filled with a filler.

また、金属化されたスルーホール内壁は、粗化されていてもよい。スルーホール内壁を金属化する場合は、銅箔および金属化層(たとえば無電解めっき層)の厚さは、10〜30μmであることが望ましい。充填材としては、ビスフェノールF型エポキシ樹脂およびシリカ、アルミナ等の無機粒子からなるもの、また、金属粒子および樹脂からなるものなど各種のものを使用できる。 Moreover, the metalized through-hole inner wall may be roughened. When the inner wall of the through hole is metallized, the thickness of the copper foil and the metallized layer (for example, electroless plating layer) is preferably 10 to 30 μm. As the filler, various materials such as those composed of bisphenol F-type epoxy resin and inorganic particles such as silica and alumina, and those composed of metal particles and resin can be used.

このようにして形成されたスルーホール形成基板に導体回路を設ける。導体回路はエッチング処理により形成する。導体回路表面は、密着性改善のため粗化処理することが望ましい。ついで絶縁樹脂からなる層間樹脂絶縁層を設ける。 A conductor circuit is provided on the through hole forming substrate thus formed. The conductor circuit is formed by etching. The surface of the conductor circuit is preferably roughened to improve adhesion. Next, an interlayer resin insulating layer made of an insulating resin is provided.

前記絶縁樹脂は、熱硬化性樹脂、熱可塑性樹脂、あるいはこれらの複合樹脂が用いられる。熱硬化性樹脂としては、エポキシ樹脂、フェノール樹脂、ポリイミド樹脂等が用いられる。また熱可塑性樹脂としては、熱可塑性樹脂としては、ポリエーテルスルフォン(PES)、ポリスルフォン(PSF)、ポリフェニレンスルフォン(PPS)、ポリフェニレンサルファイド(PPES)、ポリフェニルエーテル(PPE)、ポリエーテルイミド(PI)、フッ素樹脂などを使用できる。 As the insulating resin, a thermosetting resin, a thermoplastic resin, or a composite resin thereof is used. As the thermosetting resin, an epoxy resin, a phenol resin, a polyimide resin, or the like is used. Moreover, as a thermoplastic resin, as a thermoplastic resin, polyether sulfone (PES), polysulfone (PSF), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenyl ether (PPE), polyetherimide (PI) ), Fluororesin and the like can be used.

本発明では、層間樹脂絶縁層は、無電解めっき用接着剤でもよい。例えば、酸や酸化剤に難溶性の耐熱性樹脂中に酸、酸化剤によって溶解する粒子を含ませておき、この粒子を酸や酸化剤で溶解することで、絶縁樹脂層の表面を粗化することができる。かかる耐熱性樹脂粒子としては、アミノ樹脂(メラミン樹脂、尿素樹脂、グアナミン樹脂等)、エポキシ樹脂(ビスフェノール型エポキシ樹脂をアミン系硬化剤で硬化させたものが最適)、ビスマレイミド−トリアジン樹脂等からなる耐熱性樹脂粒子を用いることができる。 In the present invention, the interlayer resin insulating layer may be an electroless plating adhesive. For example, a particle that dissolves with an acid or an oxidizing agent is included in a heat-resistant resin that is hardly soluble in an acid or an oxidizing agent, and the surface of the insulating resin layer is roughened by dissolving the particles with an acid or an oxidizing agent can do. Examples of such heat-resistant resin particles include amino resins (melamine resins, urea resins, guanamine resins, etc.), epoxy resins (bisphenol-type epoxy resins cured with an amine curing agent), bismaleimide-triazine resins, etc. Can be used.

また、かかる無電解めっき用接着剤には、特に、硬化処理された耐熱性樹脂粒子、無機粒子や繊維質フィラー等を、必要により含ませることができる。かかる耐熱性樹脂粒子には、(1) 平均粒径が10μm以下の耐熱性樹脂粉末、(2) 平均粒径が2μm以下の耐熱性樹脂粉末を凝集させた凝集粒子、(3) 平均粒径が2〜10μmの耐熱性樹脂粉末と平均粒径が2μm未満の耐熱性樹脂粉末との混合物、(4) 平均粒径が2〜10μmの耐熱性樹脂粉末の表面に、平均粒径が2μm以下の耐熱性樹脂粉末及び無機粉末の少なくとも1種を付着させた疑似粒子、(5) 平均粒子径が0.8 を超え2.0 μm未満の耐熱性樹脂粉末と平均粒子径が0.1 〜0.8 μmの耐熱性樹脂粉末との混合物、及び(6) 平均粒径が0.1 〜1.0 μmの耐熱性樹脂粉末からなる群より選ばれる少なくとも1種の粒子を用いるのが望ましい。これらの粒子は、より複雑な粗化面を形成するからである。 In addition, such an electroless plating adhesive may contain, in particular, cured heat-resistant resin particles, inorganic particles, fibrous fillers, and the like as necessary. Such heat-resistant resin particles include (1) heat-resistant resin powder having an average particle diameter of 10 μm or less, (2) agglomerated particles obtained by aggregating heat-resistant resin powder having an average particle diameter of 2 μm or less, and (3) average particle diameter. Is a mixture of a heat-resistant resin powder having an average particle diameter of less than 2 μm and (4) an average particle diameter of 2 μm or less on the surface of the heat-resistant resin powder having an average particle diameter of 2-10 μm (5) heat-resistant resin powder having an average particle diameter of more than 0.8 and less than 2.0 μm and heat-resistant resin having an average particle diameter of 0.1 to 0.8 μm It is desirable to use a mixture with powder and (6) at least one particle selected from the group consisting of heat-resistant resin powder having an average particle diameter of 0.1 to 1.0 μm. This is because these particles form a more complicated roughened surface.

このような層間樹脂絶縁層は、レーザ光や露光、現像処理で開口を設けることができる。 Such an interlayer resin insulation layer can be provided with openings by laser light, exposure, or development.

次いで、Pd触媒などの無電解めっき用の触媒を付与し、バイアホール用開口内をめっきしてバイアホールを設け、また、絶縁樹脂層表面に導体回路を設ける。無電解めっき膜を開口内壁、絶縁樹脂層表面全体に形成し、めっきレジストを設けた後、電気めっきして、めっきレジストを除去し、エッチングにより導体回路を形成する。 Next, a catalyst for electroless plating such as a Pd catalyst is applied, the inside of the via hole opening is plated to provide a via hole, and a conductor circuit is provided on the surface of the insulating resin layer. An electroless plating film is formed on the inner wall of the opening and the entire surface of the insulating resin layer, and after providing a plating resist, electroplating is performed to remove the plating resist, and a conductor circuit is formed by etching.

以下、実施例及び比較例に基づき、本発明を説明する。
実施例1
(1)基板130に厚さ12μmの銅箔132が貼付された厚さ0.6mmの両面銅張積層板(松下電工 R5715)130Aを用意した(図1(A)参照)。
(2)この銅箔132を硫酸−過酸化水素水溶液でエッチングして厚さを5μmとした(図1(B)参照)。
(3)この両面銅張積層板130Aに炭酸ガスレーザ(三菱電機 ML605GTL)を用いて、30mJ、52×10-6秒のパルス条件で10ショットにて直径150μm(上径D1:160μm 下径D2:140μmのテーパあり)の孔116を設けた(図1(C))。このように、レーザにて5μmの銅箔132を貫通して基板130に孔を明けることができる。(3)以下の条件で該孔116内に無電解銅めっきを行い、めっきスルーホール136を形成した(図1(D))。
無電解めっき液;
EDTA : 150 g/L
硫酸銅 : 20 g/L
HCHO : 30 mL/L
NaOH : 40 g/L
α、α’−ビピリジル : 80 mg/L
PEG : 0.1 g/L無電解めっき条件;
70℃の液温度で30分
Hereinafter, the present invention will be described based on examples and comparative examples.
Example 1
(1) A double-sided copper clad laminate (Matsushita Electric Works R5715) 130A having a thickness of 0.6 mm in which a copper foil 132 having a thickness of 12 μm was attached to the substrate 130 was prepared (see FIG. 1A).
(2) The copper foil 132 was etched with a sulfuric acid-hydrogen peroxide solution to a thickness of 5 μm (see FIG. 1B).
(3) Carbon dioxide laser (Mitsubishi Electric ML605GTL) is used for this double-sided copper clad laminate 130A, and the diameter is 150 μm (upper diameter D1: 160 μm, lower diameter D2) at 10 shots under a pulse condition of 30 mJ, 52 × 10 −6 seconds. A hole 116 having a taper of 140 μm was provided (FIG. 1C). Thus, a hole can be made in the substrate 130 by penetrating the 5 μm copper foil 132 with a laser. (3) Electroless copper plating was performed in the hole 116 under the following conditions to form a plated through hole 136 (FIG. 1D).
Electroless plating solution;
EDTA: 150 g / L
Copper sulfate: 20 g / L
HCHO: 30 mL / L
NaOH: 40 g / L
α, α'-bipyridyl: 80 mg / L
PEG: 0.1 g / L electroless plating conditions;
30 minutes at a liquid temperature of 70 ° C

実施例2
(1)基板230に厚さ12μm銅箔232が貼付された厚さ0.6mmの両面銅張積層板(松下電工 R5715)230Aを用意した(図2(A))。
(2)この銅箔232を硫酸−過酸化水素水溶液でエッチングして厚さを9μmとした(図2(B)。
(3)この両面銅張積層板230Aに炭酸ガスレーザ(三菱電機 ML605GTL)を用いて、30mJ、52×10-6秒のパルス条件で15ショットにて直径150μm(上径D1:160μm 下径D2:140μmのテーパあり)の孔216を設けた(図2(C))。このように、レーザにて9μmの銅箔132を貫通して基板130に孔を明けることができる。
(4)実施例1と同様にして無電解銅めっきを施してめっきスルーホール236を形成した(図2(C))。
Example 2
(1) A 0.6 mm thick double-sided copper clad laminate (Matsushita Electric Works R5715) 230A in which a 12 μm thick copper foil 232 was attached to a substrate 230 was prepared (FIG. 2A).
(2) The copper foil 232 was etched with a sulfuric acid-hydrogen peroxide solution to a thickness of 9 μm (FIG. 2B).
(3) A carbon dioxide laser (Mitsubishi Electric ML605GTL) is used for this double-sided copper-clad laminate 230A, and a diameter of 150 μm (upper diameter D1: 160 μm, lower diameter D2) at 15 shots under a pulse condition of 30 mJ, 52 × 10 −6 seconds. A hole 216 having a taper of 140 μm was provided (FIG. 2C). Thus, a hole can be made in the substrate 130 by penetrating the 9 μm copper foil 132 with a laser.
(4) In the same manner as in Example 1, electroless copper plating was performed to form a plated through hole 236 (FIG. 2C).

実施例3
(1)基板330に厚さ12μm銅箔332が貼付された厚さ0.6mmの両面銅張積層板(松下電工 R5715)330Aを用意した(図3(A))。
(2)この銅箔332を硫酸−過酸化水素水溶液でエッチングして厚さを5μmとした(図3(B))。
(3)この両面銅張積層板330Aに炭酸ガスレーザ(三菱電機 ML605GTL)を用いて、30mJ、52×10-6秒のパルス条件で15ショットにて表面および裏面から照射して直径150μm(最大径D3:160μm 最小径D4:140μmのテーパあり)の孔316を設けた。孔316の断面はつつみ形状である(図3(C))。
(4)実施例1と同様にして無電解銅めっきを施してめっきスルーホール336を形成した(図3(D))。この実施例4では、表及び裏面からレーザを照射するため、基板の厚さが厚くともスルーホールを形成できる。
Example 3
(1) A 0.6 mm thick double-sided copper clad laminate (Matsushita Electric Works R5715) 330A having a 12 μm thick copper foil 332 attached to a substrate 330 was prepared (FIG. 3A).
(2) The copper foil 332 was etched with a sulfuric acid-hydrogen peroxide solution to a thickness of 5 μm (FIG. 3B).
(3) Using a carbon dioxide laser (Mitsubishi Electric ML605GTL) on this double-sided copper-clad laminate 330A, irradiating it from the front and back with 15 shots under a pulse condition of 30 mJ, 52 × 10 −6 seconds, a diameter of 150 μm (maximum diameter) D3: 160 μm Minimum diameter D4: 140 μm taper)) was provided. The cross section of the hole 316 has a sag shape (FIG. 3C).
(4) In the same manner as in Example 1, electroless copper plating was performed to form a plated through hole 336 (FIG. 3D). In Example 4, since the laser is irradiated from the front and back surfaces, a through hole can be formed even if the substrate is thick.

比較例1
(1)厚さ12μm銅箔が貼付された厚さ0.6mmの両面銅張積層板(松下電工 R5715)を用意した。
(2)この両面銅張積層板に炭酸ガスレーザ(三菱電機 ML605GTL)を用いて、30mJ、52×10-6秒のパルス条件で15ショットの条件でレーザを照射したが、穿孔できなかった。この例から、銅箔の厚みが12μmを越えるとスルーホールが形成できないことが分かった。
Comparative Example 1
(1) A double-sided copper-clad laminate (Matsushita Electric Works R5715) with a thickness of 0.6 mm to which a 12 μm-thick copper foil was attached was prepared.
(2) Using a carbon dioxide gas laser (Mitsubishi Electric ML605GTL) on this double-sided copper-clad laminate, the laser was irradiated under the conditions of 15 shots under a pulse condition of 30 mJ, 52 × 10 −6 seconds, but drilling was not possible. From this example, it was found that if the thickness of the copper foil exceeds 12 μm, a through hole cannot be formed.

実施例4引き続き、レーザによりスルーホールを形成して多層プリント配線板を製造する第4実施例について、図4〜図10を参照して説明する。先ず、本発明の実施例4に係る多層プリント配線板10の構成について、図9を参照して説明する。多層プリント配線板10では、コア基板30の表面及び裏面にビルドアップ配線層80A、80Bが形成されている。該ビルトアップ層80Aは、バイアホール60及び導体回路58の形成された層間樹脂絶縁層50と、バイアホール160及び導体回路158の形成された層間樹脂絶縁層150とからなる。また、ビルドアップ配線層80Bは、バイアホール60及び導体回路58の形成された層間樹脂絶縁層50と、バイアホール160及び導体回路158の形成された層間樹脂絶縁層150とからなる。 Example 4 Subsequently, a fourth example of manufacturing a multilayer printed wiring board by forming a through hole with a laser will be described with reference to FIGS. First, the structure of the multilayer printed wiring board 10 according to Embodiment 4 of the present invention will be described with reference to FIG. In the multilayer printed wiring board 10, build-up wiring layers 80 </ b> A and 80 </ b> B are formed on the front surface and the back surface of the core substrate 30. The built-up layer 80A includes an interlayer resin insulation layer 50 in which via holes 60 and conductor circuits 58 are formed, and an interlayer resin insulation layer 150 in which via holes 160 and conductor circuits 158 are formed. The build-up wiring layer 80B includes an interlayer resin insulation layer 50 in which the via hole 60 and the conductor circuit 58 are formed, and an interlayer resin insulation layer 150 in which the via hole 160 and the conductor circuit 158 are formed.

多層プリント配線板10の上面側には、ICチップのランド(図示せず)へ接続するための半田バンプ76Uが配設されている。半田バンプ76Uはバイアホール160及びバイアホール60を介してスルーホール36へ接続されている。一方、下面側には、ドーターボードのランド(図示せず)に接続するための半田バンプ76Dが配設されている。該半田バンプ76Dは、バイアホール160及びバイアホール60を介してスルーホール36へ接続されている。 On the upper surface side of the multilayer printed wiring board 10, solder bumps 76U for connection to IC chip lands (not shown) are disposed. The solder bump 76U is connected to the through hole 36 via the via hole 160 and the via hole 60. On the other hand, solder bumps 76D for connecting to lands (not shown) of the daughter board are disposed on the lower surface side. The solder bump 76D is connected to the through hole 36 via the via hole 160 and the via hole 60.

引き続き、多層プリント配線板10の製造方法について説明する。
ここでは、先ず、実施例4の多層プリント配線板の製造方法に用いるA.無電解めっき用接着剤、B.樹脂充填剤、C.ソルダーレジスト組成物の調整について説明する。
Next, a method for manufacturing the multilayer printed wiring board 10 will be described.
Here, first, the A.M. used for the manufacturing method of the multilayer printed wiring board of Example 4 was used. B. Adhesive for electroless plating, Resin filler, C.I. The adjustment of the solder resist composition will be described.

A.無電解めっき用接着剤(上層用接着剤)の調製(1) クレゾールノボラック型エポキシ樹脂(日本化薬製:分子量2500)の25重量%アクリル化物を35重量部、感光性モノマー(東亜合成製:商品名アロニックスM315)3.15重量部、消泡剤(サンノプコ製S-65)0.5 重量部、N-メチルピロリドン(NMP )3.6 重量部を攪拌混合した。 A. Preparation of adhesive for electroless plating (adhesive for upper layer) (1) 35 parts by weight of 25% by weight acrylate of cresol novolac type epoxy resin (Nippon Kayaku: molecular weight 2500), photosensitive monomer (manufactured by Toa Gosei: 3.15 parts by weight of Aronix M315), 0.5 parts by weight of antifoaming agent (S-65 manufactured by Sannopco), and 3.6 parts by weight of N-methylpyrrolidone (NMP) were mixed with stirring.

(2) ポリエーテルスルフォン(PES )12重量部、エポキシ樹脂粒子(三洋化成製:商品名ポリマーポール)の平均粒径1.0 μmのものを7.2 重量部、平均粒径0.5 μmのものを3.09重量部を混合した後、更にNMP 30重量部を添加し、ビーズミルで攪拌混合した。 (2) 12 parts by weight of polyethersulfone (PES), 7.2 parts by weight of epoxy resin particles (manufactured by Sanyo Chemical Co., Ltd .: trade name polymer pole) with an average particle size of 1.0 μm, and 3.09 parts by weight with an average particle size of 0.5 μm After mixing, 30 parts by weight of NMP was further added and stirred and mixed with a bead mill.

(3) イミダゾール硬化剤(四国化成製:商品名2E4MZ-CN)2重量部、光開始剤(チバガイギー製:イルガキュア I-907)2重量部、光増感剤(日本化薬製:DETX-S)0.2 重量部、NMP 1.5 重量部を攪拌混合した。
(4) 混合物(1) 〜(3) を混合して、無電解めっき用接着剤組成物を得た。
(3) 2 parts by weight of imidazole curing agent (Shikoku Kasei: product name 2E4MZ-CN), 2 parts by weight of photoinitiator (Ciba Geigy: Irgacure I-907), photosensitizer (DETX-S, manufactured by Nippon Kayaku) ) 0.2 parts by weight and 1.5 parts by weight of NMP were mixed with stirring.
(4) Mixtures (1) to (3) were mixed to obtain an electroless plating adhesive composition.

B.樹脂充填剤の調整(1) ビスフェノールF型エポキシモノマー(油化シェル製:分子量310 、商品名YL983U ) 100重量部と平均粒径 1.6μmで表面にシランカップリング剤がコーティングされたSiO2 球状粒子〔アドマテック製:CRS 1101−CE、ここで、最大粒子の大きさは後述する内層銅パターンの厚み(15μm)以下とする。〕 170重量部、レベリング剤(サンノプコ製:商品名ペレノールS4)1.5 重量部を3本ロールにて混練し、その混合物の粘度を23±1℃で45,000〜49,000cps に調整した。 B. Adjustment of resin filler (1) Bisphenol F type epoxy monomer (Oilized shell: molecular weight 310, trade name YL983U) 100 parts by weight, SiO 2 spherical particles with an average particle size of 1.6μm and coated with silane coupling agent on the surface [Manufactured by Admatech: CRS 1101-CE, where the maximum particle size is not more than the thickness (15 μm) of the inner layer copper pattern described later. 170 parts by weight and 1.5 parts by weight of a leveling agent (manufactured by San Nopco: trade name Perenol S4) were kneaded with three rolls, and the viscosity of the mixture was adjusted to 45,000 to 49,000 cps at 23 ± 1 ° C.

(2) イミダゾール硬化剤(四国化成製、商品名:2E4MZ-CN)6.5 重量部。
(3) 混合物(1) と(2) とを混合して、樹脂充填剤を調製した。
(2) 6.5 parts by weight of imidazole curing agent (product name: 2E4MZ-CN, manufactured by Shikoku Kasei)
(3) Mixtures (1) and (2) were mixed to prepare a resin filler.

C.ソルダーレジストの調整DMDGに溶解させた60重量%のクレゾールノボラック型エポキシ樹脂(日本化薬製)のエポキシ基50%をアクリル化した感光性付与のオリゴマー(分子量4000)を 46.67g、メチルエチルケトンに溶解させた80重量%のビスフェノールA型エポキシ樹脂(油化シェル製、エピコート1001)15.0g、イミダゾール硬化剤(四国化成製、2E4MZ-CN)1.6 g、感光性モノマーである多価アクリルモノマー(日本化薬製、R604 )3g、同じく多価アクリルモノマー(共栄社化学製、DPE6A ) 1.5g、分散系消泡剤(サンノプコ社製、S−65)0.71gを混合し、さらにこの混合物に対して光開始剤としてのベンゾフェノン(関東化学製)を2g、光増感剤としてのミヒラーケトン(関東化学製)を 0.2g加えて、粘度を25℃で2.0Pa・sに調整したソルダーレジスト組成物を得た。 C. Preparation of solder resist 46.67g of photosensitizing oligomer (molecular weight 4000) obtained by acrylating 50% of epoxy group of 60% cresol novolak type epoxy resin (manufactured by Nippon Kayaku) dissolved in DMDG was dissolved in methyl ethyl ketone. 80% by weight of bisphenol A type epoxy resin (Oka Chemical Shell, Epicoat 1001) 15.0 g, imidazole curing agent (Shikoku Chemicals, 2E4MZ-CN) 1.6 g, polyvalent acrylic monomer (Nippon Kayaku) R604) 3 g, 1.5 g polyvalent acrylic monomer (Kyoeisha Chemical Co., DPE6A), 0.71 g dispersion antifoam (Sannopco, S-65) are mixed, and the photoinitiator is mixed with this mixture. 2 g of benzophenone (manufactured by Kanto Chemical Co., Inc.) and 0.2 g of Michler ketone (manufactured by Kanto Chemical Co., Ltd.) as a photosensitizer were added, and the viscosity was adjusted to 2.0 Pa · s at 25 ° C. A rudder resist composition was obtained.

プリント配線板の製造
(1) 厚さ0.6mmのガラスエポキシ樹脂からなる基板30の両面に12μmの銅箔32がラミネートされている銅張積層板30Aを出発材料とした(図4(A))。これをエッチングして厚さを5μmに調整した(図4(B))。
Manufacture of printed wiring boards
(1) A copper-clad laminate 30A in which a 12 μm copper foil 32 is laminated on both surfaces of a substrate 30 made of glass epoxy resin having a thickness of 0.6 mm was used as a starting material (FIG. 4A). This was etched to adjust the thickness to 5 μm (FIG. 4B).

(2) この銅張積層板30Aに、炭酸ガスレーザ(三菱電機 ML605GTL)を用いて、30mJ、52×10-6秒のパルス条件で15ショットの条件でレーザを照射して、直径100μm(上径D1:110μm 下径D2:90μmのテーパあり)の貫通孔16を設けた(図4(C))。次に無電解めっき、電解めっきを施し(図4(D))、更に銅箔を常法に従いパターン状にエッチングすることにより、基板の両面に厚さ15μmの内層銅パターン(下層導体回路)34及びスルーホール36を形成した(図4(E))。 (2) Using a carbon dioxide laser (Mitsubishi Electric ML605GTL) to irradiate the copper clad laminate 30A with a laser of 15 shots under a pulse condition of 30 mJ, 52 × 10 −6 seconds, a diameter of 100 μm (upper diameter) D1: 110 μm, lower diameter D2: with a taper of 90 μm) was provided (FIG. 4C). Next, electroless plating and electrolytic plating are performed (FIG. 4D), and the copper foil is further etched into a pattern according to a conventional method, whereby an inner layer copper pattern (lower conductor circuit) 34 having a thickness of 15 μm is formed on both surfaces of the substrate. And the through-hole 36 was formed (FIG.4 (E)).

次に、内層銅パターン34の表面と、スルーホール36のランド36A表面と内壁とに、それぞれ、粗化面38を設けて、配線基板を製造した(図4(F))。粗化面38は、前述の基板30を水洗し、乾燥した後、エッチング液を基板の両面にスプレイで吹きつけて、内層銅パターン34の表面とスルーホール36のランド36a表面と内壁とをエッチングすることによって形成した。エッチング液には、イミダゾール銅(II)錯体10重量部、グリコール酸7重量部、塩化カリウム5重量部、イオン交換水78重量部を混合したものを用いた。 Next, a roughened surface 38 was provided on the surface of the inner layer copper pattern 34, the land 36A surface and the inner wall of the through hole 36, respectively, and a wiring board was manufactured (FIG. 4F). The roughened surface 38 is obtained by washing the substrate 30 with water and drying it, and spraying an etching solution on both surfaces of the substrate by spraying to etch the surface of the inner layer copper pattern 34, the surface of the land 36a of the through hole 36, and the inner wall. Formed by. The etching solution used was a mixture of 10 parts by weight of imidazole copper (II) complex, 7 parts by weight of glycolic acid, 5 parts by weight of potassium chloride, and 78 parts by weight of ion-exchanged water.

(3) 次いで、樹脂層40を配線基板の内層銅パターン34間とスルーホール36内とに設けた(図5(G))。樹脂層40は、予め調製した上記Bの樹脂充填剤を、ロールコータにより配線基板の両面に塗布し、内層銅パターンの間とスルーホール内に充填し、 100℃で1時間、120 ℃で3時間、 150℃で1時間、 180℃で7時間、それぞれ加熱処理することにより硬化させて形成した。 (3) Next, the resin layer 40 was provided between the inner layer copper patterns 34 of the wiring board and in the through holes 36 (FIG. 5G). The resin layer 40 is prepared by applying the resin filler B prepared in advance onto both sides of the wiring board with a roll coater, filling the space between the inner layer copper patterns and the through holes, and then at 100 ° C. for 1 hour and at 120 ° C. for 3 hours. It was cured by heating for 1 hour at 150 ° C. and 7 hours at 180 ° C., respectively.

(4) (3) の処理で得た基板30の片面を、ベルトサンダー研磨した。この研磨で、#600 のベルト研磨紙(三共理化学製)を用い、内層銅パターン34の粗化面38やスルーホール36のランド36a表面に樹脂充填剤40が残らないようにした(図5(H))。次に、このベルトサンダー研磨による傷を取り除くために、バフ研磨を行った。このような一連の研磨を基板の他方の面についても同様に行った。 (4) One side of the substrate 30 obtained by the treatment in (3) was subjected to belt sander polishing. In this polishing, a # 600 belt polishing paper (manufactured by Sankyo Rikagaku) was used so that the resin filler 40 did not remain on the roughened surface 38 of the inner layer copper pattern 34 or the land 36a surface of the through hole 36 (FIG. 5 ( H)). Next, buffing was performed to remove scratches caused by this belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate.

得られた配線基板30は、内層銅パターン34間に樹脂層40が設けられ、スルーホール36内に樹脂層40が設けられている。内層銅パターン34の粗化面38とスルーホール36のランド36a表面の粗化面が除去されており、基板両面が樹脂充填剤により平滑化されている。樹脂層40は内層銅パターン34の側面の粗化面387又はスルーホール36のランド部36a側面の粗化面38と密着し、また、樹脂層はスルーホールの内壁の粗化面と密着している。 In the obtained wiring board 30, the resin layer 40 is provided between the inner layer copper patterns 34, and the resin layer 40 is provided in the through hole 36. The roughened surface 38 of the inner layer copper pattern 34 and the roughened surface of the land 36a surface of the through hole 36 are removed, and both surfaces of the substrate are smoothed with a resin filler. The resin layer 40 is in close contact with the roughened surface 387 on the side surface of the inner layer copper pattern 34 or the roughened surface 38 on the side surface of the land portion 36a of the through hole 36, and the resin layer is in close contact with the roughened surface of the inner wall of the through hole. Yes.

(5) 更に、露出した内層銅パターン34とスルーホール36のランド36a上面を(2) のエッチング処理で粗化して、深さ3μmの粗化面42を形成した(図5(I))。 (5) Further, the exposed inner layer copper pattern 34 and the upper surface of the land 36a of the through hole 36 were roughened by the etching process (2) to form a roughened surface 42 having a depth of 3 μm (FIG. 5 (I)).

この粗化面42をスズ置換めっきして、0.3 μmの厚さのSn層(図示せず)を設けた。置換めっきは、ホウフッ化スズ0.1 モル/L、チオ尿素1.0 モル/L、温度50℃、pH=1.2 の条件で、粗化面をCu−Sn置換反応させた。 The roughened surface 42 was subjected to tin substitution plating to provide a Sn layer (not shown) having a thickness of 0.3 μm. In the displacement plating, the roughened surface was subjected to a Cu—Sn substitution reaction under the conditions of tin borofluoride 0.1 mol / L, thiourea 1.0 mol / L, temperature 50 ° C., pH = 1.2.

(6) 得られた配線基板30の両面に、上記Aの無電解めっき用接着剤をロールコータを用いて塗布した。この接着剤は、基板を水平状態で20分間放置してから、60℃で30分乾燥し、厚さ35μmの接着剤層50を形成した(図5(J))。 (6) The electroless plating adhesive (A) was applied to both surfaces of the obtained wiring board 30 using a roll coater. This adhesive was allowed to stand for 20 minutes in a horizontal state and then dried at 60 ° C. for 30 minutes to form an adhesive layer 50 having a thickness of 35 μm (FIG. 5J).

(7) 得られた配線基板30の両面を超高圧水銀灯により 500mJ/cm2 で露光し、150℃で5時間加熱した。 (7) Both surfaces of the obtained wiring board 30 were exposed to 500 mJ / cm 2 with an ultrahigh pressure mercury lamp and heated at 150 ° C. for 5 hours.

(8) 得られた基板30をクロム酸に1分間浸漬し、接着剤層50の表面に存在するエポキシ樹脂粒子を溶解除去した。この処理によって、粗化面を、接着剤層50の表面に形成した。その後、得られた基板30を中和溶液(シプレイ社製)に浸漬してから水洗した(図5(K))。 (8) The obtained substrate 30 was immersed in chromic acid for 1 minute, and the epoxy resin particles present on the surface of the adhesive layer 50 were dissolved and removed. By this treatment, a roughened surface was formed on the surface of the adhesive layer 50. Thereafter, the obtained substrate 30 was immersed in a neutralization solution (manufactured by Shipley Co., Ltd.) and washed with water (FIG. 5 (K)).

(9) ついで、基板30の全面に厚さ0.6μmの無電解銅めっき44を施した(図6(L))。 (9) Next, electroless copper plating 44 having a thickness of 0.6 μm was applied to the entire surface of the substrate 30 (FIG. 6L).

(10) エッチングレジスト(図示せず)を設けて、硫酸−過酸化水素水溶液でエッチングシて、無電解銅めっき44のバイアホール形成部分にφ50μmの開口44aを設けた(図6(M))。 (10) An etching resist (not shown) is provided and etched with a sulfuric acid-hydrogen peroxide solution to provide an opening 44a of φ50 μm in the via hole forming portion of the electroless copper plating 44 (FIG. 6 (M)). .

(11)上記無電解銅めっき44をコンフォーマルマスクとして用い、短パルス(10-4秒)のレーザ光(三菱電機 ML605GTL )により、開口44a下の接着剤層50を除去してバイアホール用開口48を設けた(図6(N))。 (11) Using the electroless copper plating 44 as a conformal mask, the adhesive layer 50 under the opening 44a is removed by a short pulse (10 −4 second) laser beam (Mitsubishi Electric ML605GTL) to open a via hole. 48 was provided (FIG. 6 (N)).

更に、配線基板30の表面に、パラジウム触媒(アトテック製)を付与することにより、無電解めっき膜44表面およびバイアホール用開口48の粗化面に触媒核を付けた。 Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the wiring board 30, catalyst nuclei were attached to the surface of the electroless plating film 44 and the roughened surface of the via hole opening 48.

(12)得られた基板30を以下の条件の無電解銅めっき浴中に浸漬し、厚さ1.6 μmの無電解銅めっき膜52を基板30の全体に形成した(図6(O))。
無電解めっき液;
EDTA : 150 g/L
硫酸銅 : 20 g/L
HCHO : 30 mL/L
NaOH : 40 g/L
α、α’−ビピリジル : 80 mg/L
PEG : 0.1 g/L
無電解めっき条件;
70℃の液温度で30分
(12) The obtained substrate 30 was immersed in an electroless copper plating bath under the following conditions to form an electroless copper plating film 52 having a thickness of 1.6 μm on the entire substrate 30 (FIG. 6 (O)).
Electroless plating solution;
EDTA: 150 g / L
Copper sulfate: 20 g / L
HCHO: 30 mL / L
NaOH: 40 g / L
α, α'-bipyridyl: 80 mg / L
PEG: 0.1 g / L
Electroless plating conditions;
30 minutes at a liquid temperature of 70 ° C

(13)次に、市販の感光性ドライフィルム(図示せず)を無電解銅めっき膜52に張り付け、パターンが印刷されたマスクフィルム(図示せず)を載置した。この基板30を、100mJ/cm2 で露光し、その後0.8%炭酸ナトリウムで現像処理して、厚さ15μmのめっきレジスト54を設けた(図6(P))。 (13) Next, a commercially available photosensitive dry film (not shown) was attached to the electroless copper plating film 52, and a mask film (not shown) on which a pattern was printed was placed. The substrate 30 was exposed at 100 mJ / cm 2 and then developed with 0.8% sodium carbonate to provide a plating resist 54 having a thickness of 15 μm (FIG. 6 (P)).

(14) 次いで、得られた基板に以下の条件で電解銅めっきを施し、厚さ15μmの電解銅めっき膜56を形成した(図6(Q))。
電解めっき液;
硫酸 : 180 g/L
硫酸銅 : 80 g/L
添加剤 : 1mL/L(添加剤はアトテックジャパン製:商品名カパラシドGL)
電解めっき条件;
電流密度 : 1A/dm2
時間 : 30分
温度 : 室温
(14) Next, electrolytic copper plating was performed on the obtained substrate under the following conditions to form an electrolytic copper plating film 56 having a thickness of 15 μm (FIG. 6 (Q)).
Electrolytic plating solution;
Sulfuric acid: 180 g / L
Copper sulfate: 80 g / L
Additive: 1 mL / L (additive is manufactured by Atotech Japan: trade name Kaparaside GL)
Electrolytic plating conditions;
Current density: 1 A / dm 2
Time: 30 minutes Temperature: Room temperature

(15)めっきレジスト54を5%KOH で剥離除去した後、硫酸と過酸化水素混合液でエッチングし、めっきレジスト下の無電解めっき膜52を溶解除去し、銅箔32、無電解めっき44、無電解銅めっき膜52と電解銅めっき膜56とからなる厚さ18μm(10μm〜30μm)の導体回路58及びバイアホールを60を得た(図6(R))。ここで、厚みを10μm〜30μmにすることで、ファインピッチと接続信頼性とを両立させる。 (15) After removing the plating resist 54 with 5% KOH, etching is performed with a mixed solution of sulfuric acid and hydrogen peroxide to dissolve and remove the electroless plating film 52 under the plating resist, and the copper foil 32, the electroless plating 44, A conductor circuit 58 having a thickness of 18 μm (10 μm to 30 μm) composed of the electroless copper plating film 52 and the electrolytic copper plating film 56 and 60 via holes were obtained (FIG. 6R). Here, the fine pitch and the connection reliability are made compatible by setting the thickness to 10 μm to 30 μm.

更に、70℃で80g/Lのクロム酸に3分間浸漬して、導体回路58間の無電解めっき用接着剤層50の表面を1μmエッチング処理し、表面のパラジウム触媒を除去した。 Further, the surface of the adhesive layer 50 for electroless plating between the conductor circuits 58 was etched by 1 μm at 70 ° C. for 3 minutes in 80 g / L chromic acid, and the palladium catalyst on the surface was removed.

(16)(5) と同様の処理を行い、導体回路58及びバイアホール60の表面にCu-Ni-P からなる粗化面62を形成し、さらにその表面にSn置換を行った(図7(S)参照)。 (16) The same treatment as in (5) was performed to form a roughened surface 62 made of Cu—Ni—P on the surface of the conductor circuit 58 and the via hole 60, and further Sn substitution was performed on the surface (FIG. 7). (See (S)).

(17)(6) 〜(16)の工程を繰り返すことにより、さらに上層の層間樹脂絶縁層160とバイアホール160及び導体回路158を形成する。さらに、バイアホール160及び該導体回路158の表面に粗化層162を形成し、多層プリント配線板を完成する(図6(T))。なお、この上層の導体回路を形成する工程においては、Sn置換は行わなかった。 (17) By repeating the steps (6) to (16), an upper interlayer resin insulation layer 160, a via hole 160, and a conductor circuit 158 are formed. Further, a roughened layer 162 is formed on the surfaces of the via hole 160 and the conductor circuit 158, thereby completing a multilayer printed wiring board (FIG. 6 (T)). In the step of forming the upper conductor circuit, Sn substitution was not performed.

(18)そして、上述した多層プリント配線板にはんだバンプを形成する。前記(17)で得られた基板30両面に、上記C.にて説明したソルダーレジスト組成物を45μmの厚さで塗布する。次いで、70℃で20分間、70℃で30分間の乾燥処理を行った後、円パターン(マスクパターン)が描画された厚さ5mmのフォトマスクフィルム(図示せず)を密着させて載置し、1000mJ/cm2 の紫外線で露光し、DMTG現像処理する。そしてさらに、80℃で1時間、 100℃で1時間、 120℃で1時間、 150℃で3時間の条件で加熱処理し、はんだパッド部分(バイアホールとそのランド部分を含む)に開口(開口径 200μm)71を有するソルダーレジスト層(厚み20μm)70を形成する(図8(U))。 (18) Then, solder bumps are formed on the multilayer printed wiring board described above. On the both surfaces of the substrate 30 obtained in (17) above, C.I. The solder resist composition described in 1 is applied at a thickness of 45 μm. Next, after drying at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, a photomask film (not shown) having a thickness of 5 mm on which a circular pattern (mask pattern) is drawn is placed in close contact. , Exposed to 1000 mJ / cm 2 of UV light and developed with DMTG. Further, heat treatment was performed at 80 ° C. for 1 hour, 100 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours, and the solder pad part (including the via hole and its land part) was opened (opened). A solder resist layer (thickness 20 μm) 70 having a diameter (200 μm) 71 is formed (FIG. 8 (U)).

(19)次に、塩化ニッケル2.31×10-1mol/l、次亜リン酸ナトリウム2.8 ×10-1mol/l、クエン酸ナトリウム1.85×10-1mol/l、からなるpH=4.5の無電解ニッケルめっき液に該基板30を20分間浸漬して、開口部71に厚さ5μmのニッケルめっき層72を形成した。さらに、その基板を、シアン化金カリウム4.1 ×10-2mol/l、塩化アンモニウム1.87×10-1mol/l、クエン酸ナトリウム1.16×10-1mol/l、次亜リン酸ナトリウム1.7 ×10-1mol/lからなる無電解金めっき液に80℃の条件で7分20秒間浸漬して、ニッケルめっき層上に厚さ0.03μmの金めっき層74を形成することで、バイアホール160及び導体回路158に半田パッド75を形成する(図8(V))。 (19) Next, pH = 4.5 consisting of nickel chloride 2.31 × 10 −1 mol / l, sodium hypophosphite 2.8 × 10 −1 mol / l, sodium citrate 1.85 × 10 −1 mol / l The substrate 30 was immersed in the electroless nickel plating solution for 20 minutes to form a nickel plating layer 72 having a thickness of 5 μm in the opening 71. Further, the substrate was made of potassium gold cyanide 4.1 × 10 −2 mol / l, ammonium chloride 1.87 × 10 −1 mol / l, sodium citrate 1.16 × 10 −1 mol / l, sodium hypophosphite 1.7 × 10 -1 mol / l in an electroless gold plating solution at 80 ° C. for 7 minutes and 20 seconds to form a 0.03 μm thick gold plating layer 74 on the nickel plating layer. Solder pads 75 are formed on the conductor circuit 158 (FIG. 8 (V)).

(22)そして、ソルダーレジスト層70の開口部71に、半田ペーストを印刷して200℃でリフローすることにより、半田バンプ(半田体)76U、76Dを形成し、多層プリント配線板10を形成した(図8(W)参照)。 (22) Then, solder bumps (solder bodies) 76U and 76D are formed by printing solder paste on the opening 71 of the solder resist layer 70 and reflowing at 200 ° C., and the multilayer printed wiring board 10 is formed. (See FIG. 8 (W)).

(実施例5)
実施例4と同様であるが、実施例3で得られたつつみ型スルーホール336を有するスルーホール形成基板330をコア基板として使用した。
(Example 5)
Although it is the same as that of Example 4, the through-hole formation board | substrate 330 which has the penetration type through-hole 336 obtained in Example 3 was used as a core board | substrate.

(実施例6)
図10は、実施例6に係る多層プリント配線板の構成を示している。このプリント配線板においては、スルーホル36の通孔16の直径Dは、レーザにより100〜200μmに形成されている。この例では、通孔16にはテーパが設けられていない。そして、多層プリント配線板10では、コア基板30に形成されたスルーホール36の通孔16を塞ぐようにバイアホール60が形成することで、スルーホール36の直上にバイアホール60を配置している。このため、多層プリント配線板内の配線長が最短になり、ICチップの高速化に対応することができる。
(Example 6)
FIG. 10 shows a configuration of a multilayer printed wiring board according to the sixth embodiment. In this printed wiring board, the diameter D of the through hole 16 of the through hole 36 is formed to be 100 to 200 μm by a laser. In this example, the through hole 16 is not tapered. In the multilayer printed wiring board 10, the via hole 60 is formed immediately above the through hole 36 by forming the via hole 60 so as to close the through hole 16 of the through hole 36 formed in the core substrate 30. . For this reason, the wiring length in the multilayer printed wiring board is minimized, and it is possible to cope with the increase in the speed of the IC chip.

また、スルーホール36直上の領域を内層パッドとして機能せしめることでデッドスペースが無くなる。しかも、スルーホール36からバイアホール60に接続するための内層パッドを配線する必要もないので、スルーホール36のランド36aの形状を真円とすることができる。その結果、多層コア基板30中に設けられるスルーホール36の配置密度が向上しする。なお、本実施例では、バイアホール60の底面の内の20%〜50%が、スルーホール36のランド36aと接触しておれば、十分な電気的接続を達成できる。   Further, the dead space is eliminated by making the region immediately above the through hole 36 function as an inner layer pad. In addition, since it is not necessary to wire an inner layer pad for connecting the through hole 36 to the via hole 60, the shape of the land 36a of the through hole 36 can be a perfect circle. As a result, the arrangement density of the through holes 36 provided in the multilayer core substrate 30 is improved. In the present embodiment, if 20% to 50% of the bottom surface of the via hole 60 is in contact with the land 36a of the through hole 36, sufficient electrical connection can be achieved.

以上説明のように、本発明では、直接銅張積層板を炭酸ガスレーザで穿孔できるため、低コストで微細なスルーホールを形成できる。 As described above, in the present invention, since a copper-clad laminate can be directly punched with a carbon dioxide laser, a fine through hole can be formed at low cost.

図1(A)、図1(B)、図1(C)、図1(D)は、本発明の実施例1に係るスルーホール形成基板の製造工程図である。1A, FIG. 1B, FIG. 1C, and FIG. 1D are manufacturing process diagrams of a through-hole forming substrate according to Example 1 of the present invention. 図2(A)、図2(B)、図2(C)、図2(D)は、本発明の実施例2に係るスルーホール形成基板の製造工程図である。2 (A), 2 (B), 2 (C), and 2 (D) are manufacturing process diagrams of the through hole forming substrate according to Example 2 of the present invention. 図3(A)、図3(B)、図3(C)、図3(D)は、本発明の実施例3に係るスルーホール形成基板の製造工程図である。3 (A), 3 (B), 3 (C), and 3 (D) are manufacturing process diagrams of the through hole forming substrate according to Example 3 of the present invention. 図4(A)、図4(B)、図4(C)、図4(D)、図4(E)、図4(F)は、本発明の実施例4に係る多層プリント配線板の製造工程図である。4 (A), 4 (B), 4 (C), 4 (D), 4 (E), and 4 (F) show a multilayer printed wiring board according to Example 4 of the present invention. FIG. 図5(G)、図5(H)、図5(I)、図5(J)、図5(K)は、本発明の実施例4に係る多層プリント配線板の製造工程図である。5 (G), FIG. 5 (H), FIG. 5 (I), FIG. 5 (J), and FIG. 5 (K) are manufacturing process diagrams of the multilayer printed wiring board according to Example 4 of the present invention. 図6(L)、図6(M)、図6(N)、図6(O)、図6(P)は、本発明の実施例4に係る多層プリント配線板の製造工程図である。6 (L), FIG. 6 (M), FIG. 6 (N), FIG. 6 (O), and FIG. 6 (P) are manufacturing process diagrams of the multilayer printed wiring board according to Example 4 of the present invention. 図7(Q)、図7(R)、図7(S)、図7(T)は、本発明の実施例4に係る多層プリント配線板の製造工程図である。7 (Q), FIG. 7 (R), FIG. 7 (S), and FIG. 7 (T) are manufacturing process diagrams of the multilayer printed wiring board according to Example 4 of the present invention. 図8(U)、図8(V)、図8(W)は、本発明の実施例4に係る多層プリント配線板の製造工程図である。8 (U), FIG. 8 (V), and FIG. 8 (W) are manufacturing process diagrams of the multilayer printed wiring board according to Example 4 of the present invention. 本発明の実施例4に係る多層プリント配線板の断面図である。It is sectional drawing of the multilayer printed wiring board which concerns on Example 4 of this invention. 本発明の実施例6に係る多層プリント配線板の断面図である。It is sectional drawing of the multilayer printed wiring board which concerns on Example 6 of this invention.

符号の説明Explanation of symbols

16 通孔
30 コア基板
34 導体回路
36 スルーホール
48 開口
50 層間樹脂絶縁層
52 無電解めっき層
56 電解めっき層
58 導体回路
60 バイアホール
80A、80B ビルドアップ配線層
150 層間樹脂絶縁層
158 導体回路
16 Through-hole 30 Core substrate 34 Conductor circuit 36 Through hole 48 Opening 50 Interlayer resin insulation layer 52 Electroless plating layer 56 Electrolytic plating layer 58 Conductor circuit 60 Via hole 80A, 80B Build-up wiring layer 150 Interlayer resin insulation layer 158 Conductor circuit

Claims (8)

両面銅張積層板に貫通孔が設けられ、その貫通孔を導電化してスルーホールが形成された基板において、前記貫通孔にはテーパが形成されてなることを特徴とするスルーホールの形成基板。 A substrate in which a through hole is formed in a double-sided copper-clad laminate, and the through hole is formed by conducting the through hole, wherein the through hole is tapered. 前記テーパは、基板の一方向に向けて貫通孔の径が大きくなるように形成されている請求項1に記載のスルーホールの形成基板。 The through hole forming substrate according to claim 1, wherein the taper is formed so that a diameter of the through hole increases in one direction of the substrate. 前記テーパは、スルーホールの断面がつつみ型になるように形成されている請求項9に記載のスルーホールの形成基板。 The through hole forming substrate according to claim 9, wherein the taper is formed so that a cross section of the through hole is a stagnation type. 両面銅張積層板に貫通孔が設けられ、その貫通孔が導電化されてスルーホールが形成された基板の少なくとも一方の面に層間樹脂絶縁層および導体回路が形成されてなる多層配線板において、前記貫通孔にはテーパが形成されてなることを特徴とする多層プリント配線板。 In a multilayer wiring board in which a through-hole is provided in a double-sided copper-clad laminate, the interlayer resin insulating layer and a conductor circuit are formed on at least one surface of a substrate in which the through-hole is made conductive and a through-hole is formed, A multilayer printed wiring board, wherein the through hole is tapered. 前記両面銅張積層板の銅箔の厚みと該銅箔上に形成されためっき層の厚みとを加えた厚さが、10〜30μmである請求項4に記載の多層プリント配線板。 5. The multilayer printed wiring board according to claim 4, wherein a thickness obtained by adding a thickness of the copper foil of the double-sided copper clad laminate and a thickness of the plating layer formed on the copper foil is 10 to 30 μm. 前記テーパは、基板の一方向に向けて貫通孔の径が大きくなるように形成されている請求項4または5に記載の多層プリント配線板。 The multilayer printed wiring board according to claim 4, wherein the taper is formed so that a diameter of the through hole increases toward one direction of the substrate. 前記テーパは、スルーホールの断面がつつみ型になるように形成されている請求項4又は5に記載の多層プリント配線板。 The multilayer printed wiring board according to claim 4, wherein the taper is formed so that a cross-section of the through hole is a stagnation type. 前記スルーホール内には、充填材が充填されてなる請求項4〜7のいずれか1に記載の多層プリント配線板。 The multilayer printed wiring board according to claim 4, wherein the through hole is filled with a filler.
JP2007324769A 2007-12-17 2007-12-17 Multilayer printed circuit board manufacturing method Expired - Fee Related JP4722904B2 (en)

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JP2014090079A (en) * 2012-10-30 2014-05-15 Ibiden Co Ltd Printed wiring board
JP2022037065A (en) * 2019-12-26 2022-03-08 大日本印刷株式会社 Penetration electrode substrate
WO2023282692A1 (en) * 2021-07-08 2023-01-12 엘지이노텍 주식회사 Circuit board
WO2023080719A1 (en) * 2021-11-05 2023-05-11 엘지이노텍 주식회사 Circuit board

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WO2023080719A1 (en) * 2021-11-05 2023-05-11 엘지이노텍 주식회사 Circuit board

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