JP2014090079A - Printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board excellent in flatness.SOLUTION: A through hole for a filling resin is formed by a first opening part formed on a first face side of an insulating base material and a second opening part formed on a second face side of the insulating base material. The first opening part has a first opening in a first face of the insulating base material, and the second opening part has a second opening in a second face of the insulating base material. The through hole for a filling resin has a third opening at a portion where the first opening part and the second opening part cross each other. The diameter of the third opening is smaller than those of the first opening and the second opening. A resin included in an upper side interlayer resin insulation layer enters the through hole for a filling resin, and thereby the filling resin is formed.

Description

The present invention relates to a printed wiring board having a core substrate having a through-hole conductor and a buildup layer formed on the core substrate.

As shown in FIG. 6 of Patent Document 1, the manufacturing method of Patent Document 1 is directed from the upper surface to the lower surface by irradiating a laser on the upper surface of a wiring board having an upper surface and a lower surface opposite to the upper surface. A through-hole penetrating the wiring board by forming a first opening that is thin and forming a second opening that is narrowed from the bottom to the top by irradiating the lower surface of the wiring board with a laser. Forming a hole and forming a through-hole conductor on the inner wall of the through-hole. And as FIG. 4 of patent document 1 shows, the connection area | region of a 1st opening part and a 2nd opening part is filled with plating by forming a through-hole conductor. Thereby, a concave region is formed. In FIG. 4 of Patent Document 1, the concave region is indicated by R. Then, according to Fig.7 (a) of patent document 1, resin is filled into the concave area | region.

JP 2009-54689 A

According to FIG. 4 of Patent Document 1, the bottom of the concave region is closed by plating. It is considered difficult to fill such regions without containing voids. For this reason, it is considered that the reliability of the insulating layer, the conductor layer, and the via conductor formed on the concave region is lowered. Further, since the bottom is closed, it is expected that it is difficult to flatten the upper surface of the resin formed in the concave region.

An object of the present invention is to provide a printed wiring board excellent in flatness.

The printed wiring board according to the present invention has a first surface and a second surface opposite to the first surface, and has an insulating base material having a through hole for a through-hole conductor extending from the first surface to the second surface. A first conductor layer formed on the first surface of the insulating substrate, a second conductor layer formed on the second surface of the insulating substrate, and the through-hole conductor A through-hole conductor formed on the wall surface of the through-hole and connecting the first conductor layer and the second conductor layer; and the through-hole conductor extending from the first surface to the second surface of the insulating substrate. A filling resin formed in a through-hole for filling resin formed on the inner side, an upper interlayer resin insulation layer formed on the first surface of the insulating substrate and the first conductor layer, and The upper conductor layer on the upper interlayer resin insulation layer and the upper interlayer resin insulation layer penetrate through the upper interlayer resin insulation layer. An upper buildup layer formed of an upper via conductor connecting the conductor layer and the first conductor layer, and formed on the second surface of the insulating substrate and the second conductor layer. A lower interlayer resin insulation layer, a lower conductor layer on the lower interlayer resin insulation layer, and the lower interlayer resin insulation layer are penetrated to connect the lower conductor layer and the second conductor layer. And a lower buildup layer formed of the lower via conductor. The through hole for the filling resin includes a first opening formed on the first surface side of the insulating base material and a second opening formed on the second surface side of the insulating base material. The first opening has a first opening on the first surface of the insulating substrate, and the second opening has a second opening on the second surface of the insulating substrate. The through hole for the filling resin has a third opening at a portion where the first opening and the second opening intersect, and the diameter of the third opening is equal to the diameter of the first opening and the second opening. Smaller than the diameter. The filling resin is formed by the resin contained in the upper interlayer resin insulation layer entering the through hole for the filling resin.

Process drawing which shows the manufacturing method of the printed wiring board which concerns on 1st Embodiment of this invention. Process drawing which shows the manufacturing method of the printed wiring board of 1st Embodiment. Process drawing which shows the manufacturing method of the printed wiring board of 1st Embodiment. Process drawing which shows the manufacturing method of the printed wiring board of 1st Embodiment. Process drawing which shows the manufacturing method of the printed wiring board of 1st Embodiment. Sectional drawing of the printed wiring board of 1st Embodiment. The enlarged view of the through-hole conductor of the printed wiring board of 1st Embodiment. The enlarged view of the through-hole conductor of the printed wiring board of 2nd Embodiment.

[First embodiment]
A printed wiring board according to a first embodiment of the present invention will be described with reference to the cross-sectional view of FIG.
The printed wiring board 10 of the first embodiment includes a core substrate 30 having a first surface F and a second surface S opposite to the first surface, and an upper buildup layer 500F on the first surface of the core substrate. An upper solder resist layer 70F having an opening 71F formed on the upper buildup layer, an upper solder bump (C4 bump) 76F formed on the C4 pad CP exposed from the opening 71F, and the core substrate first The lower buildup layer 500S on the second surface and the lower buildup layer are formed on the lower solder resist layer 70S having the opening 71S and the BGA pad BP exposed from the opening 71S. A lower solder bump (BGA bump) 76S is provided. An IC chip is mounted on the printed wiring board 10 via the upper solder bumps 76F. The printed wiring board 10 and the mother board are connected via the lower solder bumps 76S.
The IC chip may be mounted on the printed wiring board via the solder bumps 76S, and the printed wiring board may be mounted on the mother board via the solder bumps 76F.

The core substrate 30 includes an insulating base material 20 having a first surface F and a second surface S opposite to the first surface F, and a first conductor layer 34F on the first surface of the insulating base material 20 The second conductor layer 34S on the second surface of the insulating base material and the through-hole conductor 36 that penetrates the insulating base material 20 and connects the first conductor layer 34F and the second conductor layer 34S are formed. . The first surface of the core substrate and the first surface of the insulating substrate are the same surface, and the second surface of the core substrate and the second surface of the insulating substrate are the same surface.

The upper buildup layer 500F includes an upper interlayer resin insulation layer 50F formed on the first surface F of the core substrate 30 and the first conductor layer 34F, an upper conductor layer 58F on the interlayer resin insulation layer 50F, and an interlayer resin. An upper via conductor 60F that penetrates the insulating layer 50F and connects the conductor layer 58F and the first conductor layer 34F is provided. Further, the uppermost interlayer resin insulation layer (150F) formed on the conductor layer (58F) and the upper interlayer resin insulation layer, the uppermost conductor layer (158F) on the interlayer resin insulation layer (150F), and the interlayer resin insulation layer (150F) are penetrated. And the uppermost via conductor (160F) connecting the conductor layer (58F).

The lower buildup layer 500S includes a lower interlayer resin insulation layer 50S formed on the second surface S of the core substrate 30 and the second conductor layer 34S, and a lower conductor layer 58S on the interlayer resin insulation layer 50S. And a lower via conductor 60S that penetrates the interlayer resin insulation layer 50S and connects the conductor layer 58S and the second conductor layer. Furthermore, the lowermost interlayer resin insulation layer (150S) formed on the conductor layer (58S) and the lower interlayer resin insulation layer, the lowermost conductor layer (158S) on the interlayer resin insulation layer (150S), and the interlayer resin insulation layer (150S) are penetrated. It has a lowermost via conductor (160S) connecting the conductor layer (158S) and the conductor layer (58S).

FIG. 7A is an enlarged view of the through hole, the through hole conductor, the filling resin, and the like in FIG.
The insulating substrate 20 has a through hole 28 for a through-hole conductor. In FIG. 7A, the shape of the through hole 28 is a substantially cylindrical shape. However, the shape of the through hole may be an hourglass shape. A through-hole conductor 36 made of an electroless plating film 31 and an electroplating film 33 on electroless plating is formed on the wall surface of the through hole 28. Through-hole lands 36Fr and 36Sr are formed around the through-hole conductor. The through hole land 36Fr is included in the first conductor layer and is directly connected to the through hole conductor, and the through hole land 36Sr is included in the second conductor layer and is directly connected to the through hole conductor. The through-hole lands 36Fr, 36Sr and the conductor layers 34F, 34S are composed of a metal foil (copper foil) 22S, an electroless plating film 31 on the metal foil, and an electrolytic plating film 33 on the electroless plating film.

The film thickness of the through-hole conductor is generally increased from both surfaces (first surface F, second surface S) of the insulating base toward the central portion 36a in the cross-sectional direction of the insulating base. However, the through hole 28 for the through hole conductor is not closed by the through hole conductor. That is, the through hole 360 for filling resin is formed inside the through-hole conductor. The through hole 360 for filling resin is formed by a first opening 360a formed on the first surface side of the insulating base material and a second opening 360b formed on the second surface side of the insulating base material. ing. The first opening 360a has a first opening 3600a on the first surface of the insulating base material, and the second opening has a second opening 3600b on the second surface of the insulating base material. Furthermore, the through hole for the filling resin has a third opening 3600c at a portion where the first opening and the second opening intersect, and the diameter of the third opening is smaller than the diameter of the first opening and the diameter of the second opening.

The through hole 360 for the filling resin shown in FIG. 7B has a first opening 360a that is tapered from the first surface of the insulating substrate toward the second surface and the second hole of the insulating substrate. A first opening 360b that is tapered from the surface toward the first surface is formed by being connected in the insulating base material. The shape of the through hole 360 for the filling resin shown in FIG. 7B is substantially an hourglass shape.
Filling resin is formed in the through hole 360 for filling resin. Filling resin 50 is formed of a resin derived from at least one interlayer resin insulation layer of the upper interlayer resin insulation layer and the lower interlayer resin insulation layer. The filling resin is formed by the resin contained in the upper interlayer resin insulation layer or the resin contained in the lower interlayer resin insulation layer entering the through hole for the filling resin. Preferably, the filling resin is formed by the resin contained in the upper interlayer resin insulation layer and the resin contained in the lower interlayer resin insulation layer entering the through hole for the filling resin.

The interlayer resin insulation layer is formed by heating a non-cured film (film for interlayer resin insulation layer). The uncured film contains a resin such as epoxy and inorganic particles such as silica. The uncured film preferably further contains a reinforcing material such as glass cloth. The resin and inorganic particles of the film enter the through hole for the filling resin by the heating press.
When the film for the interlayer resin insulation layer is cured, an interlayer resin insulation layer containing inorganic particles and a resin is formed. The interlayer resin insulation layer can further include a reinforcing material. When the resin derived from the film for the interlayer resin insulation layer is cured, the filling resin 50 including the resin and the inorganic particles is formed in the through hole for the filling resin.

The thermal expansion coefficient of the insulating base material 20 in the Z direction (thickness direction of the insulating base material) is 10 ppm / ° C. to 25 ppm / ° C. If the thermal expansion coefficient in the Z direction of the insulating base material is in the range indicated in this paragraph and the through hole for the filling resin has the above-mentioned shape, the thermal expansion coefficient of the filling resin and the insulating base material The crack of the interlayer resin insulation layer and the crack of the solder resist layer caused by the difference in thermal expansion coefficient are prevented. The thermal expansion coefficient in the XY direction of the insulating base material is 3 ppm / ° C. to 13 ppm / ° C. The crack of the filling resin due to the difference between the thermal expansion coefficient of the filling resin and the thermal expansion coefficient of the insulating substrate is prevented.

The thickness M1 of the insulating substrate 20 is 100 μm to 500 μm. When the thickness of the insulating substrate is less than 100 μm, the upper surface of the interlayer resin insulating layer on the through hole for filling resin tends to be convex. The reason is considered that the volume of the through hole for the filling resin is small. If the upper surface is convex, the interlayer resin insulating layer and the solder resist layer on the filling resin are pressed by the filling resin in a heat cycle. Cracks are likely to occur in them. When the thickness of the insulating substrate exceeds 500 μm, the upper surface of the interlayer resin insulating layer on the through hole for filling resin tends to be concave. The reason is considered to be that the volume of the through hole for the filling resin is large. In addition, voids easily enter the filled resin. Since the upper surface of the interlayer resin insulating layer on the through hole for filling resin is not flat, the conductor layer formed on the interlayer resin insulating layer located immediately above the through hole for filling resin is likely to break. Due to the voids in the filling resin, cracks are likely to occur in the filling resin and the interlayer resin insulation layer.

FIG. 7B shows a cross section obtained by cutting the through-hole conductor along a plane that passes through the center of the opening of the through-hole for the through-hole conductor on the first surface F and is perpendicular to the first surface F. The diameter d1 (FIG. 7A) of the through hole 28 for the through hole conductor is 70 μm to 250 μm. The diameter H1 of the first opening 3600a is 50 μm to 230 μm. The diameter H2 of the second opening 3600b is 50 μm to 230 μm. The diameter H3 of the third opening 3600c is 24 μm to 205 μm. As shown in FIG. 7B, the diameter H3 of the third opening 3600c is the same as the shortest distance between the opposing through-hole conductors. The value of H3 is larger than the diameter of the inorganic particles in the filled resin. The value of H3 is preferably at least 3 times the diameter of the inorganic particles in the filled resin. The through hole for filling resin is filled with resin without voids. In addition, the upper surface of the interlayer resin insulation layer on the through hole for filling resin becomes flat.

A value (X1) obtained by dividing H3 by H1 and a value (X2) obtained by dividing H3 by H2 are 0.1 or more and 0.5 or less. If the above-described X1 or X2 is less than 0.1, clogging of the resin is likely to occur near the third opening. Therefore, voids are generated in the filled resin. Or the unevenness | corrugation of the upper surface of the interlayer resin insulation layer on the through-hole for filling resin becomes large. Since the stress applied to the filling resin in the vicinity of the third opening is increased, cracks are likely to occur in the filling resin. When the above-mentioned X1 or X2 exceeds 0.5, the volume of the through hole for the filling resin increases. Therefore, the amount of depression on the upper surface of the interlayer resin insulation layer on the through hole for filling resin is increased. Cracks occur in the interlayer resin insulation layer and the solder resist layer located immediately above the through hole for the filling resin in the heat cycle. When X1 and X2 are in the above-mentioned range and the value of H3 is 3 times or more of the diameter of the inorganic particles (average particle diameter) in the filled resin, the inorganic particles are easily dispersed uniformly in the filled resin. Even if the through-hole conductor has a bending point, it is difficult for the filler resin to crack.

The thickness t1 of the electroless plating film 31 is 0.1 μm to 3 μm. The thickness t2 of the electrolytic plating film 33 on the first surface and the second surface of the insulating substrate is 10 μm to 25 μm. The thickness t3 of the electrolytic plating film 33 in the thickest portion 36a is 23 μm to 70 μm.

In the printed wiring board according to the first embodiment, the through hole for the filling resin has the above-described shape. Its shape is roughly the shape of an hourglass. When the volume of the through hole for filling resin is compared between the cylindrical through hole and the hourglass through hole, the latter becomes smaller. Thereby, the shrinkage | contraction amount of resin in the through-hole for filling resin by hardening becomes small. Therefore, the upper surfaces of the interlayer resin insulation layers 50F and 50S can be formed flat. Therefore, even if the conductor layers 58F and 58S on the interlayer resin insulation layer are finely formed, the reliability is hardly lowered. In addition, voids are less likely to occur in the filled resin, and cracks are less likely to occur in the interlayer resin insulation layer due to voids. A decrease in reliability can be prevented.
In the embodiment, the filling resin and the interlayer resin insulation layer are formed simultaneously. Therefore, the embodiment does not require a step of removing excess filling resin by polishing or the like. The manufacturing cost of the printed wiring board can be reduced. Since stress resulting from polishing is not stored in the printed wiring board, the reliability of the printed wiring board is increased.

A method for manufacturing the printed wiring board 10 will be described with reference to FIGS.
(1) A double-sided copper-clad laminate 20z formed of an insulating base 20 made of a reinforcing material and a resin and metal foils 22F and 22S laminated on both sides of the insulating base 20 is prepared ( FIG. 1 (A)). The insulating base material 20 has a first surface F and a second surface S opposite to the first surface. The thickness M1 of the insulating base material 20 is preferably 100 μm to 500 μm. The solder resist layer just above the filling resin does not peel off from the C4 pad or BGA pad. The thickness of the metal foil is 3 μm to 12 μm. As a starting material, 4785GS series manufactured by Sumitomo Bakelite Co., Ltd. can be used.

Examples of the reinforcing material include glass cloth, aramid fiber, and glass fiber. The glass cloth is preferably T glass (manufactured by Nittobo). Examples of the resin include an epoxy resin and a BT (bismaleimide triazine) resin. Further, the resin contains inorganic particles made of silica or the like. A blackening process is performed on the surfaces of the copper foils 22F and 22S (not shown).

(2) A through-hole 28 for a cylindrical through-hole conductor is formed in a double-sided copper-clad laminate by a drill (FIG. 1 (B)). Here, a laser can be used instead of a drill.

(3) The electroless plating film 31 is formed on the surface of the double-sided copper-clad laminate and the inner wall of the through-hole conductor through-hole 28 (FIG. 1C). The electroless plating film functions as a seed layer.

(4) A plating resist 32 is formed on the surface of the electroless plating film 31 (FIG. 2A).

(5) An electrolytic plating film 33 is formed on the electroless plating film exposed from the plating resist (FIG. 2B). In embodiments, the current flowing through the seed layer is sometimes reversed. By adopting such a method, the cross-sectional shape of the through-hole conductor 36 becomes the shape shown in FIG. 3 (A) or FIG. 7 (B). The thickness of the through-hole conductor is thick at the center of the through-hole for the through-hole conductor and thin at the end. Here, the center and the end are positions in the cross-sectional direction of the insulating base material. A through hole 360 for filling resin is formed inside the through hole conductor.

(6) The plating resist is removed. The electroless plating film 31 and the copper foils 22F and 22S between the electrolytic plating films are removed by etching. Conductive layers 34F and 34S are formed (FIG. 3A).

(7) An interlayer resin insulation layer resin film such as a prepreg is laminated on the first surface F of the core substrate 30. The resin film for interlayer resin insulation layers is formed of a resin such as epoxy and inorganic particles such as silica. Further, a reinforcing material such as a glass cloth may be included. Examples of the prepreg include 6785GS series manufactured by Sumitomo Bakelite Co., Ltd.
A hot press is applied under vacuum conditions. Resin contained in the resin film for interlayer resin insulation layers laminated on the first surface F is softened. Then, the resin containing inorganic particles oozes out from the resin film for the interlayer resin insulation layer on the first surface F into the through hole for the filling resin. The resin is filled into the through hole for the filling resin.
Subsequently, an interlayer resin insulation layer resin film such as a prepreg is laminated on the second surface S of the core substrate.

The resin film for interlayer resin insulation layers on the first surface of the core substrate and the resin film for interlayer resin insulation layers on the second surface are cured. An upper interlayer resin insulation layer is formed on the first surface of the core substrate. A lower interlayer resin insulation layer is formed on the second surface of the core substrate. Filling resin 50 is formed in the through hole for the filling resin (FIG. 3B).

Another method for forming the filling resin and the interlayer resin insulating layer is shown below.
A resin film for an interlayer resin insulation layer such as a prepreg is laminated on the first surface F of the core substrate. A hot press is applied under vacuum conditions. At this time, the pressure, the degree of vacuum, and the temperature are set low. For this reason, the through hole for filling resin is not completely filled. Part of the first opening and the second opening is filled with the resin and inorganic particles contained in the resin film for an interlayer resin insulation layer laminated on the first surface of the core substrate. It is preferable that at least half of the space of the second opening is filled with resin and inorganic particles.

Subsequently, an interlayer resin insulation layer resin film such as a prepreg is laminated on the second surface S of the core substrate. A hot press is applied under vacuum conditions. Resin contained in the resin film for interlayer resin insulation layers laminated on the second surface S is softened. Then, the resin containing inorganic particles oozes out from the resin film for the interlayer resin insulation layer on the second surface S into the second opening where the through holes for the filling resin are formed. The interlayer resin insulation layer on the second surface S of the core substrate has a through hole for filling resin in a portion not filled with resin and inorganic particles derived from the resin film for interlayer resin insulation layer on the first surface F of the core substrate. It is filled with resin and inorganic particles derived from the resin film. The through holes for the filling resin are formed in the resin and the inorganic particles contained in the resin film for interlayer resin insulation layer on the first surface F of the core substrate and the resin film for interlayer resin insulation layer on the second surface S of the core substrate. Filled with contained resin and inorganic particles.

The resin in the interlayer resin insulation layer on the first surface F, the resin film for the interlayer resin insulation layer on the second surface S, and the resin in the through hole for the filling resin are cured. An upper interlayer resin insulation layer is formed on the first surface of the core substrate. A lower interlayer resin insulation layer is formed on the second surface of the core substrate. Filling resin is formed in the through hole for filling resin.
Although the resin film for interlayer resin insulation layers on the first surface F is first laminated on the core substrate, the resin film for interlayer resin insulation layers on the second surface S may be laminated on the core substrate first. Moreover, although the resin film for interlayer resin insulation layers on the 1st surface F and the resin for interlayer resin insulation layers on the 2nd surface S are hardened | cured simultaneously, it can also be hardened | cured separately. The interlayer resin insulation layer resin film may be laminated on the second surface of the core substrate after the upper interlayer resin insulation layer is formed.
The thickness of the interlayer resin insulation layer is 20 μm to 40 μm.

In the printed wiring board manufacturing method of the first embodiment, since the through hole for filling resin has the shape of an hourglass, the amount of resin filled in the through hole for filling resin is reduced. Thereby, when the resin in the through hole for filling resin is cured by heat, the shrinkage amount of the resin can be reduced. Indentations are unlikely to form on the upper surfaces of the interlayer resin insulation layers 50F and 50S.

Moreover, the manufacturing method of the printed wiring board of 1st Embodiment does not have the process of grind | polishing filling resin. Since the polishing process is not necessary, the manufacturing cost of the printed wiring board can be reduced.

(8) Next, via conductor openings 51F and 51S are formed in the interlayer resin insulation layers 50F and 50S by a CO2 gas laser, respectively (FIG. 3C).

(9) Electroless plated films 52 and 52 are formed on the surfaces of the interlayer resin insulation layers 50F and 50S and the inner walls of the via conductor openings 51F and 51B (FIG. 3D).

(10) A plating resist 54 is provided on the electroless plating film 52 (FIG. 4A).

(11) An electrolytic plating film 56 is formed on the electroless plating film 52 exposed from the plating resist 54 (FIG. 4B).

(12) The plating resist 54 is removed. By removing the electroless plating film between the electrolytic plating films by etching, conductor layers 58F and 58S and via conductors 60F and 60S having a plurality of conductor circuits are formed (FIG. 4C).

(13) From the step shown in FIG. 3B to the step shown in FIG. 4C, the uppermost and lowermost interlayer resin insulation layers 150F are formed on the interlayer resin insulation layers 50F and 50S. , 150S is formed. The uppermost and lowermost conductor layers 158F and 158S are formed on the uppermost and lowermost interlayer resin insulation layers 150F and 150S. Uppermost and lowermost via conductors 160F and 160S are formed in the uppermost and lowermost interlayer resin insulation layers 150F and 150S. The conductor layers 58F and 58S and the conductor layers 158F and 158S are connected by the uppermost and lowermost via conductors 160F and 160S (FIG. 15A). Upper buildup layer 500F is formed on the first surface of the core substrate, and lower buildup layer 500S is formed on the second surface of the core substrate.

(13) A solder resist layer 70F having an opening 71F is formed on the upper buildup layer 500F, and a solder resist layer 70S having an opening 71S is formed on the lower buildup layer 500S (FIG. 5B). )). The conductor layers exposed from the openings 71F and 71S and the upper surfaces of the via conductors function as pads CP and BP.

(14) A nickel plating layer 72 is formed on the pad, and a gold plating layer 74 is further formed on the nickel plating layer 72 (FIG. 5C). In addition to the nickel-gold layer, a nickel-palladium-gold layer may be formed.

(15) Thereafter, solder balls such as Sn / Ag are mounted on the pads by the method disclosed in US Pat. No. 7,475,803 B2. Thereafter, solder bumps 76F and 76S are formed on the pads. The solder bump formed on the upper buildup layer pad is a C4 bump, and the solder bump formed on the lower buildup layer pad is a BGA bump (FIG. 6).

(16) An IC chip is mounted on the printed wiring board 10 via the solder bumps 76F. Thereafter, the printed wiring board of the first embodiment on which the IC chip is mounted is mounted on the mother board by reflow.

[Second Embodiment]
A printed wiring board of the second embodiment is shown in FIG.
In the printed wiring board of the second embodiment, the shape of the through-hole for the through-hole conductor is approximately an hourglass shape. Such through-holes for through-hole conductors are formed by a method disclosed in, for example, US2008 / 257591A1 or JP2003 / 46248A. Thereafter, a plating film is formed on the wall surface of the through hole by DC plating. The thickness of the plating film is substantially uniform in the thickness direction of the insulating substrate. A through-hole conductor is formed. In US2008 / 257591A1 and JP2003 / 46248A, through-holes for through-hole conductors are filled with a plating film. In the second embodiment, the thickness of the plating film is 5 μm to 15 μm. A through hole for the filling resin is formed. The subsequent steps are the same in the first embodiment and the second embodiment. The first embodiment and the second embodiment have the same effect.

20 Insulating substrate 28 Through hole 30 Core substrate 31 Electroless plating film 33 Electroplating film 34F, 34S Conductor pattern 36 Through-hole conductor 50 Filling resin 50F, 50S Interlayer resin insulation layer 58F, 58S Conductor layer 60F, 60S Via conductor

Claims (6)

An insulating substrate having a first surface and a second surface opposite to the first surface and having a through hole for a through-hole conductor extending from the first surface to the second surface;
A first conductor layer formed on the first surface of the insulating substrate;
A second conductor layer formed on the second surface of the insulating substrate;
A through-hole conductor formed on the wall surface of the through-hole for the through-hole conductor and connecting the first conductor layer and the second conductor layer;
A filling resin formed in a through hole for a filling resin that extends from the first surface to the second surface of the insulating base material and is formed inside the through-hole conductor;
An upper interlayer resin insulation layer formed on the first surface of the insulating substrate and the first conductor layer, an upper conductor layer on the upper interlayer resin insulation layer, and the upper interlayer resin insulation layer An upper buildup layer formed of an upper via conductor that passes through and connects the upper conductor layer and the first conductor layer;
The second interlayer resin insulating layer formed on the second surface of the insulating substrate and the second conductor layer, the lower conductor layer on the lower interlayer resin insulating layer, and the lower interlayer A printed wiring board having a lower buildup layer formed of a lower via conductor passing through a resin insulating layer and connecting the lower conductive layer and the second conductive layer,
The through hole for the filling resin is formed by a first opening formed on the first surface side of the insulating base material and a second opening formed on the second surface side of the insulating base material. The first opening has a first opening on the first surface of the insulating substrate, the second opening has a second opening on the second surface of the insulating substrate, and The through hole for filling resin has a third opening at a portion where the first opening and the second opening intersect, and the diameter of the third opening is larger than the diameter of the first opening and the diameter of the second opening. The filling resin is formed by a small resin contained in the upper interlayer resin insulation layer entering the through hole for the filling resin. 2. The printed wiring board according to claim 1, wherein the filling resin is formed by a resin contained in the lower interlayer resin insulating layer entering a through hole for the filling resin. It is a printed wiring board of Claim 1, Comprising: The thickness of the said insulating base material is 100 micrometers-500 micrometers, and the thermal expansion coefficient of a XY direction is 3-13 ppm / degrees C. 2. The printed wiring board according to claim 1, wherein a value obtained by dividing the diameter of the third opening by the diameter of the first opening is 0.1 or more and 0.5 or less. 2. The printed wiring board according to claim 1, wherein the upper interlayer resin insulation layer is formed of glass cloth, inorganic particles, and resin, and the filling resin is contained in the upper interlayer resin insulation layer. including. 6. The printed wiring board according to claim 5, wherein the diameter of the inorganic particles is smaller than the diameter of the third opening.

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