JP4117951B2 - Multilayer printed wiring board manufacturing method and multilayer printed wiring board - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention provides a multilayer printed wiring board in which a build-up wiring layer in which interlayer resin insulation layers and conductor layers are alternately laminated and each conductor layer is connected by a via hole is formed on a conductor circuit of a core substrate And a method for producing the multilayer printed wiring board.
[0002]
[Prior art]
In recent years, a build-up multilayer printed wiring board has attracted attention due to the demand for higher density multilayers. This multilayer printed wiring board is a multilayer wiring board in which a conductor circuit is formed on a core substrate, and an interlayer resin layer and a conductor circuit are alternately laminated on the conductor circuit.
[0003]
Here, a method for forming a conductor circuit of a core substrate constituting the multilayer printed wiring board will be described with reference to FIG. A copper clad laminate 330A having a copper foil 331 attached on both sides of the resin substrate 330 is used (step (A) in FIG. 11). First, the through-hole 332 is drilled with a drill (step (B)). Then, by depositing the plating film 333 uniformly, a through hole 336 is formed in the through hole 332 (step (C)). Then, the conductor circuit 334 is formed by performing pattern etching with respect to the copper foil 331 with which the plating film 333 was formed (process (D)). Further, after forming the interlayer resin insulation layer 350 on the conductor circuit 134, the conductor circuit 358 is disposed by plating (step (E)).
[0004]
[Problems to be solved by the invention]
However, in the above-described method for manufacturing a multilayer printed wiring board, the conductor circuit 334 having a small diameter cannot be formed on the core substrate 330. That is, even if the thickness of the copper foil 331 is thin, it is 18 μm, and since the thickness of the plating film 333 formed thereon is 15 μm, the total thickness becomes 33 μm, and when etching is performed, the step (D) of FIG. As described above, the side portion of the conductor circuit 334 can be undercut and easily peeled, so that the conductor circuit could not be formed finely.
[0005]
Furthermore, the conductor circuit 358 on the interlayer resin insulation layer 350 shown in the step (E) is formed to a thickness of about 15 μm. On the other hand, since the conductor circuit 334 on the core substrate 330 is formed to have a thickness of 33 μm, the impedance differs greatly between the conductor circuit 358 on the interlayer resin insulation layer 150 and the conductor circuit 334 on the core substrate 330. As a result, it is difficult to achieve impedance matching, and high frequency characteristics cannot be improved.
[0006]
The present invention has been made in order to solve the above-mentioned problems unique to the build-up multilayer wiring board, and the object thereof is a multilayer printed wiring board having excellent high-frequency characteristics and a method for producing the multilayer printed wiring board Is to propose.
[0007]
[Means for Solving the Problems]
  Hereinafter, the present invention will be described in detail. Unless otherwise specified, the thicknesses of the copper foil, conductor layer, and conductor circuit are average thicknesses, and the thickness is measured from an optical micrograph and an electron micrograph of the cross section.
  In order to solve the problems mentioned above, the claims1Includes at least the following steps (1) to (5):A method for producing a multilayer printed wiring board comprising:
(1) A step of thinning the copper foil of the copper clad laminate by etching,
(2) a step of drilling a through hole in the copper clad laminate;
(3) forming a through hole in the through hole by forming a plating film on the copper clad laminate;
(4) forming a conductor circuit by pattern etching the copper foil and the plating film on the surface of the copper-clad laminate,
(5) Step of alternately laminating an interlayer resin insulation layer and a conductor layer on the upper surface of the conductor circuitWith
By thinning the copper foil by etching, the thickness of the conductor circuit composed of the copper foil and the plating film is adjusted in a range not exceeding 10 μm than the thickness of the conductor layer on the interlayer resin insulation layer. Technical features.
[0008]
  In order to solve the above-mentioned problems, claim 2IsA method for producing a multilayer printed wiring board comprising at least the following steps (1) to (7):Because:
(1) A step of thinning the copper foil of the copper clad laminate by etching,
(2) a step of drilling a through hole in the copper clad laminate;
(3) forming a conductor film on the copper-clad laminate,
(4) a step of forming a resist on the conductor circuit and the through hole non-forming portion;
(5) A step of forming a conductive film and a through hole by forming a plating film on the non-resist forming portion,
(6) A step of removing the resist and removing the conductive film and the copper foil under the resist by etching,
(7) Step of alternately laminating an interlayer resin insulation layer and a conductor layer on the upper surface of the conductor circuitWith
By thinning the copper foil by etching, the thickness of the conductor circuit composed of the copper foil and the plating film is adjusted in a range not exceeding 10 μm than the thickness of the conductor layer on the interlayer resin insulation layer. Technical features.
[0009]
According to a third aspect of the present invention, in the first or second aspect of the present invention, a laser is used in the step of forming a through hole in the copper-clad laminate.
[0010]
Further, a fourth aspect of the present invention is characterized in that, in the first or second aspect, a drill is used in the step of forming a through hole in the copper-clad laminate.
[0011]
A fifth aspect of the present invention is characterized in that, in the first to third aspects, in the step of thinning the copper foil of the copper-clad laminate by etching, the copper foil is 1 to 10 μm, preferably 2 to 7 μm.
[0012]
  In the multilayer printed wiring board according to claim 6, the build-up wiring layer in which the interlayer resin insulation layers and the conductor layers are alternately laminated, and the conductor layers are connected by via holes,With through holeCore substrateConsists of copper foil and plating film thinned by etchingIn the multilayer printed wiring board formed on the conductor circuit,
  On the core substrateConsists of copper foil and plating filmThe thickness of the conductor circuit,By etching copper foilThe technical feature is that the thickness of the conductor layer on the interlayer resin insulation layer is not more than 10 μm, preferably not more than 7 μm.
[0015]
In the manufacturing method of the multilayer printed wiring board of Claim 1, the copper foil of a copper clad laminated board is made thin by an etching. Thereafter, plating is performed to form a through hole. At this time, a plating film is formed on the copper foil. Then, the copper foil on which the plating film is formed is subjected to pattern etching to create a conductor circuit. However, since the copper foil is thinned in advance, the thickness of the copper foil and the plating film forming the conductor circuit is reduced. It becomes possible to form a fine circuit by pattern etching.
Furthermore, an interlayer resin insulation layer and a conductor layer are alternately laminated on the copper clad laminate on which the conductor circuit is formed, but the thickness of the copper foil and the plating film forming the conductor circuit is reduced, and the interlayer Since the thickness of the resin insulation layer is not significantly different from that of the conductor layer, the impedance of the conductor circuit on the core substrate and the conductor layer on the interlayer resin insulation layer can be matched. Can be improved.
[0016]
In the manufacturing method of the multilayer printed wiring board of Claim 2, the copper foil of a copper clad laminated board is thinned by an etching. After the conductor film is uniformly formed, the resist non-formed portion is plated to create a conductor circuit, and then the resist is removed and the conductor film and the copper foil under the resist are removed by etching. Since the copper foil is thinned in advance at the time of this etching, the thickness of the conductor film and the copper foil added becomes thin, and a fine circuit can be formed.
Furthermore, an interlayer resin insulation layer and a conductor layer are alternately laminated on the copper clad laminate on which the conductor circuit is formed, but the thickness of the copper foil and the plating film forming the conductor circuit is reduced, and the interlayer Since the thickness of the resin insulation layer is not significantly different from that of the conductor layer, the impedance of the conductor circuit on the core substrate and the conductor layer on the interlayer resin insulation layer can be matched. Can be improved.
[0017]
According to a third aspect of the present invention, in the step of forming a through hole in the copper clad laminate, the through hole is formed by a laser. Here, since the copper foil is thinned by etching in advance, it is possible to suppress the propagation of the copper foil due to the heat of the laser light and to easily make the through hole with the laser light.
[0018]
According to the fourth aspect, since the through hole is formed by the drill, the through hole can be easily formed in the copper-clad laminate.
[0019]
In claim 5, in the step of thinning the copper foil of the copper clad laminate by etching, the thickness of the copper foil and the plating film to form a conductor circuit is reduced in order to make the copper foil 1 to 10 μm, A fine circuit can be formed by pattern etching. Moreover, since the difference in thickness between the conductor circuit on the core substrate and the conductor layer on the interlayer resin insulation layer can be reduced, the impedances of both can be matched.
[0020]
The optimal copper foil is 2 to 7 μm. In general, a resin filler is filled between the conductor circuits formed on the surface of the core substrate and flattened, and then an interlayer resin insulating layer is formed. This is because the surface of the interlayer resin insulation layer can be planarized only by the leveling performance.
The core substrate may be provided with a through hole. In the present invention, since the difference between the thickness of the through-hole conductor and the thickness of the conductor circuit of the interlayer resin insulation layer is reduced, impedance matching between the two is easy.
[0021]
  Claim6In the multilayer printed wiring board, the thickness of the conductor circuit on the core substrate is not made more than 10 μm thicker than the thickness of the conductor layer on the interlayer resin insulation layer. That is, since the thickness is not significantly different from the conductor layer of the interlayer resin insulation layer, the impedance of the conductor circuit on the core substrate and the conductor layer on the interlayer resin insulation layer can be matched. High frequency characteristics can be improved.
[0022]
It is desirable that the thickness of the conductor circuit on the core substrate does not exceed 7 μm than the thickness on the interlayer resin insulation layer. When the thickness of the conductor circuit on the core substrate and the thickness on the interlayer resin insulation layer are significantly different, stress is generated by the heat cycle, causing cracks in the interlayer resin insulation layer.
[0023]
  Claim1, 2The multilayer printed wiring board is manufactured by thinning the copper foil of the copper clad laminate by etching, patterning the copper foil of the copper clad laminate to form a conductor circuit, and then forming an interlayer on the upper surface of the conductor circuit. A method for producing a multilayer printed wiring board in which resin insulation layers and conductor layers are alternately laminated,
  The thickness of the conductor circuit on the core substrate is adjusted in a range not exceeding 10 μm than the thickness on the interlayer resin insulation layer.
  With this manufacturing method, formation of a fine pattern and impedance matching can be achieved simultaneously.
  By the way, JP-A-2-22887 discloses a method of manufacturing a book copper foil-clad circuit board by etching a copper foil by 25 to 90%, but in this publication, a build-up multilayer wiring board is manufactured. This is not described or suggested, and the problem of impedance matching between the conductor circuit of the core substrate and the conductor layer on the interlayer resin insulation layer is not recognized at all as in the present invention, which is different from the present invention. It is an invention.
[0024]
As the copper clad laminate used in the present invention, a laminate obtained by attaching a copper foil to a resin prepreg such as a glass cloth epoxy resin, a glass cloth bismaleimide-triazine resin, a glass cloth fluororesin can be used. As the copper-clad laminate, a double-sided copper-clad laminate or a single-sided copper-clad laminate can be used, and a double-sided copper-clad laminate is particularly suitable.
[0025]
The thickness of the copper foil is adjusted by etching. Specifically, physical etching such as chemical etching or ion beam etching using an aqueous solution of sulfuric acid-hydrogen peroxide, ammonium persulfate, cupric chloride, or ferric chloride is performed.
In the present invention, the etching rate is preferably 0.01 to 0.3 μm. This is because if the etching rate is too high, it is difficult to adjust the thickness and the variation in thickness increases, and if it is too slow, it is not practical.
As for etching temperature, 20-80 degreeC is desirable. Etching may be performed by spraying or dipping.
The thickness variation of the copper foil thinned by etching is optimally ± 1.0 μm or less.
The thickness of the copper clad laminate is preferably 0.5 to 1.0 mm. This is because if the thickness is too thick, drilling cannot be performed, and if the thickness is too thin, warping is likely to occur.
In the present invention, a laser used for forming a through hole is 20 to 40 mJ, 10^-Four-10^-8A carbon dioxide laser of a short pulse laser of 2 seconds is desirable. The number of shots is 5 to 100 shots.
[0026]
Even when a through hole is formed by metallizing the inner wall surface of the through hole by electroplating, electroless plating, sputtering, vapor deposition, or the like, the through hole can be filled with a filler.
[0027]
Moreover, the metalized through-hole inner wall may be roughened.
When the inner wall of the through hole is metallized, the thickness of the copper foil and the metallized layer (for example, electroless plating layer) is preferably 10 to 30 μm.
As the filler, various materials such as bisphenol F-type epoxy resin and inorganic particles such as silica and alumina, and metal particles and resin can be used.
[0028]
A conductor circuit is provided on the through hole forming substrate thus formed. The conductor circuit is formed by etching.
The surface of the conductor circuit is preferably roughened to improve adhesion.
Next, an interlayer resin insulating layer made of an insulating resin is provided.
[0029]
As the insulating resin for forming the interlayer resin insulating layer, a thermosetting resin, a thermoplastic resin, or a composite resin thereof is used.
As the thermosetting resin, an epoxy resin, a phenol resin, a polyimide resin, or the like is used. Moreover, as a thermoplastic resin, as a thermoplastic resin, polyether sulfone (PES), polysulfone (PSF), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenyl ether (PPE), polyetherimide (PI) ), Fluororesin and the like can be used.
[0030]
In the present invention, the interlayer resin insulating layer may be an electroless plating adhesive.
For example, a particle that dissolves with an acid or an oxidizing agent is included in a heat-resistant resin that is hardly soluble in an acid or an oxidizing agent, and the surface of the insulating resin layer is roughened by dissolving the particles with an acid or an oxidizing agent can do.
Examples of such heat-resistant resin particles include amino resins (melamine resins, urea resins, guanamine resins, etc.), epoxy resins (bisphenol-type epoxy resins cured with an amine curing agent), bismaleimide-triazine resins, etc. Can be used.
[0031]
In addition, such an electroless plating adhesive may contain, in particular, cured heat-resistant resin particles, inorganic particles, fibrous fillers, and the like as necessary.
Such heat-resistant resin particles include (1) heat-resistant resin powder having an average particle diameter of 10 μm or less, (2) agglomerated particles obtained by aggregating heat-resistant resin powder having an average particle diameter of 2 μm or less, and (3) average particle diameter. Is a mixture of a heat-resistant resin powder having an average particle diameter of less than 2 μm and (4) an average particle diameter of 2 μm or less on the surface of the heat-resistant resin powder having an average particle diameter of 2-10 μm (5) heat-resistant resin powder having an average particle diameter of more than 0.8 and less than 2.0 μm and heat-resistant resin having an average particle diameter of 0.1 to 0.8 μm It is desirable to use a mixture with powder and (6) at least one particle selected from the group consisting of heat-resistant resin powder having an average particle diameter of 0.1 to 1.0 μm. This is because these particles form a more complicated roughened surface.
[0032]
Such an interlayer resin insulation layer can be provided with openings by laser light, exposure, or development.
[0033]
Next, a catalyst for electroless plating such as a Pd catalyst is applied, the inside of the via hole opening is plated to provide a via hole, and a conductor circuit is provided on the surface of the insulating resin layer. An electroless plating film is formed on the inner wall of the opening and the entire surface of the insulating resin layer, and after providing a plating resist, electroplating is performed to remove the plating resist, and a conductor circuit is formed by etching.
[0034]
【Example】
Hereinafter, the present invention will be described based on examples.
First, the configuration of the multilayer printed wiring board 10 according to the embodiment of the present invention will be described with reference to FIG. In the multilayer printed wiring board 10, conductor circuits 34, 34 are formed on the front and back surfaces of the core substrate 30, and build-up wiring layers 80 </ b> A, 80 </ b> B are formed on the conductor circuits 34, 34. The built-up layers 80A and 80B include an interlayer resin insulation layer 50 in which via holes 60 and conductor circuits 58 are formed, and an interlayer resin insulation layer 150 in which via holes 160 and conductor circuits 158 are formed.
[0035]
On the upper surface side of the multilayer printed wiring board 10, solder bumps 76U for connection to IC chip lands (not shown) are disposed. The solder bump 76U is connected to the through hole 36 via the via hole 160 and the via hole 60. On the other hand, solder bumps 76D for connecting to lands (not shown) of the daughter board are disposed on the lower surface side. The solder bump 76D is connected to the through hole 36 via the via hole 160 and the via hole 60.
[0036]
In the multilayer printed wiring board 10 of the first embodiment, the conductor circuit 34 on the core substrate 30 is formed to a thickness (t1) of 18 μm, and the conductor layers 58 and 158 (t2) on the interlayer resin insulation layers 50 and 150 are formed. Is formed to be 18 μm, and the thickness of the conductor circuit 34 is not significantly different from that of the conductor layers 58 and 158. Therefore, the conductor circuit 34 on the core substrate 30 and the conductor layers 58 and 158 on the interlayer resin insulation layer Impedance can be matched and good high frequency characteristics are achieved.
[0037]
Next, a method for manufacturing the multilayer printed wiring board 10 will be described. Here, first, the A.M. used for the method of manufacturing the multilayer printed wiring board of the first embodiment is explained. B. Adhesive for electroless plating, Interlayer resin insulation, C.I. Resin filler, D.I. The composition of the solder resist composition will be described.
[0038]
A. Raw material composition for preparing electroless plating adhesive (upper layer adhesive)
[Resin composition (1)]
35 parts by weight of resin solution prepared by dissolving 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku, molecular weight 2500) in DMDG at a concentration of 80 wt%, photosensitive monomer (Aronix M315, manufactured by Toagosei Co., Ltd.) 3.15 weight Part, 0.5 part by weight of antifoaming agent (manufactured by San Nopco, S-65) and 3.6 parts by weight of NMP were obtained by stirring and mixing.
[0039]
[Resin composition (2)]
After mixing 12 parts by weight of polyethersulfone (PES), 7.2 parts by weight of epoxy resin particles (manufactured by Sanyo Kasei, polymer pole) with an average particle size of 1.0 μm, and 3.09 parts by weight with an average particle size of 0.5 μm Further, 30 parts by weight of NMP was added and obtained by stirring and mixing with a bead mill.
[0040]
[Curing agent composition (3)]
Imidazole curing agent (Shikoku Chemicals, 2E4MZ-CN) 2 parts by weight, Photoinitiator (Ciba Geigy, Irgacure I-907) 2 parts, Photosensitizer (Nippon Kayaku, DETX-S) 0.2 parts by weight, It was obtained by stirring and mixing 1.5 parts by weight of NMP.
[0041]
B. Raw material composition for preparing interlayer resin insulation (adhesive for lower layer)
[Resin composition (1)]
35 parts by weight of a resin solution prepared by dissolving 25% acrylate of cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight 2500) in DMDG at a concentration of 80 wt%, photosensitive resin (Aronix M315, manufactured by Toagosei Co., Ltd.) Part, 0.5 part by weight of antifoaming agent (manufactured by San Nopco, S-65) and 3.6 parts by weight of NMP were obtained by stirring and mixing.
[0042]
[Resin composition (2)]
After mixing 12 parts by weight of polyethersulfone (PES) and 14.49 parts by weight of epoxy resin particles (Sanyo Kasei, polymer pole) with an average particle size of 0.5 μm, add 30 parts by weight of NMP and stir in a bead mill. Obtained by mixing.
[0043]
[Curing agent composition (3)]
Imidazole curing agent (Shikoku Chemicals, 2E4MZ-CN) 2 parts by weight, Photoinitiator (Ciba Geigy, Irgacure I-907) 2 parts, Photosensitizer (Nippon Kayaku, DETX-S) 0.2 parts by weight, It was obtained by stirring and mixing 1.5 parts by weight of NMP.
[0044]
C. Adjustment of resin filler
(1) Bisphenol F type epoxy monomer (Oilized shell: molecular weight 310, trade name YL983U) SiO with an average particle size of 1.6μm and SiO coated with silane coupling agent on the surface₂Spherical particles [manufactured by Admatech: CRS 1101-CE, where the maximum particle size is not more than the thickness (15 μm) of the inner layer copper pattern described later. 170 parts by weight and 1.5 parts by weight of a leveling agent (manufactured by San Nopco: trade name Perenol S4) were kneaded with three rolls, and the viscosity of the mixture was adjusted to 45,000 to 49,000 cps at 23 ± 1 ° C.
[0045]
(2) 6.5 parts by weight of imidazole curing agent (product name: 2E4MZ-CN, manufactured by Shikoku Kasei)
(3) Mixtures (1) and (2) were mixed to prepare a resin filler.
[0046]
D. Adjustment of solder resist
46.67g of photosensitizing oligomer (molecular weight 4000) obtained by acrylating 50% of epoxy group of 60% by weight of cresol novolak type epoxy resin (manufactured by Nippon Kayaku) dissolved in DMDG, 80% by weight dissolved in methyl ethyl ketone 15.0 g of bisphenol A type epoxy resin (manufactured by Yuka Shell, Epicoat 1001), 1.6 g of imidazole curing agent (manufactured by Shikoku Chemicals, 2E4MZ-CN), polyvalent acrylic monomer (Nippon Kayaku Co., Ltd., R604) 3 g, 1.5 g of a polyacrylic monomer (Kyoeisha Chemical Co., DPE6A) and 0.71 g of a dispersion antifoam (Sanopco Co., S-65) were mixed, and benzophenone (photoinitiator) was added to this mixture. 2 g of Kanto Chemical Co., Ltd.) and 0.2 g of Michler's ketone (manufactured by Kanto Chemical Co., Ltd.) as a photosensitizer were added to adjust the viscosity to 2.0 Pa · s at 25 ° C. Obtained.
[0047]
Manufacture of printed wiring boards
(1) A copper clad laminate 30A (Mitsubishi Gas Chemical HL830) in which a 12 μm copper foil 31 is laminated on both surfaces of a substrate 30 made of a glass epoxy resin having a thickness of 0.8 mm was used as a starting material (step of FIG. 1). (A)). The thickness of the copper foils 31 on both sides was adjusted to 3 μm using an etching solution (Mitsubishi Gas Chemical SE-07) (step (B)).
[0048]
(2) A through-hole 32 was drilled in the substrate 30 using a φ0.3 mm drill (step (C)). Then, the wall surface of the through-hole 32 was desmeared with potassium permanganate.
[0049]
(3) After the catalyst treatment is performed on the entire surface of the substrate 30, an electroless plating film 35 is formed to a thickness of 0.1 μm, and then an electric current is passed through the electroless plating film 35 to reduce the electrolytic copper plating to 1 A / dm.²Then, a 15 μm-thick plating film 33 was formed (step (D)). As a result, a through hole 36 was formed in the through hole 32.
[0050]
(4) A dry film resist (Asahi Chemical AQ4059: not shown) is attached to the surface of the copper foil 31 on which the plating film 33 is formed, and a pattern is formed with L / S = 50/50 μm. After etching with copper, the resist circuit is peeled off with 2% NaOH to form the conductor circuit 34 (step (E)).
[0051]
In this embodiment, since the copper foil 31 is thinned by etching in advance, the thickness of the copper foil 31 and the plating film 33 forming the conductor circuit 34 is reduced, and the conductor circuit 34 is finely formed by the above-described pattern etching. Can be formed.
[0052]
Next, roughened surfaces 38 were provided on the surface of the conductor circuit (inner layer copper pattern) 34, the surface of the land 36a of the through hole 36, and the inner wall, respectively (FIG. 2 (F)). The roughened surface 38 is obtained by washing the substrate 30 with water and drying it, and spraying an etching solution on both surfaces of the substrate by spraying to etch the surface of the conductor circuit 34, the surface of the land 36a of the through hole 36, and the inner wall. Formed by. The etching solution used was a mixture of 10 parts by weight of imidazole copper (II) complex, 7 parts by weight of glycolic acid, 5 parts by weight of potassium chloride, and 78 parts by weight of ion-exchanged water.
[0053]
(5) Next, the resin layer 40 was provided between the conductor circuits 34 of the wiring board and in the through holes 36 (step (G)). The resin layer 40 is prepared by applying the above-mentioned resin filler C prepared on both sides of the wiring board with a roll coater, filling between the conductor circuits and in the through holes, 100 ° C. for 1 hour, 120 ° C. for 3 hours. It was cured by heating at 150 ° C. for 1 hour and 180 ° C. for 7 hours, respectively.
[0054]
(6) One side of the substrate 30 obtained by the processing of (5) was subjected to belt sander polishing. In this polishing, # 600 belt polishing paper (manufactured by Sankyo Rikagaku) was used so that the resin filler 40 did not remain on the roughened surface 38 of the conductor circuit 34 or the land 36a surface of the through hole 36 (step (H)). ). Next, buffing was performed to remove scratches caused by this belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate.
[0055]
In the obtained wiring board 30, the resin layer 40 is provided between the conductor circuits 34, and the resin layer 40 is provided in the through hole 36. The roughened surface 38 of the conductor circuit 34 and the roughened surface of the land 36a surface of the through hole 36 are removed, and both surfaces of the substrate are smoothed by a resin filler. The resin layer 40 is in close contact with the roughened surface 38 on the side surface of the conductor circuit 34 or the roughened surface 38 on the side surface of the land portion 36a of the through hole 36, and the resin layer is in close contact with the roughened surface of the inner wall of the through hole.
[0056]
(7) Further, the exposed conductor circuit 34 and the upper surface of the land 36a of the through hole 36 were roughened by etching (a roughened surface 42 having a depth of 3 μm was formed (step (I)).
[0057]
The roughened surface 42 was subjected to tin substitution plating to provide a Sn layer (not shown) having a thickness of 0.3 μm. In the displacement plating, the roughened surface was subjected to a Cu—Sn substitution reaction under the conditions of tin borofluoride 0.1 mol / L, thiourea 1.0 mol / L, temperature 50 ° C., pH = 1.2.
[0058]
(8) On both surfaces of the obtained wiring board 30, the interlayer resin insulation (for lower layer) 44 having a viscosity of 1.5 Pa · s obtained in B is applied with a roll coater within 24 hours after preparation, and in a horizontal state After standing for 20 minutes, drying (prebaking) for 30 minutes at 60 ° C., and then within 24 hours after preparing the photosensitive adhesive solution (for upper layer) 46 having a viscosity of 7 Pa · s obtained in A above And then left for 20 minutes in a horizontal state, followed by drying (prebaking) at 60 ° C. for 30 minutes to form an adhesive layer 50α having a thickness of 35 μm (step (J) in FIG. 3).
[0059]
(9) A photomask film (not shown) on which a black circle of 85 μmφ (not shown) is printed is adhered to both surfaces of the substrate 30 on which the adhesive layer is formed in the above (8), and 500 mJ / cm by an ultrahigh pressure mercury lamp.² And exposed. This is spray-developed with a DMTG solution, and the substrate 30 is further 3000 mJ / cm with an ultra-high pressure mercury lamp.² Exposure to 100 ° C. for 1 hour, 120 ° C. for 1 hour, and then 150 ° C. for 3 hours (post-bake), resulting in a 85 μmφ aperture (via via) with excellent dimensional accuracy equivalent to that of a photomask film. An interlayer resin insulation layer (two-layer structure) 50 having a thickness of 35 μm and having a hole forming opening 48 was formed (step (K)). Note that a tin plating layer (not shown) was partially exposed in the opening 48 serving as a via hole.
[0060]
(10) The obtained substrate 30 was immersed in chromic acid for 1 minute to dissolve and remove the epoxy resin particles present on the surface of the adhesive layer 50. By this treatment, a roughened surface was formed on the surface of the adhesive layer 50. Thereafter, the obtained substrate 30 was immersed in a neutralization solution (manufactured by Shipley Co., Ltd.) and washed with water (step (L)).
[0061]
Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the wiring board 30, catalyst nuclei were attached to the surface of the electroless plating film 44 and the roughened surface of the via hole opening 48.
[0062]
(11) The obtained substrate 30 was immersed in an electroless copper plating bath under the following conditions to form an electroless copper plating film 52 having a thickness of 1.6 μm on the entire substrate 30 (step (M)).
Electroless plating solution;
EDTA: 150 g / L
Copper sulfate: 20 g / L
HCHO: 30 mL / L
NaOH: 40 g / L
α, α'-bipyridyl: 80 mg / L
PEG: 0.1 g / L
Electroless plating conditions;
30 minutes at a liquid temperature of 70 ° C
[0063]
(12) Next, a commercially available photosensitive dry film (not shown) was attached to the electroless copper plating film 52, and a mask film (not shown) on which a pattern was printed was placed. This substrate 30 is 100 mJ / cm²And then developed with 0.8% sodium carbonate to provide a plating resist 54 having a thickness of 15 μm (step (N) in FIG. 4).
[0064]
(13) Next, electrolytic copper plating was performed on the obtained substrate under the following conditions to form an electrolytic copper plating film 56 having a thickness of 15 μm (step (O)).
Electrolytic plating solution;
Sulfuric acid: 180 g / L
Copper sulfate: 80 g / L
Additive: 1mL / L
(The additive is manufactured by Atotech Japan: trade name Kaparaside GL)
Electrolytic plating conditions;
Current density: 1 A / dm²
Time: 30 minutes
Temperature: Room temperature
[0065]
(14) After removing the plating resist 54 with 5% KOH, etching is performed with a mixed solution of sulfuric acid and hydrogen peroxide to dissolve and remove the electroless plating film 52 under the plating resist, and the electroless plating 52 and the electrolytic copper plating film A conductor circuit 58 and a via hole 60 having a thickness of 18 μm (10 to 30 μm) made of 56 were obtained (step (P)).
[0066]
Further, the surface of the adhesive layer 50 for electroless plating between the conductor circuits 58 was etched by 1 μm at 70 ° C. for 3 minutes in 80 g / L chromic acid, and the palladium catalyst on the surface was removed.
[0067]
(15) The same treatment as in (7) was performed to form a roughened surface 62 made of Cu—Ni—P on the surfaces of the conductor circuit 58 and the via hole 60, and further Sn substitution was performed on the surface (FIG. 5). Step (Q)).
[0068]
(16) By repeating the steps (8) to (14), an upper interlayer resin insulation layer 160, a via hole 160, and a conductor circuit 158 are formed. Further, a roughened layer 162 is formed on the surface of the via hole 160 and the conductor circuit 158 to complete a multilayer printed wiring board (step (R)). In the step of forming the upper conductor circuit, Sn substitution was not performed.
[0069]
(17) Then, solder bumps are formed on the multilayer printed wiring board described above. On the both surfaces of the substrate 30 obtained in (16) above, The solder resist composition described in 1 is applied at a thickness of 45 μm. Next, after drying at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, a photomask film (not shown) having a thickness of 5 mm on which a circular pattern (mask pattern) is drawn is placed in close contact. , 1000mJ / cm²Exposed to UV light and developed with DMTG. Further, heat treatment was performed at 80 ° C. for 1 hour, 100 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours to open (open the via holes and their land portions). A solder resist layer (thickness 20 μm) 70 having a diameter (200 μm) 71 is formed (step (S)).
[0070]
(18) Next, nickel chloride 2.31 × 10^-1mol / l, sodium hypophosphite 2.8 × 10^-1mol / l, sodium citrate 1.85 × 10^-1The substrate 30 was immersed in an electroless nickel plating solution having a pH of 4.5 and consisting of mol / l for 20 minutes to form a nickel plating layer 72 having a thickness of 5 μm in the opening 71. Furthermore, the substrate is made of potassium gold cyanide 4.1 × 10^-2mol / l, ammonium chloride 1.87 × 10^-1mol / l, sodium citrate 1.16 × 10^-1mol / l, sodium hypophosphite 1.7 × 10^-1By immersing in an electroless gold plating solution of mol / l at 80 ° C. for 7 minutes and 20 seconds to form a 0.03 μm thick gold plating layer 74 on the nickel plating layer 72, via holes 160 and conductors Solder pads 75 are formed on the circuit 158 (step (T) in FIG. 6).
[0071]
(19) Then, solder bumps (solder bodies) 76U and 76D are formed by printing solder paste on the opening 71 of the solder resist layer 70 and reflowing at 200 ° C., and the multilayer printed wiring board 10 is formed. (Refer process (U)).
[0072]
Manufacturing method of multilayer printed wiring board of second embodiment
Next, a method for manufacturing a multilayer printed wiring board according to the second embodiment of the present invention will be described with reference to FIG.
(1) In the second embodiment, an FR-5 substrate (Matsushita Electric R5715S) is used as the double-sided copper-clad laminate 30A (step (A) in FIG. 8). First, the thickness of the copper foils 31 on both sides was adjusted to 3 μm using an etching solution (Mitsubishi Gas Chemical SE-07) (step (B)).
[0073]
(2) A through-hole 32 was drilled in the substrate 30 using a φ0.3 mm drill (step (C)). Then, the wall surface of the through-hole 32 was desmeared with potassium permanganate.
[0074]
(3) After the catalyst treatment is performed on the entire surface of the substrate 30, the electroless plating film 35 is formed to a thickness of 0.1 μm, and then a channel of L / S = 30/30 μm is used with a dry film resist (NIT225) manufactured by Nichigo Morton. A pattern (plating resist) 92 is formed (step (D)).
[0075]
(4) Using the electroless plating film 35 as a power feeding portion, a 15 μm electrolytic plating film 33 and a 3 μm solder plating film 94 are formed in the resist non-forming portion (step (E)).
[0076]
(5) After removing the resist 92 with 2% NaOH, the electroless plating film 35 and the copper foil 31 under the resist 92 are etched with a cupric chloride solution to form the conductor circuit 34, and then the solder The solder plating film 94 is removed with a stripping solution (step (F)). The following steps are the same as those in the first embodiment described above with reference to FIGS.
[0077]
In the second embodiment, the copper foil 31 of the double-sided copper-clad laminate is thinned in advance by etching. For this reason, when removing the conductor film (electroless plating film) 35 and the copper foil 31 under the resist 92 by etching, the copper foil 31 is thinned in advance, so that the conductor film 35 and the copper foil 31 are added. The thickness is reduced, and a fine circuit can be formed.
[0078]
Manufacturing method of multilayer printed wiring board of third embodiment
Subsequently, the manufacturing process of the multilayer printed wiring board of the third embodiment will be described with reference to FIG.
(1) FR-5 copper-clad laminate 30A (Hitachi Chemical Industries EA697) in which a 12 μm copper foil 31 is laminated on both surfaces of a substrate 30 made of glass epoxy resin having a thickness of 0.8 mm was used as a starting material ( Step (A) in FIG. The thickness of the copper foils 31 on both sides was adjusted to 3 μm using an etching solution (Mitsubishi Gas Chemical SE-07) (step (B)).
[0079]
(2) For this substrate 30, a carbon dioxide laser (Mitsubishi Electric ML605GTL) is used for this copper-clad laminate 30A, 30 mJ, 52 × 10.^-6The laser was irradiated under the condition of 15 shots under a second pulse condition to provide a through hole 32 having a diameter of 100 μm (step (C)). Then, the wall surface of the through-hole 32 was desmeared with potassium permanganate.
[0080]
(3) After the catalyst treatment is performed on the entire surface of the substrate 30, an electroless plating is formed to a thickness of 0.1 μm, and then an electric current is passed through the electroless plating to reduce the electrolytic copper plating to 1 A / dm.²Then, a 15 μm-thick plating film 33 was formed (step (D)). As a result, a through hole 36 was formed in the through hole 32.
[0081]
(4) A dry film resist (Asahi Chemical AQ4059) (not shown) is attached to the surface of the copper foil 31 on which the plating film 33 is formed, and a pattern is formed with L / S = 50/50 μm. Then, the resist circuit was peeled off with 2% NaOH to form a conductor circuit 34 (step (E)). The following steps are the same as those in the first embodiment described above with reference to FIGS.
[0082]
In the third embodiment, since the copper foil 31 is thinned in advance by etching, the thickness obtained by adding the copper foil 31 and the plating film 33 forming the conductor circuit 34 is thin, and the fine conductor circuit 34 is formed by the pattern etching described above. Can be formed.
[0083]
In the first and second embodiments, the through hole is drilled with a drill, but it is possible to drill the through hole with a laser as in the third embodiment. In the above-described embodiment, the conductor circuit 34 on the core substrate 30 is formed, and then the resin 40 is applied to smooth the substrate surface. However, in this embodiment, the thickness of the conductor circuit 34 is reduced. A flat multilayer printed wiring board can be formed without performing such a smoothing process.
[0084]
Manufacturing method of multilayer printed wiring board of fourth embodiment
The manufacturing process of the multilayer printed wiring board in a present Example is demonstrated with reference to FIG. Basically, it is the same as in the first embodiment, but after forming the conductor circuit 34 and the through hole 36 as shown in (A), the resin filler only in the through hole 36 as shown in (B). 40 was filled. The through hole 36 was filled by using a printing mask (not shown) in which an opening was provided in a portion corresponding to the through hole. Next, the surface is polished as shown in (C), and a roughened layer 42 made of Cu-Ni-P is formed on the surface of the conductor circuit as shown in (D).
[0085]
The method for forming the roughened layer is as follows. That is, the substrate is degreased and soft etched, and then treated with a catalyst solution comprising palladium chloride and an organic acid to give a Pd catalyst. After activating this catalyst, copper sulfate 3.2 × 10^-2mol / l, nickel sulfate 2.4 × 10^-9mol / l, citric acid 5.2 × 10^-2mol / l, sodium hypophosphite 2.7 × 10^-1mol / l, boric acid 5.0 × 10^-1The substrate is immersed in an electroless copper plating bath having a pH of 9 consisting of 1.0 g / l of an aqueous solution of mol / l and a surfactant (manufactured by Nissin Chemical Industry Co., Ltd., Surfinol 465). A roughened layer made of a needle-like alloy made of Cu—Ni—P was provided on the nickel layer on the surface of the land of the copper conductor circuit 4 and the through hole 9 by vibrating in the vertical direction at a turn rate.
Furthermore, Sn substitution was performed in the same manner as in Example 1.
[0086]
Thereafter, interlayer resin insulation layers 44 and 46 are provided as shown in FIG. Since the conductor circuit 34 of the core substrate is thin, it is possible to planarize the surface of the interlayer resin insulation layer without filling the resin between the conductor circuits.
[0087]
【The invention's effect】
As described above, in the present invention, since the copper foil is thinned in advance, a fine circuit can be formed. Furthermore, since the conductor circuit on the core substrate does not differ greatly in thickness from the conductor layer on the interlayer resin insulation layer, the impedance of the conductor circuit on the core substrate and the conductor layer on the interlayer resin insulation layer are matched. Therefore, the high frequency characteristics of the multilayer printed wiring board can be improved.
In addition, the surface of the interlayer resin insulation layer can be planarized without filling the resin between the conductor circuits.
[Brief description of the drawings]
FIG. 1 is a manufacturing process diagram of a multilayer printed wiring board according to a first embodiment of the present invention.
FIG. 2 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 3 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 4 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 5 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 6 is a manufacturing process diagram of the multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 7 is a cross-sectional view of a multilayer printed wiring board according to the first embodiment of the present invention.
FIG. 8 is a manufacturing process diagram of a multilayer printed wiring board according to a second embodiment of the present invention.
FIG. 9 is a manufacturing process diagram of the multilayer printed wiring board according to the third embodiment of the present invention.
FIG. 10 is a manufacturing process diagram of the multilayer printed wiring board according to the fourth embodiment of the present invention.
FIG. 11 is a manufacturing diagram of a multilayer printed wiring board according to the prior art.
[Explanation of symbols]
30A Double-sided copper-clad laminate
30 core substrate
31 Copper foil
32 through holes
33 Plating film
34 Conductor circuit
35 Electroless plating film (conductor film)
36 Through hole
50 Interlayer resin insulation layer
58 Conductor circuit (conductor layer)
60 Bahia Hall
80A, 80B Build-up wiring layer
92 resist
150 Interlayer resin insulation layer
158 Conductor circuit

Claims (6)

The following (1) to (5) a step of a method of making at least including a multilayer printed circuit board:
(1) a step of thinning the copper foil of the copper clad laminate by etching;
(2) a step of drilling a through hole in the copper clad laminate;
(3) forming a through hole in the through hole by forming a plating film on the copper clad laminate;
(4) forming a conductor circuit by pattern etching the copper foil and the plating film on the surface of the copper-clad laminate;
(5) comprising a step of alternately laminating an interlayer resin insulation layer and a conductor layer on the upper surface of the conductor circuit ;
By thinning the copper foil by etching, the thickness of the conductor circuit composed of the copper foil and the plating film is adjusted in a range not exceeding 10 μm than the thickness of the conductor layer on the interlayer resin insulation layer. A manufacturing method of a multilayer printed wiring board characterized by The following (1) to (7) a step of a method of making at least including a multilayer printed circuit board:
(1) a step of thinning the copper foil of the copper clad laminate by etching;
(2) a step of drilling a through hole in the copper clad laminate;
(3) forming a conductor film on the copper-clad laminate,
(4) a step of forming a resist on the conductor circuit and the through hole non-forming portion;
(5) A step of forming a conductive film and a through hole by forming a plating film on the non-resist forming portion,
(6) A step of removing the resist and removing the conductive film and the copper foil under the resist by etching,
(7) comprising a step of alternately laminating an interlayer resin insulation layer and a conductor layer on the upper surface of the conductor circuit ;
By thinning the copper foil by etching, the thickness of the conductor circuit composed of the copper foil and the plating film is adjusted in a range not exceeding 10 μm than the thickness of the conductor layer on the interlayer resin insulation layer. A manufacturing method of a multilayer printed wiring board characterized by   3. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein a laser is used in the step of drilling through holes in the copper-clad laminate.   The method for manufacturing a multilayer printed wiring board according to claim 1 or 2, wherein a drill is used in the step of drilling through holes in the copper-clad laminate.   5. The method for producing a multilayer printed wiring board according to claim 1, wherein in the step of thinning the copper foil of the copper-clad laminate by etching, the copper foil is 1 to 10 μm. An interlayer resin insulation layer and a conductor layer are alternately laminated, and a build-up wiring layer in which each conductor layer is connected by a via hole is made of a copper foil and a plating film that are thinned by etching a core substrate having a through hole. In the multilayer printed wiring board formed on the conductor circuit,
The multilayer printed wiring, wherein the thickness of the conductor circuit comprising the copper foil and the plating film on the core substrate is not increased by more than 10 μm by etching of the copper foil than the thickness of the conductor layer on the interlayer resin insulation layer Board.

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