JP2008098225A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2008098225A
JP2008098225A JP2006274897A JP2006274897A JP2008098225A JP 2008098225 A JP2008098225 A JP 2008098225A JP 2006274897 A JP2006274897 A JP 2006274897A JP 2006274897 A JP2006274897 A JP 2006274897A JP 2008098225 A JP2008098225 A JP 2008098225A
Authority
JP
Japan
Prior art keywords
bonding pad
region
slit
slit via
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006274897A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008098225A5 (https=
Inventor
Osamu Nakauchi
修 中内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Priority to JP2006274897A priority Critical patent/JP2008098225A/ja
Priority to US11/869,025 priority patent/US20080083923A1/en
Publication of JP2008098225A publication Critical patent/JP2008098225A/ja
Publication of JP2008098225A5 publication Critical patent/JP2008098225A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/27—Structural arrangements therefor
    • H10P74/273—Interconnections for measuring or testing, e.g. probe pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H10W72/9232—Bond pads having multiple stacked layers with additional elements interposed between layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP2006274897A 2006-10-06 2006-10-06 半導体装置 Pending JP2008098225A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006274897A JP2008098225A (ja) 2006-10-06 2006-10-06 半導体装置
US11/869,025 US20080083923A1 (en) 2006-10-06 2007-10-09 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006274897A JP2008098225A (ja) 2006-10-06 2006-10-06 半導体装置

Publications (2)

Publication Number Publication Date
JP2008098225A true JP2008098225A (ja) 2008-04-24
JP2008098225A5 JP2008098225A5 (https=) 2008-07-03

Family

ID=39274351

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006274897A Pending JP2008098225A (ja) 2006-10-06 2006-10-06 半導体装置

Country Status (2)

Country Link
US (1) US20080083923A1 (https=)
JP (1) JP2008098225A (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010206141A (ja) * 2009-03-06 2010-09-16 Fujitsu Semiconductor Ltd 半導体装置
JP2016195221A (ja) * 2015-04-01 2016-11-17 住友電工デバイス・イノベーション株式会社 半導体装置及び半導体装置の測定方法
JP2017005100A (ja) * 2015-06-10 2017-01-05 三菱電機株式会社 半導体チップ、半導体装置およびそれらの製造方法
JP2023035453A (ja) * 2021-09-01 2023-03-13 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009259967A (ja) * 2008-04-15 2009-11-05 Nec Corp 配線構造、半導体装置及び半導体装置の製造方法
IT1400096B1 (it) 2010-05-12 2013-05-17 St Microelectronics Srl Processo di fabbricazione di circuiti elettronici integrati e circuiti cosi' ottenuti

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005251832A (ja) * 2004-03-02 2005-09-15 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2005252230A (ja) * 2004-02-05 2005-09-15 Matsushita Electric Ind Co Ltd 半導体装置
JP2005251831A (ja) * 2004-03-02 2005-09-15 Matsushita Electric Ind Co Ltd 半導体素子電極パッド構造
JP2005286266A (ja) * 2004-03-31 2005-10-13 Nec Electronics Corp 半導体装置およびその検査方法と製造方法
JP2006165515A (ja) * 2004-11-11 2006-06-22 Denso Corp 半導体装置およびその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10000759C1 (de) * 2000-01-11 2001-05-23 Infineon Technologies Ag Verfahren zur Erzeugung von Justiermarken
JP2001338955A (ja) * 2000-05-29 2001-12-07 Texas Instr Japan Ltd 半導体装置及びその製造方法
US6784556B2 (en) * 2002-04-19 2004-08-31 Kulicke & Soffa Investments, Inc. Design of interconnection pads with separated probing and wire bonding regions

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005252230A (ja) * 2004-02-05 2005-09-15 Matsushita Electric Ind Co Ltd 半導体装置
JP2005251832A (ja) * 2004-03-02 2005-09-15 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2005251831A (ja) * 2004-03-02 2005-09-15 Matsushita Electric Ind Co Ltd 半導体素子電極パッド構造
JP2005286266A (ja) * 2004-03-31 2005-10-13 Nec Electronics Corp 半導体装置およびその検査方法と製造方法
JP2006165515A (ja) * 2004-11-11 2006-06-22 Denso Corp 半導体装置およびその製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010206141A (ja) * 2009-03-06 2010-09-16 Fujitsu Semiconductor Ltd 半導体装置
US8330190B2 (en) 2009-03-06 2012-12-11 Fujitsu Semiconductor Limited Semiconductor device
JP2016195221A (ja) * 2015-04-01 2016-11-17 住友電工デバイス・イノベーション株式会社 半導体装置及び半導体装置の測定方法
JP2017005100A (ja) * 2015-06-10 2017-01-05 三菱電機株式会社 半導体チップ、半導体装置およびそれらの製造方法
JP2023035453A (ja) * 2021-09-01 2023-03-13 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP7680913B2 (ja) 2021-09-01 2025-05-21 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US20080083923A1 (en) 2008-04-10

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