JP2008091561A - Wiring substrate and electronic device - Google Patents

Wiring substrate and electronic device Download PDF

Info

Publication number
JP2008091561A
JP2008091561A JP2006269809A JP2006269809A JP2008091561A JP 2008091561 A JP2008091561 A JP 2008091561A JP 2006269809 A JP2006269809 A JP 2006269809A JP 2006269809 A JP2006269809 A JP 2006269809A JP 2008091561 A JP2008091561 A JP 2008091561A
Authority
JP
Japan
Prior art keywords
face
electronic component
electrodes
electrode
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2006269809A
Other languages
Japanese (ja)
Other versions
JP4791313B2 (en
Inventor
Akihiko Funahashi
明彦 舟橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2006269809A priority Critical patent/JP4791313B2/en
Publication of JP2008091561A publication Critical patent/JP2008091561A/en
Application granted granted Critical
Publication of JP4791313B2 publication Critical patent/JP4791313B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • H01L2924/15155Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
    • H01L2924/15156Side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15158Shape the die mounting substrate being other than a cuboid
    • H01L2924/15159Side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device capable of rigidly connecting electronic component to the end surface thereof and ensuring high reliability. <P>SOLUTION: When there is no region projected more than end electrodes 2a, 2b between end electrodes and the electronic component 5 is mounted on the end surface 11 of an insulating substrate 1, the electrode of electronic component 5 can be abutted against the end electrodes 2a, 2b of a wiring substrate. In the wiring substrate provided with the electrodes 2a, 2b for mounting the electronic component 5 on the end surface 11 of the insulating substrate 1, a plurality of electrodes 2a, 2b are provided on one end surface 11 while a recess 3 is provided between the electrode 2a and the electrode 2b. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、電子部品を搭載するための配線基板および電子装置に関するものである。   The present invention relates to a wiring board and an electronic device for mounting electronic components.

従来、半導体素子や水晶振動子等の電子部品を搭載するための配線基板は、例えば、酸化アルミニウム質焼結体等の電気絶縁材料から成る絶縁基体の表面に、タングステンやモリブデン等の金属粉末メタライズから成る配線導体が配設されることにより形成されている。そして、この配線基板は、上面に電子部品を搭載して蓋体やポッティング樹脂により封止して電子装置として形成される。   Conventionally, wiring boards for mounting electronic components such as semiconductor elements and crystal resonators are made of metal powder metallization such as tungsten or molybdenum on the surface of an insulating base made of an electrically insulating material such as an aluminum oxide sintered body. It is formed by arranging a wiring conductor made of The wiring board is formed as an electronic device by mounting electronic components on the top surface and sealing with a lid or potting resin.

また、近年は、配線基板に多数の電子部品を搭載することが求められてきており、合わせて電子装置の小型化が求められてきている。そこで、配線基板における電子部品の実装領域を広くするため、配線基板の側面に電極パッドを形成し、この電極パッドと電子部品の電極とを導電性接着剤により電気的に接続させて配線基板の側面に電子部品を搭載するという構成が提案されている。このような配線基板は、側面に一対の電極パッドがそれぞれ形成された上層と下層とを中間層の上面と下面とに積層することにより形成することができる(特許文献1参照)。   In recent years, it has been required to mount a large number of electronic components on a wiring board, and in addition, downsizing of electronic devices has been required. Therefore, in order to widen the mounting area of the electronic component on the wiring board, an electrode pad is formed on the side surface of the wiring board, and the electrode pad and the electrode of the electronic component are electrically connected by a conductive adhesive to A configuration in which an electronic component is mounted on the side surface has been proposed. Such a wiring board can be formed by laminating an upper layer and a lower layer each having a pair of electrode pads formed on the side surfaces on the upper surface and the lower surface of the intermediate layer (see Patent Document 1).

特開2001―111380号公報Japanese Patent Laid-Open No. 2001-111380

しかしながら、特許文献1記載の配線基板は、中間層と上層と下層とのセラミックスを積層することにより形成されるため、中間層と上層と下層とのそれぞれに積層ずれを発生することがある。中間層が上層および下層の側面よりも大きく突出して積層ずれが発生すると、電子部品は中間層の側面に搭載されるので、上層と下層とに形成された電極パッドと電子部品との距離が大きく離れてしまい、導電性接着剤により接合される電子部品と電極パッドとの接合強度にばらつきが発生し、極端な場合には電極パッドと電子部品とを強固に接合させることができないという問題点を有していた。   However, since the wiring board described in Patent Document 1 is formed by laminating ceramics of an intermediate layer, an upper layer, and a lower layer, a misalignment may occur in each of the intermediate layer, the upper layer, and the lower layer. If the intermediate layer protrudes larger than the upper and lower side surfaces and misalignment occurs, the electronic component is mounted on the side surface of the intermediate layer, so the distance between the electrode pad formed on the upper and lower layers and the electronic component is large. The problem is that the bonding strength between the electronic component and the electrode pad to be bonded by the conductive adhesive varies, and in an extreme case, the electrode pad and the electronic component cannot be firmly bonded. Had.

本発明は、上記従来技術の問題点に鑑み案出されたもので、その目的は、電子部品を絶縁基板の端面に強固に接合させることができる配線基板を提供することにある。また、本発明の目的は、信頼性の高い電子装置を提供することにある。   The present invention has been devised in view of the above-described problems of the prior art, and an object thereof is to provide a wiring board capable of firmly bonding an electronic component to an end face of an insulating substrate. Another object of the present invention is to provide a highly reliable electronic device.

本発明の配線基板は、絶縁基板の端面に電子部品を実装するための端面電極が設けられた配線基板において、前記端面電極は1つの端面に複数設けられ、前記端面電極と前記端面電極との間には凹部が設けられることを特徴とするものである。   The wiring board of the present invention is a wiring board in which an end face electrode for mounting an electronic component is provided on an end face of an insulating board, wherein a plurality of the end face electrodes are provided on one end face, and the end face electrode and the end face electrode A recess is provided between them.

また、好ましくは、配線基板は、前記端面電極を挟んで前記凹部とは反対側に、凸部が設けられることを特徴とするものである。   Preferably, the wiring board is provided with a convex portion on a side opposite to the concave portion across the end face electrode.

また、好ましくは、前記凹部は厚み方向に複数配列しており、平面視で重なり合わないように設けられることを特徴とするものである。   Preferably, a plurality of the recesses are arranged in the thickness direction so as not to overlap with each other in plan view.

また、好ましくは、前記絶縁基板は複数の絶縁層を含み、前記端面電極が設けられる少なくとも2層の絶縁層は、前記端面電極が設けられない絶縁層を間に積層し、前記端面電極が設けられない絶縁層は、前記端面電極が設けられる絶縁層よりも外形が小さいことを特徴とするものである。   Preferably, the insulating substrate includes a plurality of insulating layers, and at least two insulating layers provided with the end face electrodes are laminated with an insulating layer not provided with the end face electrodes, and the end face electrodes are provided. The insulating layer that is not formed has a smaller outer shape than the insulating layer provided with the end face electrode.

本発明の電子装置は、本発明の配線基板の端面に電子部品が搭載され、該電子部品は、前記凹部を跨ぐように前記端面電極に電気的に接続されることを特徴とするものである。   The electronic device of the present invention is characterized in that an electronic component is mounted on the end face of the wiring board of the present invention, and the electronic component is electrically connected to the end face electrode so as to straddle the recess. .

本発明の配線基板は、絶縁基板の端面に電子部品を実装するための端面電極が設けられた配線基板において、端面電極は1つの端面に複数設けられ、端面電極と端面電極との間には凹部が設けられることから、端面電極と端面電極との間に凹部を配設させた状態で電子部品の電極と配線基板の端面電極とを接合させるので、端面電極間に端面電極よりも突出した領域がなくなる、即ち電極が、電極間に位置する絶縁基板の端面よりも突出することとなり、電子部品を絶縁基板の端面に搭載した際、電子部品の電極を配線基板の端面電極に当接させることができ、電子部品と配線基板とを強固に接合させることができる。   The wiring board of the present invention is a wiring board in which an end face electrode for mounting an electronic component is provided on an end face of an insulating board, and a plurality of end face electrodes are provided on one end face, and between the end face electrode and the end face electrode. Since the concave portion is provided, the electrode of the electronic component and the end surface electrode of the wiring board are joined in a state where the concave portion is disposed between the end surface electrode and the end surface electrode. The area disappears, that is, the electrode protrudes from the end face of the insulating substrate located between the electrodes, and when the electronic component is mounted on the end face of the insulating substrate, the electrode of the electronic component is brought into contact with the end face electrode of the wiring board. It is possible to firmly bond the electronic component and the wiring board.

また、好ましくは、端面電極を挟んで凹部とは反対側に、凸部が設けられることから、凸部により絶縁基板の端面に電子部品を収納させる収納領域を形成することができるので、電子部品を絶縁基板の端面に精度良く搭載させて電子部品の電極と配線基板の端面電極とを接合させることができ、電子部品と配線基板とを強固に接合させることができる。   Preferably, since the convex portion is provided on the opposite side of the concave portion across the end surface electrode, the convex portion can form a storage area for storing the electronic component on the end surface of the insulating substrate. Can be mounted on the end face of the insulating substrate with high accuracy, and the electrode of the electronic component and the end face electrode of the wiring board can be joined, and the electronic component and the wiring board can be firmly joined.

また、好ましくは、凹部は厚み方向に複数配列しており、平面視で重なり合わないように設けられることから、絶縁基板の厚み方向に圧力を印加した際、凹部の周囲領域に圧力を良好に印加することができるので、凹部の周囲領域における密着不良等を低減することができるとともに、複数の凹部間に位置する領域が周囲より圧縮されて変形してしまうことを抑制することができる。これにより、凹部の形状を良好なものとし、端面電極と端面電極との間隔を所定の寸法に良好に形成することができるので、電子部品と配線基板とを強固に接合することができる。   Preferably, a plurality of recesses are arranged in the thickness direction and are provided so as not to overlap in a plan view. Therefore, when pressure is applied in the thickness direction of the insulating substrate, the pressure is favorably applied to the peripheral region of the recesses. Since it can be applied, it is possible to reduce poor adhesion and the like in the peripheral region of the recess, and it is possible to suppress the region located between the plurality of recesses from being compressed and deformed from the periphery. As a result, the shape of the recess can be made favorable, and the distance between the end face electrode and the end face electrode can be favorably formed to a predetermined dimension, so that the electronic component and the wiring board can be firmly bonded.

また、好ましくは、絶縁基板は複数の絶縁層を含み、端面電極が設けられる少なくとも2層の絶縁層は、端面電極が設けられない絶縁層を間に積層し、端面電極が設けられない絶縁層は、端面電極が設けられる絶縁層よりも外形が小さいことから、複数の絶縁層を積層して絶縁基板とした際、端面電極が設けられる絶縁層と端面電極が設けられない絶縁層の外形差により凹部を形成することができるので、精度良く、かつ効率良く端面電極と端面電極との間に凹部を形成することができる。これにより、端面電極間に端面電極よりも突出した領域がなくなり、電子部品を絶縁基板の端面に搭載した際、電子部品の電極を配線基板の端面電極に当接させることができ、電子部品と配線基板とを強固に接合させることができる。   Preferably, the insulating substrate includes a plurality of insulating layers, and at least two insulating layers provided with the end face electrodes are stacked with an insulating layer provided with no end face electrodes, and no end face electrodes are provided. Since the outer shape is smaller than the insulating layer provided with the end face electrode, when an insulating substrate is formed by stacking a plurality of insulating layers, the outer shape difference between the insulating layer provided with the end face electrode and the insulating layer provided with no end face electrode is Therefore, the recess can be formed between the end face electrode and the end face electrode with high accuracy and efficiency. Thereby, there is no region protruding from the end face electrode between the end face electrodes, and when the electronic component is mounted on the end face of the insulating substrate, the electrode of the electronic component can be brought into contact with the end face electrode of the wiring board. The wiring board can be firmly bonded.

本発明の電子装置は、本発明の配線基板の端面に電子部品が搭載され、電子部品は、凹部を跨ぐように端面電極に電気的に接続されることから、電子部品の電極と配線基板の端面電極とを良好に接合することができるので、信頼性に優れた電子装置とすることができる。   In the electronic device of the present invention, an electronic component is mounted on the end surface of the wiring board of the present invention, and the electronic component is electrically connected to the end surface electrode so as to straddle the concave portion. Since the end face electrode can be satisfactorily bonded, an electronic device having excellent reliability can be obtained.

本発明の配線基板について説明する。図1は、本発明の実施の形態である配線基板を示す平面図であり、図2は、図1における配線基板の切断面線A−A’における断面図である。これらの図に示すように、配線基板は、絶縁基板1、端面電極2a、2b、凹部3、配線導体4を含み、端面に電子部品5が実装可能となっている。   The wiring board of the present invention will be described. FIG. 1 is a plan view showing a wiring board according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line A-A 'of the wiring board in FIG. As shown in these drawings, the wiring board includes an insulating substrate 1, end surface electrodes 2a and 2b, a recess 3, and a wiring conductor 4, and an electronic component 5 can be mounted on the end surface.

本発明の配線基板は、絶縁基板1の端面11に電子部品5を実装するための端面電極2a,2bが設けられており、端面電極2a,2bは1つの端面11に複数設けられ、端面電極2aと端面電極2bとの間には凹部3が設けられている。   The wiring board of the present invention is provided with end face electrodes 2a and 2b for mounting the electronic component 5 on the end face 11 of the insulating substrate 1, and a plurality of end face electrodes 2a and 2b are provided on one end face 11, A recess 3 is provided between 2a and the end face electrode 2b.

絶縁基板1は、セラミックス等からなり、例えば、セラミックスから成る場合、酸化アルミニウム質焼結体、ムライト質焼結体、窒化アルミニウム質焼結体、炭化珪素質焼結体等の電気絶縁材料から成る。絶縁基板1が、酸化アルミニウム質焼結体から成る場合には、アルミナ(Al)、シリカ(SiO)、カルシア(CaO)、マグネシア(MgO)等の原料粉末に適当な有機溶剤、溶媒を添加混合して泥漿状となすとともにこれを従来周知のドクターブレード法やカレンダーロール法等を採用し、シート状に成形することによってセラミックグリーンシート(セラミック生シート)を得、次にセラミックグリーンシートに適当な打ち抜き加工を施すとともに必要に応じて複数枚積層し、高温(約1500〜1800℃)で焼成することによって製作される。 The insulating substrate 1 is made of ceramics or the like. For example, when made of ceramics, the insulating substrate 1 is made of an electrical insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, or a silicon carbide sintered body. . When the insulating substrate 1 is made of an aluminum oxide sintered body, an organic solvent suitable for a raw material powder such as alumina (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO), magnesia (MgO), A solvent is added and mixed to make a mud-like shape, and a ceramic green sheet (ceramic green sheet) is obtained by forming the sheet into a sheet shape by using a conventionally known doctor blade method or calendar roll method. The sheet is manufactured by performing an appropriate punching process, stacking a plurality of sheets as necessary, and firing at a high temperature (about 1500 to 1800 ° C.).

端面電極2a,2bは、絶縁基板1の端面11に複数設けられており、絶縁基板1の端面11に搭載される電子部品5の電極に接合するための接合領域であるとともに、電子部品5を外部回路基板等に電気的に接続するための導電路として機能し、後述する配線導体4のいくつかに電気的に接続される。端面電極2a,2bは、タングステンやモリブデン、銅、銀等の金属粉末メタライズからなり、スクリーン印刷法等の印刷手段を用いて、絶縁基板1用のセラミックグリーンシートの端面11の所定の位置に端面電極2a,2b用のメタライズペーストを印刷塗布し、絶縁基板1用のセラミックグリーンシートと同時焼成することによって絶縁基板1の端面11に形成することができる。メタライズペーストは、主成分の金属粉末に有機バインダー、有機溶剤、必要に応じて分散剤等を加えてボールミル、三本ロールミル、プラネタリーミキサー等の混練手段により混合および混練することで製作される。セラミックグリーンシートの焼結挙動に合わせたり、焼結後の絶縁基板との接合強度を高めたりするためにガラスやセラミックスの粉末を添加しても良い。   A plurality of end surface electrodes 2 a and 2 b are provided on the end surface 11 of the insulating substrate 1, which is a bonding region for bonding to the electrode of the electronic component 5 mounted on the end surface 11 of the insulating substrate 1, and the electronic component 5 is attached to the end surface 11. It functions as a conductive path for electrical connection to an external circuit board or the like, and is electrically connected to some of the wiring conductors 4 described later. The end surface electrodes 2a and 2b are made of metal powder metallization such as tungsten, molybdenum, copper, silver, and the like, and the end surface is formed at a predetermined position on the end surface 11 of the ceramic green sheet for the insulating substrate 1 by using printing means such as a screen printing method. The metallized paste for the electrodes 2 a and 2 b can be printed and applied, and simultaneously fired with the ceramic green sheet for the insulating substrate 1, so that it can be formed on the end surface 11 of the insulating substrate 1. The metallized paste is manufactured by adding an organic binder, an organic solvent, and a dispersant as necessary to a main component metal powder, and mixing and kneading them by a kneading means such as a ball mill, a three-roll mill, or a planetary mixer. Glass or ceramic powder may be added to match the sintering behavior of the ceramic green sheet or to increase the bonding strength with the insulating substrate after sintering.

また、絶縁基板1用のセラミックグリーンシートに金型やパンチングによる打ち抜き方法またはレーザ加工等の加工方法により端面電極2a,2b用の貫通孔を形成し、この端面電極2a,2b用の貫通孔に端面電極2a,2b用のメタライズペーストをスクリーン印刷法等の印刷手段により充填しておく。切断加工等によりこの端面電極2a,2b用のメタライズペーストを厚み方向に分割して端面電極2a,2b用のメタライズペーストが絶縁基板1用のセラミックグリーンシートの端面に露出するようにした後、絶縁基板1用のセラミックグリーンシートと同時焼成することにより端面電極2a,2bを絶縁基板1の端面11に形成しても良い。この場合、端面電極2a,2bが絶縁基板1の内部に埋設した状態とすることができ、絶縁基板1と端面電極2a,2bとの接合強度を良好なものとすることができる。なお、端面電極2a,2b用の貫通孔に充填する場合は、端面電極2a,2b用のメタライズペーストは、有機バインダーや有機溶剤の量により充填に適した粘度に調製される。   Further, through holes for the end face electrodes 2a and 2b are formed in the ceramic green sheet for the insulating substrate 1 by a die or punching method by punching or a processing method such as laser processing, and the through holes for the end face electrodes 2a and 2b are formed. The metallized paste for the end face electrodes 2a and 2b is filled by a printing means such as a screen printing method. The metallized paste for the end face electrodes 2a, 2b is divided in the thickness direction by cutting or the like so that the metallized paste for the end face electrodes 2a, 2b is exposed on the end face of the ceramic green sheet for the insulating substrate 1, and then insulated. The end face electrodes 2 a and 2 b may be formed on the end face 11 of the insulating substrate 1 by simultaneous firing with the ceramic green sheet for the substrate 1. In this case, the end surface electrodes 2a and 2b can be embedded in the insulating substrate 1, and the bonding strength between the insulating substrate 1 and the end surface electrodes 2a and 2b can be improved. When filling the through holes for the end face electrodes 2a and 2b, the metallized paste for the end face electrodes 2a and 2b is prepared to have a viscosity suitable for filling depending on the amount of the organic binder and the organic solvent.

なお、端面電極2a,2bの幅(絶縁基板1の幅方向における長さ)や長さ(絶縁基板1の厚み方向における長さ)は、端面電極2a,2bに接合する電子部品5の形状に合わせて適宜選択すれば良い。また、後述する電子部品5に接合する部分の端面電極2aと端面電極2bとは、凹部3を挟んで対になるものであって、同形状の幅および長さに形成しておくことが好ましい。   Note that the width (length in the width direction of the insulating substrate 1) and the length (length in the thickness direction of the insulating substrate 1) and the length (length in the thickness direction of the insulating substrate 1) of the end surface electrodes 2a and 2b are the same as the shape of the electronic component 5 bonded to the end surface electrodes 2a and 2b. What is necessary is just to select suitably collectively. Further, the end face electrode 2a and the end face electrode 2b, which are to be joined to the electronic component 5 to be described later, are paired with the recess 3 in between, and are preferably formed to have the same width and length. .

また、絶縁基板1には、配線導体4が被着形成されている。配線導体4は、配線基板に搭載される電子部品5や第2の電子部品を外部回路基板に電気的に接続するための導電路として機能し、そのいくつかは端面電極2a,2bに電気的に接続されている。配線導体4は、タングステンやモリブデン、銅、銀等の金属粉末メタライズからなり、スクリーン印刷法等の印刷手段を用いて、絶縁基板1用のセラミックグリーンシートの所定の位置に配線導体4用のメタライズペーストを印刷塗布し、絶縁基板1用のセラミックグリーンシートと同時焼成することによって配線基板の所定の位置に形成することができる。配線導体4用のメタライズペーストは、端面電極2a,2b用のメタライズペーストと同様にして作製されるが、有機バインダーや有機溶剤の量により印刷に適した粘度に調製される。   A wiring conductor 4 is deposited on the insulating substrate 1. The wiring conductor 4 functions as a conductive path for electrically connecting the electronic component 5 and the second electronic component mounted on the wiring board to the external circuit board, and some of them are electrically connected to the end face electrodes 2a and 2b. It is connected to the. The wiring conductor 4 is made of metal powder metallization such as tungsten, molybdenum, copper, silver, and the like. The metallization for the wiring conductor 4 is formed at a predetermined position of the ceramic green sheet for the insulating substrate 1 by using a printing means such as a screen printing method. The paste can be printed and applied and simultaneously fired with the ceramic green sheet for the insulating substrate 1 to be formed at a predetermined position on the wiring board. The metallized paste for the wiring conductor 4 is produced in the same manner as the metallized paste for the end face electrodes 2a and 2b, but is prepared to have a viscosity suitable for printing depending on the amount of the organic binder or organic solvent.

また、配線導体4は、配線基板を貫通する貫通導体としても形成される。このような貫通導体は、上面および下面、内部等に形成された配線導体4を形成するためのメタライズペーストの印刷塗布に先立って絶縁基板1用のセラミックグリーンシートに金型やパンチングによる打ち抜き方法またはレーザ加工法等の加工方法により貫通導体用の貫通孔を形成し、この貫通導体用の貫通孔にメタライズペーストをスクリーン印刷法等の印刷手段により充填しておくとともに、これを絶縁基板1用のセラミックグリーンシートと同時焼成することによって形成される。貫通導体用のメタライズペーストは、端面電極2a,2bや上面および下面、内部等に形成された配線導体4用のメタライズペーストと同様にして作製されるが、有機バインダーや有機溶剤の量により充填に適した粘度に調製される。   The wiring conductor 4 is also formed as a through conductor that penetrates the wiring board. Such a through conductor is formed by punching a ceramic green sheet for the insulating substrate 1 by a die or punching prior to printing and applying a metallized paste for forming the wiring conductor 4 formed on the upper surface, the lower surface, and the inside. A through hole for a through conductor is formed by a processing method such as a laser processing method, and a metallized paste is filled in the through hole for the through conductor by a printing means such as a screen printing method. It is formed by cofiring with a ceramic green sheet. The metallized paste for the through conductor is produced in the same manner as the metallized paste for the wiring conductor 4 formed on the end face electrodes 2a and 2b, the upper and lower surfaces, the inside, etc., but can be filled by the amount of organic binder or organic solvent. Prepared to a suitable viscosity.

なお、端面電極2a,2bおよび配線導体4の露出する表面には、ニッケルや金等の耐蝕性に優れる金属を被着しておくことが好ましい。なお、端面電極2a,2bおよび配線導体4が酸化腐食するのを防止するとともに、電子部品5と端面電極2a,2bまたは配線導体4との接合、配線基板と外部回路基板との接合を強固なものとするために、厚みが1〜10μm程度のニッケルめっき層と厚みが0.1〜3μm程度の金めっき層とが順次被着されていることが好ましい。   In addition, it is preferable to deposit a metal having excellent corrosion resistance, such as nickel or gold, on the exposed surfaces of the end face electrodes 2a and 2b and the wiring conductor 4. The end face electrodes 2a, 2b and the wiring conductor 4 are prevented from being oxidatively corroded, and the bonding between the electronic component 5 and the end face electrodes 2a, 2b or the wiring conductor 4 and the bonding between the wiring board and the external circuit board are strengthened. In order to achieve this, it is preferable that a nickel plating layer having a thickness of about 1 to 10 μm and a gold plating layer having a thickness of about 0.1 to 3 μm are sequentially deposited.

そして、端面電極2aと端面電極2bとの間には凹部3が設けられている。この構成により、端面電極2aと端面電極2bとの間に凹部3を配設させた状態で電子部品5の電極と配線基板の端面電極2a,2bとを接合させるので、端面電極2a,2b間に端面電極2a,2bよりも突出した領域がなくなる、即ち電極が、電極間に位置する絶縁基板の端面よりも突出することとなり、電子部品5を絶縁基板1の端面11に搭載した際、電子部品5の電極と配線基板の端面電極2a,2bに当接させることができ、電子部品5と配線基板とを強固に接合させることができる。   And the recessed part 3 is provided between the end surface electrode 2a and the end surface electrode 2b. With this configuration, the electrode of the electronic component 5 and the end face electrodes 2a and 2b of the wiring board are joined in a state where the recess 3 is disposed between the end face electrode 2a and the end face electrode 2b. When the electronic component 5 is mounted on the end surface 11 of the insulating substrate 1, there is no region protruding from the end surface electrodes 2 a and 2 b, that is, the electrode protrudes from the end surface of the insulating substrate positioned between the electrodes. The electrode of the component 5 and the end face electrodes 2a and 2b of the wiring board can be brought into contact with each other, and the electronic component 5 and the wiring board can be firmly bonded.

例えば、図2に示すような絶縁基板1が絶縁層1a,1b,1cの3層からなる場合、凹部3は、端面電極2a,2bが形成される領域の周囲領域における絶縁層1bの外形を絶縁層1a,1cの外形よりも小さくしておけば形成可能である。なお、ここでいう外形を小さくするとは、端面電極2a,2bが形成される端面11側において、中間層にあたる絶縁層1bの外形を、絶縁層1a,1cの外形より小さくすることを示すものである。例えば、図3に図2の配線基板における絶縁層1a,1b,1cのそれぞれの分解平面図を示す。絶縁層1bの、積層時に絶縁層1aの端面電極2aと、絶縁層1cの端面電極2bとに重なる領域の周囲領域に切欠き部6を形成しておくことにより、絶縁層1a,1b,1cを積層した際に、絶縁基板1の端面11の端面電極2aと端面電極2bとの間に凹部3を形成することができる。すなわち、絶縁層1a,1b,1c用のセラミックグリーンシートを準備し、絶縁層1b用のセラミックグリーンシートの端面電極2a,2bが形成される領域に重なる領域の周囲領域に、予め金型やパンチングによる打ち抜き方法またはレーザ加工等の加工方法により切欠き部6を形成しておくことにより、絶縁基板1の所定の領域に凹部3が形成される。   For example, when the insulating substrate 1 as shown in FIG. 2 is composed of three layers of insulating layers 1a, 1b, and 1c, the recess 3 has the outer shape of the insulating layer 1b in the peripheral region of the region where the end face electrodes 2a and 2b are formed. It can be formed if it is smaller than the outer shape of the insulating layers 1a and 1c. Note that reducing the outer shape herein means that the outer shape of the insulating layer 1b corresponding to the intermediate layer is made smaller than the outer shape of the insulating layers 1a and 1c on the end surface 11 side where the end surface electrodes 2a and 2b are formed. is there. For example, FIG. 3 shows an exploded plan view of each of the insulating layers 1a, 1b, and 1c in the wiring board of FIG. Insulating layers 1a, 1b, and 1c are formed by forming a notch 6 in the peripheral region of the insulating layer 1b that overlaps the end surface electrode 2a of the insulating layer 1a and the end surface electrode 2b of the insulating layer 1c when stacked. When the layers are stacked, the recess 3 can be formed between the end face electrode 2a and the end face electrode 2b of the end face 11 of the insulating substrate 1. That is, a ceramic green sheet for the insulating layers 1a, 1b, and 1c is prepared, and a mold or punching is preliminarily formed in a peripheral region of a region overlapping the region where the end face electrodes 2a and 2b of the ceramic green sheet for the insulating layer 1b are formed. The recess 3 is formed in a predetermined region of the insulating substrate 1 by forming the notch portion 6 by a punching method by laser processing or a processing method such as laser processing.

なお、積層装置の精度や絶縁層1a,1b,1c用のセラミックグリーンシートの材料や厚み等によっても異なるが、絶縁基板1に凹部3を良好に形成するためには、絶縁層1b用のセラミックグリーンシートの外形が、絶縁層1a,1c用のセラミックグリーンシートの外形よりも予め0.1mm以上小さく、すなわち、切欠き部6の長さ(絶縁層1b用のセラミックグリーンシートの端面から内側方向への切り込み深さ)を0.1mm以上となるようにしておくことが好ましい。また、凹部3は、切欠き部6からなるものに限るものではなく、絶縁基板1の幅方向に渡って形成される溝状の凹部3としても構わない。また、絶縁層1bは1層に限るものではなく、例えば、図4に示す他の実施形態の断面図のように、中間層が2層以上の絶縁層(図4では、絶縁層1b,1b’,1b’’の3層)からなるものであっても良く、これらの絶縁層1b,1b’,1b’’用のセラミックグリーンシートの外形が端面電極2a,2bを形成する絶縁層1a,1c用のセラミックグリーンシートの外形よりも予め小さくなるようにしておけば良い。   Although it depends on the accuracy of the laminating apparatus and the material and thickness of the ceramic green sheets for the insulating layers 1a, 1b and 1c, in order to form the recesses 3 in the insulating substrate 1, a ceramic for the insulating layer 1b is required. The outer shape of the green sheet is 0.1 mm or more smaller in advance than the outer shape of the ceramic green sheet for the insulating layers 1a and 1c, that is, the length of the notch 6 (inward direction from the end surface of the ceramic green sheet for the insulating layer 1b) It is preferable to set the depth of cut into a depth of 0.1 mm or more. Further, the recess 3 is not limited to the notch 6 but may be a groove-like recess 3 formed in the width direction of the insulating substrate 1. Further, the insulating layer 1b is not limited to one layer. For example, as shown in a cross-sectional view of another embodiment shown in FIG. 4, the insulating layer has two or more intermediate layers (in FIG. 4, insulating layers 1b and 1b). , 1b ″, and the outer shape of the ceramic green sheet for these insulating layers 1b, 1b ′, 1b ″ is the insulating layer 1a, which forms the end face electrodes 2a, 2b, What is necessary is just to make it become smaller than the external shape of the ceramic green sheet for 1c beforehand.

なお、凹部3は、絶縁基板1の端面11に切削加工等を行うことにより端面電極2aと端面電極2bとの間に形成することもできるが、絶縁基板1の厚みが薄く、端面電極2aと端面電極2bとの間隔が小さい場合には、切削加工等により端面電極2aと端面電極2bとの間に凹部3を精度良く、かつ効率良く形成することは困難となることがある。上述のような端面電極2a,2bが設けられない絶縁層1bの外形を端面電極2a,2bが設けられる絶縁層1a,1bの外形よりも予め小さくしておく積層方法による方法は、精度良く、かつ効率良く端面電極2aと端面電極2bとの間に凹部3を形成することができるので好ましく、電子部品5を絶縁基板1の端面11に搭載した際、電子部品5の電極と配線基板の端面電極2a,2bに良好に当接することができ、電子部品5と配線基板とを強固に接合させることができる。特に、絶縁基板1の端面11に複数の端面電極2a,2bと複数の凹部3を形成する際には、この方法によって、それぞれの端面電極2a,2bとの間に凹部3を効率良く形成することができる。   In addition, although the recessed part 3 can also be formed between the end surface electrode 2a and the end surface electrode 2b by performing cutting etc. to the end surface 11 of the insulating substrate 1, the thickness of the insulating substrate 1 is thin and the end surface electrode 2a and When the distance from the end face electrode 2b is small, it may be difficult to form the recess 3 accurately and efficiently between the end face electrode 2a and the end face electrode 2b by cutting or the like. The method by the lamination method in which the outer shape of the insulating layer 1b not provided with the end face electrodes 2a and 2b as described above is made smaller in advance than the outer shape of the insulating layers 1a and 1b provided with the end face electrodes 2a and 2b is accurate. The recess 3 can be formed between the end face electrode 2a and the end face electrode 2b efficiently, and this is preferable. When the electronic component 5 is mounted on the end face 11 of the insulating substrate 1, the electrode of the electronic component 5 and the end face of the wiring board are preferred. The electrodes 2a and 2b can be in good contact with each other, and the electronic component 5 and the wiring board can be firmly bonded. In particular, when a plurality of end surface electrodes 2a, 2b and a plurality of recesses 3 are formed on the end surface 11 of the insulating substrate 1, the recesses 3 are efficiently formed between the end surface electrodes 2a, 2b by this method. be able to.

なお、凹部3の開口幅(端面電極2a,2b間を結ぶ方向に直交する方向の開口幅)は、電子部品5の電極を端面電極2a,2bに良好に当接させるため、絶縁基板1の端面11に搭載される電子部品5の幅(端面電極2a,2bに接続される電子部品5の電極を結ぶ方向に直交する方向の幅)よりも幅広に形成されている。そして、端面電極2a,2bの幅(端面電極2a,2b間を結ぶ方向に直交する方向の幅)が電子部品5の前記幅よりも幅広に形成されている場合、電子部品5を端面電極2a,2bに搭載した際の搭載ずれ等を考慮して、凹部3の開口幅は、電極2a,2bの前記幅よりも幅広に形成されていることが好ましい。例えば、電子部品5の前記幅が0.3mmであり、端面電極2a,2bの前記幅が0.4mmである場合、凹部3の開口幅は、電子部品5の前記幅の2倍以上、端面電極2a,2bの前記幅の1.5倍以上である0.6mm以上としておくことが好ましい。   Note that the opening width of the recess 3 (the opening width in the direction orthogonal to the direction connecting the end surface electrodes 2a and 2b) is such that the electrode of the electronic component 5 is in good contact with the end surface electrodes 2a and 2b. It is formed wider than the width of the electronic component 5 mounted on the end surface 11 (the width in the direction orthogonal to the direction connecting the electrodes of the electronic component 5 connected to the end surface electrodes 2a and 2b). When the width of the end face electrodes 2a and 2b (the width in the direction perpendicular to the direction connecting the end face electrodes 2a and 2b) is wider than the width of the electronic component 5, the electronic component 5 is connected to the end face electrode 2a. , 2b, the opening width of the recess 3 is preferably formed wider than the width of the electrodes 2a, 2b. For example, when the width of the electronic component 5 is 0.3 mm and the width of the end surface electrodes 2 a and 2 b is 0.4 mm, the opening width of the recess 3 is at least twice the width of the electronic component 5. It is preferable to set it to 0.6 mm or more which is 1.5 times or more of the width of the electrodes 2a and 2b.

また、絶縁基板1の端面11に複数の電子部品5を搭載するため、絶縁基板1の端面11の厚み方向や幅方向に、複数の端面電極2a,2bを形成しても良く、これにより、絶縁基板1の端面11に複数の電子部品5が搭載された小型の電子装置とすることができる。   Moreover, in order to mount the plurality of electronic components 5 on the end surface 11 of the insulating substrate 1, a plurality of end surface electrodes 2a and 2b may be formed in the thickness direction and the width direction of the end surface 11 of the insulating substrate 1, A small electronic device in which a plurality of electronic components 5 are mounted on the end surface 11 of the insulating substrate 1 can be obtained.

さらに、本発明の他の実施形態として、端面11において、端面電極2a,2bとは凹部3を挟んで厚み方向反対側に凸部7が設けられていてもよい。図5(a)は、他の実施形態である配線基板の断面図であり、図5(b)は、端面11に垂直な方向、すなわち図5(a)の矢符D方向から見た側面図である。なお、図5(b)においては、端面11の構造をわかり易くするために、電子部品5を図示していない。   Furthermore, as another embodiment of the present invention, the end surface 11 may be provided with a convex portion 7 on the opposite side of the thickness direction across the concave portion 3 from the end surface electrodes 2a and 2b. FIG. 5A is a cross-sectional view of a wiring board according to another embodiment, and FIG. 5B is a side view as viewed from the direction perpendicular to the end face 11, that is, from the direction of arrow D in FIG. FIG. In FIG. 5B, the electronic component 5 is not shown in order to make the structure of the end face 11 easy to understand.

この凸部7により絶縁基板1の端面11に電子部品5を収納する収納領域8を形成することができるようになり、電子部品5を絶縁基板1の端面11に精度良く搭載することができ、電子部品と配線基板とを強固に接合することができる。例えば、図5に示すように絶縁基板1が5層の絶縁層1a〜1eからなる場合、絶縁層1a,1cのそれぞれの主面に、絶縁層1a,1b,1cの外形よりも外形が大きい絶縁層1d,1eを積層すれば良い。すなわち、絶縁層1a,1b,1c用のセラミックグリーンシートの外形よりも外形が大きい絶縁層1d,1e用のセラミックグリーンシートに、打ち抜き加工や配線導体4用のメタライズペーストの印刷等を施した後、絶縁層1a,1c用のセラミックグリーンシートのそれぞれの主面に積層し、これを焼成することにより凸部7を備えた絶縁基板1を形成することができる。なお、絶縁基板1に精度良く、かつ効率良く凸部7を形成する点においては、上述の積層方法による手段が好ましいが、その他の方法により凸部7を形成しても構わない。例えば、スクリーン印刷法等の印刷手段により、絶縁層1d,1e用のセラミックグリーンシートの端面の電極2a,2bの凹部3とは反対側となる領域に凸部7用のセラミックペーストを印刷塗布し、そのセラミックペーストを絶縁基板1用のセラミックグリーンシートとともに焼成することによって所定の領域に被着させても構わない。   The convex portion 7 can form a storage area 8 for storing the electronic component 5 on the end surface 11 of the insulating substrate 1, and the electronic component 5 can be accurately mounted on the end surface 11 of the insulating substrate 1. The electronic component and the wiring board can be firmly bonded. For example, as shown in FIG. 5, when the insulating substrate 1 is composed of five insulating layers 1a to 1e, the outer surface of each of the insulating layers 1a and 1c is larger than the outer shape of the insulating layers 1a, 1b, and 1c. The insulating layers 1d and 1e may be stacked. That is, after the ceramic green sheets for the insulating layers 1d and 1e having a larger outer shape than the ceramic green sheets for the insulating layers 1a, 1b, and 1c are subjected to punching, printing of metallized paste for the wiring conductor 4, and the like. The insulating substrate 1 provided with the convex portions 7 can be formed by laminating the ceramic green sheets for the insulating layers 1a and 1c on the respective main surfaces and firing them. In addition, in the point which forms the convex part 7 in the insulated substrate 1 accurately and efficiently, the means by the above-mentioned lamination method is preferable, However, You may form the convex part 7 by the other method. For example, by applying printing means such as a screen printing method, a ceramic paste for the convex portion 7 is printed and applied to a region opposite to the concave portion 3 of the electrodes 2a and 2b on the end faces of the ceramic green sheets for the insulating layers 1d and 1e. The ceramic paste may be applied to a predetermined region by firing together with the ceramic green sheet for the insulating substrate 1.

このような凸部7用のセラミックペーストは、主成分のセラミック粉末に有機バインダー、有機溶剤、必要に応じて分散剤等を加えてボールミル、三本ロールミル、プラネタリーミキサー等の混練手段により混合および混練することで製作される。   Such a ceramic paste for the convex portion 7 is mixed and mixed by kneading means such as a ball mill, a three-roll mill, a planetary mixer, etc. by adding an organic binder, an organic solvent, and a dispersant as required to the ceramic powder of the main component. Produced by kneading.

なお、凸部7は、絶縁基板1とともに同時に焼成して形成されるため、絶縁基板1と実質的に同一成分からなることが好ましい。すなわち、絶縁基板1が酸化アルミニウム質焼結体からなる場合は、凸部7は酸化アルミニウム質焼結体からなり、絶縁基板1が窒化アルミニウム質焼結体からなる場合は、凸部7は窒化アルミニウム質焼結体からなることが好ましい。   In addition, since the convex part 7 is formed by firing together with the insulating substrate 1, it is preferable that the convex part 7 is made of substantially the same component as the insulating substrate 1. That is, when the insulating substrate 1 is made of an aluminum oxide sintered body, the convex portion 7 is made of an aluminum oxide sintered body, and when the insulating substrate 1 is made of an aluminum nitride sintered body, the convex portion 7 is nitrided. It is preferably made of an aluminum sintered body.

また、凸部7の高さ(電極2a,2bより外方へ突出した部分の長さ)は、電子部品5の高さ(電極2a,2bに搭載された電子部品5の電極2a,2bの面から外方へ向かう高さ)よりも高いことが好ましい。これにより、電子部品5を収納領域8内に確実に収納させ、電子部品5が絶縁基板1の端面11から突出する可能性を低減させることができるので、配線基板および電子装置を搬送する際、絶縁基板1の端面11に搭載された電子部品5が搬送装置の搬送路等により接触する可能性を低減させることができ、電子部品5が欠けたりする可能性を低減することができる。なお、このような凸部7は、収納領域8に収容される電子部品5の高さよりも高くなるように凸部7の長さを設定して形成しておけば良い。   Further, the height of the convex portion 7 (the length of the portion protruding outward from the electrodes 2a and 2b) is the height of the electronic component 5 (the length of the electrodes 2a and 2b of the electronic component 5 mounted on the electrodes 2a and 2b). It is preferable that the height is higher than the height from the surface to the outside. Thereby, the electronic component 5 can be securely stored in the storage area 8 and the possibility that the electronic component 5 protrudes from the end surface 11 of the insulating substrate 1 can be reduced. Therefore, when transporting the wiring board and the electronic device, It is possible to reduce the possibility that the electronic component 5 mounted on the end surface 11 of the insulating substrate 1 comes into contact with the conveyance path or the like of the conveyance device, and it is possible to reduce the possibility that the electronic component 5 is chipped. In addition, what is necessary is just to form such a convex part 7 by setting the length of the convex part 7 so that it may become higher than the height of the electronic component 5 accommodated in the storage area | region 8. FIG.

また、凸部7は、端面電極2a,2bと凹部3とを取り囲むように設けておき、電子部品5を全周に渡って収容する収納領域8として形成しても構わない。すなわち、凸部7を絶縁基板1の厚み方向や幅方向にそれぞれ形成しておき、凹部3および端面電極2a,2bとを取り囲むようにしてもいても構わない。   Moreover, the convex part 7 may be provided so that the end surface electrodes 2a and 2b and the concave part 3 may be surrounded, and may be formed as the storage area | region 8 which accommodates the electronic component 5 over a perimeter. That is, the convex portion 7 may be formed in the thickness direction and the width direction of the insulating substrate 1 so as to surround the concave portion 3 and the end surface electrodes 2a and 2b.

また、図6の側面図に示すように、凹部3は、絶縁基板1の厚み方向に複数配列しており、平面視で重なり合わないように設けられることが好ましい。なお、ここでいう平面視で重なり合わないとは、絶縁基体1の端面11に設けられた複数の凹部3が平面方向(図6では上方向)から透視した際、複数の凹部3が重なり合わないことをいう。図6においては、絶縁基板1の同一の端面11に複数の電極2a〜2hが形成されており、電極2aと電極2bとの間、電極2cと電極2dとの間、電極2eと電極2fとの間、電極2gと電極2hとの間のそれぞれに凹部3が形成されたものであり、電極2aと電極2b、電極2cと電極2d、電極2eと電極2f、電極2gと電極2hのそれぞれに図示しない電子部品5が搭載される。これにより、絶縁層1a〜1h用のセラミックグリーンシートを積層する際等、厚み方向に圧力が印加された際に、圧力が印加する方向に複数の凹部3が重なり合わないので、凹部3の周囲領域に圧力を良好に印加することができる。すなわち、凹部3の形状の違いや凹部3の積層ずれ等により凹部3の周囲領域において圧力が印加されにくい領域が発生して絶縁層1a〜1h用のセラミックグリーンシートの層間に密着不良が発生する可能性を低減することができるので、凹部3の周囲領域に圧力を良好に印加することができる。また、複数の凹部3間に位置する絶縁層が周囲より圧縮されて変形することにより複数の凹部3の変形が発生することを抑制することができる。これにより、複数の凹部3の形状を所定形状に良好に形成しやすくなり、電極2aと電極2bとの間隔を所定の寸法に良好なものとすることができ、電子部品と配線基板とを強固に接合させることができる。なお、絶縁基板1の端面11に収納領域8を複数形成する場合においても同様に、収納領域8の変形を抑制するために、平面視で重なり合わないように設けられることが好ましい。   Moreover, as shown in the side view of FIG. 6, a plurality of the recesses 3 are preferably arranged in the thickness direction of the insulating substrate 1 so as not to overlap each other in plan view. In addition, when it does not overlap in planar view here, the some recessed part 3 overlaps when the several recessed part 3 provided in the end surface 11 of the insulating base | substrate 1 is seen through from a plane direction (upward direction in FIG. 6). Say nothing. In FIG. 6, a plurality of electrodes 2a to 2h are formed on the same end surface 11 of the insulating substrate 1, between the electrodes 2a and 2b, between the electrodes 2c and 2d, and between the electrodes 2e and 2f. Are formed between the electrode 2g and the electrode 2h. The electrode 2a and the electrode 2b, the electrode 2c and the electrode 2d, the electrode 2e and the electrode 2f, and the electrode 2g and the electrode 2h, respectively. An electronic component 5 (not shown) is mounted. Accordingly, when a pressure is applied in the thickness direction, such as when the ceramic green sheets for the insulating layers 1a to 1h are laminated, the plurality of recesses 3 do not overlap in the direction in which the pressure is applied. A pressure can be favorably applied to the region. That is, a region where the pressure is difficult to be applied is generated in the peripheral region of the recess 3 due to a difference in the shape of the recess 3 or a stacking deviation of the recess 3, and adhesion failure occurs between the layers of the ceramic green sheets for the insulating layers 1a to 1h. Since the possibility can be reduced, the pressure can be favorably applied to the peripheral region of the recess 3. Moreover, it can suppress that the deformation | transformation of the some recessed part 3 generate | occur | produces because the insulating layer located between the some recessed part 3 is compressed from a periphery and deform | transforms. Thereby, it becomes easy to form the shape of the plurality of recesses 3 in a predetermined shape favorably, the distance between the electrode 2a and the electrode 2b can be improved in a predetermined dimension, and the electronic component and the wiring board can be strengthened. Can be joined. In the case where a plurality of storage areas 8 are formed on the end surface 11 of the insulating substrate 1, similarly, in order to suppress deformation of the storage areas 8, it is preferable that they are provided so as not to overlap in plan view.

本発明の電子装置は、本発明の配線基板の端面11に電子部品5が搭載され、電子部品5は、凹部3を跨ぐように電極2a,2bに接続される。これにより、電子部品5の電極と配線基板の電極2a,2bとを良好に接合することができるので、信頼性に優れた電子装置とすることができる。   In the electronic device of the present invention, the electronic component 5 is mounted on the end surface 11 of the wiring board of the present invention, and the electronic component 5 is connected to the electrodes 2 a and 2 b so as to straddle the recess 3. Thereby, since the electrode of the electronic component 5 and the electrodes 2a and 2b of the wiring board can be satisfactorily bonded, an electronic device having excellent reliability can be obtained.

電子部品5は、コンデンサ、抵抗素子、インダクタ等のチップ素子である。電子部品5の搭載は、半田等の導電性接着剤を介して、チップ素子の電極と配線基板の電極2a,2bとを電気的に接続することにより行われる。また、電子部品5は必要に応じて封止される。封止はエポキシ樹脂等の封止樹脂により電子部品5を覆うことにより行ったり、電子部品5を覆うようにして載置した樹脂や金属、セラミックス等からなる蓋体をガラス、樹脂、ロウ材等の接着剤により積層基板に取着することにより行ったりすれば良い。収容領域8を形成した場合は、樹脂による封止、蓋体による封止ともに効率良く封止することができる。   The electronic component 5 is a chip element such as a capacitor, a resistance element, or an inductor. The electronic component 5 is mounted by electrically connecting the electrode of the chip element and the electrodes 2a and 2b of the wiring board via a conductive adhesive such as solder. Moreover, the electronic component 5 is sealed as needed. Sealing is performed by covering the electronic component 5 with a sealing resin such as epoxy resin, or a lid made of resin, metal, ceramics, etc. placed so as to cover the electronic component 5 is made of glass, resin, brazing material, etc. It may be performed by attaching to the laminated substrate with an adhesive. When the housing region 8 is formed, both sealing with a resin and sealing with a lid can be efficiently performed.

また、配線基板の一方主面または他方主面には、電子部品5や第2の電子部品が搭載される。第2の電子部品は、IC(Integrated Circuit)チップやLSI(Large Scale Integration)チップ等の半導体素子、水晶振動子や圧電振動子等の圧電素子、各種センサ等である。第2の電子部品の搭載は、第2の電子部品がフリップチップ型の半導体素子である場合には、はんだバンプや金バンプ、または導電性樹脂(異方性導電樹脂等)を介して、半導体素子の電極と配線導体4とを電気的に接続することにより行なわれ、また、第2の電子部品がワイヤボンディング型の半導体素子である場合には、ガラス、樹脂、ろう材等の接合材により配線基板表面に半導体素子を固定した後、ボンディングワイヤを介して半導体素子の電極と配線導体4とを電気的に接続することにより行なわれる。また、第2の電子部品が水晶振動子等の圧電素子である場合には、導電性樹脂により圧電素子の固定と圧電素子の電極と配線導体4との電気的な接続を行なう。そして、第2の電子部品は、必要に応じて上述の電子部品と同様の手段により封止される。   In addition, the electronic component 5 and the second electronic component are mounted on one main surface or the other main surface of the wiring board. The second electronic component is a semiconductor element such as an IC (Integrated Circuit) chip or an LSI (Large Scale Integration) chip, a piezoelectric element such as a crystal vibrator or a piezoelectric vibrator, or various sensors. When the second electronic component is a flip-chip type semiconductor element, the second electronic component is mounted on the semiconductor via a solder bump, a gold bump, or a conductive resin (anisotropic conductive resin or the like). It is performed by electrically connecting the electrode of the element and the wiring conductor 4, and when the second electronic component is a wire bonding type semiconductor element, it is made of a bonding material such as glass, resin, or brazing material. After fixing the semiconductor element on the surface of the wiring board, the electrodes of the semiconductor element and the wiring conductor 4 are electrically connected through bonding wires. When the second electronic component is a piezoelectric element such as a crystal resonator, the piezoelectric element is fixed and the electrode of the piezoelectric element and the wiring conductor 4 are electrically connected by a conductive resin. And a 2nd electronic component is sealed by the same means as the above-mentioned electronic component as needed.

なお、本発明は、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば、図7の断面図に示すように、絶縁基板1の一方主面または他方主面に、第1の電子部品5以外の第2の電子部品を収容するための収納領域(キャビティ)9を設けても構わない。また、絶縁基板1の1つの端面のみならず、絶縁基板1の複数の端面に電極2a,2bおよび凹部3を配設しても構わない。この構成により、それぞれの端面に形成した電極2a,2bのそれぞれに電子部品5を搭載することができるので、絶縁基板1の端面を有効に利用してより多くの電子部品5を搭載することができ、小型でかつ信頼性の高い電子装置を形成することができる。例えば、絶縁基板1の平面視形状が矩形状である場合、4つの端面のそれぞれに電極2a,2bおよび凹部3を形成しても構わない。   The present invention can be variously modified without departing from the gist of the present invention. For example, as shown in the cross-sectional view of FIG. 7, a storage area (cavity) 9 for storing a second electronic component other than the first electronic component 5 is formed on one main surface or the other main surface of the insulating substrate 1. It may be provided. In addition, the electrodes 2 a and 2 b and the recesses 3 may be provided not only on one end face of the insulating substrate 1 but also on a plurality of end faces of the insulating substrate 1. With this configuration, the electronic component 5 can be mounted on each of the electrodes 2a and 2b formed on the respective end surfaces, and therefore more electronic components 5 can be mounted using the end surface of the insulating substrate 1 effectively. In addition, a small and highly reliable electronic device can be formed. For example, when the planar view shape of the insulating substrate 1 is rectangular, the electrodes 2a, 2b and the recess 3 may be formed on each of the four end surfaces.

本発明の実施の形態である配線基板を示す平面図である。It is a top view which shows the wiring board which is embodiment of this invention. 図1における配線基板の切断面線A−A’における断面図である。FIG. 2 is a cross-sectional view taken along line A-A ′ of the wiring board in FIG. 1. 図2に示す配線基板における絶縁層1a,1b,1cのそれぞれの分解平面図である。FIG. 3 is an exploded plan view of each of insulating layers 1a, 1b, and 1c in the wiring board shown in FIG. 本発明の他の実施形態である配線基板を示す断面図である。It is sectional drawing which shows the wiring board which is other embodiment of this invention. (a)本発明の他の実施形態である配線基板を示す断面図であり、(b)端面11に垂直な方向から見た側面図である。(A) It is sectional drawing which shows the wiring board which is other embodiment of this invention, (b) It is the side view seen from the direction perpendicular | vertical to the end surface 11. FIG. 本発明の他の実施形態である配線基板を示す側面図である。It is a side view which shows the wiring board which is other embodiment of this invention. 本発明の他の実施形態である配線基板を示す断面図である。It is sectional drawing which shows the wiring board which is other embodiment of this invention.

符号の説明Explanation of symbols

1 絶縁基板
1a〜1h 絶縁層
2a〜2h 端面電極
3 凹部
4 配線導体
5 電子部品
6 切欠き部
7 凸部
8,9 収納領域
DESCRIPTION OF SYMBOLS 1 Insulating substrate 1a-1h Insulating layer 2a-2h End surface electrode 3 Concave part 4 Wiring conductor 5 Electronic component 6 Notch part 7 Convex part 8,9 Storage area

Claims (5)

絶縁基板の端面に電子部品を実装するための端面電極が設けられた配線基板において、前記端面電極は1つの端面に複数設けられ、前記端面電極と前記端面電極との間には凹部が設けられることを特徴とする配線基板。   In a wiring board in which an end face electrode for mounting an electronic component is provided on an end face of an insulating substrate, a plurality of the end face electrodes are provided on one end face, and a recess is provided between the end face electrode and the end face electrode. A wiring board characterized by that. 前記端面電極を挟んで前記凹部とは反対側に、凸部が設けられることを特徴とする請求項1記載の配線基板。   The wiring board according to claim 1, wherein a convex portion is provided on a side opposite to the concave portion across the end face electrode. 前記凹部は厚み方向に複数配列しており、平面視で重なり合わないように設けられることを特徴とする請求項1または2記載の配線基板。   The wiring board according to claim 1, wherein a plurality of the recesses are arranged in a thickness direction so as not to overlap each other in a plan view. 前記絶縁基板は複数の絶縁層を含み、
前記端面電極が設けられる少なくとも2層の絶縁層は、前記端面電極が設けられない絶縁層を間に積層し、前記端面電極が設けられない絶縁層は、前記端面電極が設けられる絶縁層よりも外形が小さいことを特徴とする請求項1または2記載の配線基板。
The insulating substrate includes a plurality of insulating layers;
The at least two insulating layers provided with the end face electrodes are laminated with an insulating layer not provided with the end face electrodes, and the insulating layer not provided with the end face electrodes is more than the insulating layer provided with the end face electrodes. 3. The wiring board according to claim 1, wherein the outer shape is small.
請求項1〜4のいずれか1つに記載の配線基板の端面に電子部品が搭載され、該電子部品は、前記凹部を跨ぐように前記端面電極に電気的に接続されることを特徴とする電子装置。   An electronic component is mounted on an end face of the wiring board according to claim 1, and the electronic component is electrically connected to the end face electrode so as to straddle the concave portion. Electronic equipment.
JP2006269809A 2006-09-29 2006-09-29 Wiring board and electronic device Active JP4791313B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006269809A JP4791313B2 (en) 2006-09-29 2006-09-29 Wiring board and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006269809A JP4791313B2 (en) 2006-09-29 2006-09-29 Wiring board and electronic device

Publications (2)

Publication Number Publication Date
JP2008091561A true JP2008091561A (en) 2008-04-17
JP4791313B2 JP4791313B2 (en) 2011-10-12

Family

ID=39375423

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006269809A Active JP4791313B2 (en) 2006-09-29 2006-09-29 Wiring board and electronic device

Country Status (1)

Country Link
JP (1) JP4791313B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016046482A (en) * 2014-08-26 2016-04-04 住友電気工業株式会社 Connection structure, substrate for connection structure, and method of manufacturing connection structure

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0429337A (en) * 1990-05-24 1992-01-31 Shimadzu Corp Printed board for mounting flip chip
JPH0563107A (en) * 1991-09-03 1993-03-12 Soshin Denki Kk Terminal structure of hybrid ic for surface mounting
JPH10229142A (en) * 1997-02-13 1998-08-25 Fujitsu Ltd Ball grid array package
JPH11330298A (en) * 1998-05-12 1999-11-30 Murata Mfg Co Ltd Package provided with signal terminal and electronic device using the package
JP2001111380A (en) * 1999-10-12 2001-04-20 Nippon Dempa Kogyo Co Ltd Piezoelectric device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0429337A (en) * 1990-05-24 1992-01-31 Shimadzu Corp Printed board for mounting flip chip
JPH0563107A (en) * 1991-09-03 1993-03-12 Soshin Denki Kk Terminal structure of hybrid ic for surface mounting
JPH10229142A (en) * 1997-02-13 1998-08-25 Fujitsu Ltd Ball grid array package
JPH11330298A (en) * 1998-05-12 1999-11-30 Murata Mfg Co Ltd Package provided with signal terminal and electronic device using the package
JP2001111380A (en) * 1999-10-12 2001-04-20 Nippon Dempa Kogyo Co Ltd Piezoelectric device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016046482A (en) * 2014-08-26 2016-04-04 住友電気工業株式会社 Connection structure, substrate for connection structure, and method of manufacturing connection structure

Also Published As

Publication number Publication date
JP4791313B2 (en) 2011-10-12

Similar Documents

Publication Publication Date Title
JP5731404B2 (en) Multi-cavity wiring board, wiring board and electronic device
JP2018032773A (en) Electronic component mounting substrate, electronic device, and electronic module
US10985098B2 (en) Electronic component mounting substrate, electronic device, and electronic module
JP6408423B2 (en) Package and electronic equipment
JP6780996B2 (en) Wiring boards, electronics and electronic modules
JP4791313B2 (en) Wiring board and electronic device
JP4912118B2 (en) Electronic component storage package and electronic device
JP5247415B2 (en) Multi-cavity wiring board, wiring board and electronic device
JP2007173629A (en) Package for housing electronic part and electronic equipment
US11024572B2 (en) Wiring board, electronic device, and electronic module
JP2017063093A (en) Wiring board, electronic device, and electronic module
JP4986500B2 (en) Laminated substrate, electronic device and manufacturing method thereof.
JP4733061B2 (en) Plural wiring base, wiring base and electronic device, and division method of multiple wiring base
JP4587587B2 (en) Electronic component mounting board
WO2014046133A1 (en) Package for accommodating electronic part, and electronic device
JP5460002B2 (en) Multi-cavity wiring board, wiring board and electronic device
JP2007318034A (en) Multiple-formed wiring substrate, package for holding electronic component, and electronic device
JP4889401B2 (en) Electronic component storage package, multi-component electronic component storage package, and electronic device
JP2006237274A (en) Electronic part housing package and electronic device
JP4646825B2 (en) Multiple wiring board
JP2014007292A (en) Electronic component housing package and electronic device
JP2006185977A (en) Wiring board
JP2003197801A (en) Package for receiving electronic component
JP2008060420A (en) Wiring board and electronic apparatus
JP2008010560A (en) Wiring board, multiple patterning wiring board, package for housing electronic part, and electronic device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20090316

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110201

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110208

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110406

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20110719

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20110721

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140729

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

Ref document number: 4791313

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150