JP2001111380A - Piezoelectric device - Google Patents

Piezoelectric device

Info

Publication number
JP2001111380A
JP2001111380A JP29013799A JP29013799A JP2001111380A JP 2001111380 A JP2001111380 A JP 2001111380A JP 29013799 A JP29013799 A JP 29013799A JP 29013799 A JP29013799 A JP 29013799A JP 2001111380 A JP2001111380 A JP 2001111380A
Authority
JP
Japan
Prior art keywords
piezoelectric device
chip
crystal oscillator
electrode
chip element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP29013799A
Other languages
Japanese (ja)
Other versions
JP3435106B2 (en
Inventor
Takeo Oita
武雄 追田
Yasuo Sakaba
泰男 酒葉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nihon Dempa Kogyo Co Ltd
Original Assignee
Nihon Dempa Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nihon Dempa Kogyo Co Ltd filed Critical Nihon Dempa Kogyo Co Ltd
Priority to JP29013799A priority Critical patent/JP3435106B2/en
Publication of JP2001111380A publication Critical patent/JP2001111380A/en
Application granted granted Critical
Publication of JP3435106B2 publication Critical patent/JP3435106B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Oscillators With Electromechanical Resonators (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a piezoelectric device, especially, a crystal oscillator whose miniaturization can be promoted, and whose change characteristics in time can be made satisfactory. SOLUTION: In a piezoelectric device formed by sealing a crystal piece in a container itself constituted of laminated ceramics, a dent is formed on the edge face being the outer surface of the laminated ceramics constituted as at least a three-layer structure, and electrode terminals are formed on the edge faces of the upper and lower layers in the three layer structure while the edge face of the intermediate layer is used as a non-electrode, and the electrodes of a chip element are connected with the electrode terminals of the laminated ceramics, and the chip element is housed in the dent. Also, the piezoelectric device is formed as a crystal oscillator in which the IC chip is loaded on the container itself, and the chip element is formed as a by-pass capacitor between a power source and ground. Also, the piezoelectric device is formed as the crystal oscillator in which the IC chip is loaded on the container itself, and the chip element is formed as a high frequency coupling capacitor.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は水晶片を封入した圧
電装置を産業上の技術分野とし、特に積層セラミックを
使用した容器本体へのチップ素子の実装方法及びこれに
よる面実装型の水晶発振器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an industrial technical field of a piezoelectric device enclosing a crystal piece, and more particularly to a method of mounting a chip element on a container body using a laminated ceramic and a surface mounting type crystal oscillator using the same. .

【0002】[0002]

【従来の技術】(発明の背景)水晶発振器は周波数及び
時間の基準源として、通信機器を含む各種の電子機器に
用いられている。近年では、例えば携帯電話に代表され
るように小型化が促進し、次世代用にさらなる小型化が
求められている。
2. Description of the Related Art Crystal oscillators are used as various frequency and time reference sources in various electronic devices including communication devices. In recent years, miniaturization has been promoted as typified by, for example, mobile phones, and further miniaturization has been demanded for the next generation.

【0003】(従来技術の一例)第4図は一従来例を説
明する水晶発振器の断面図である。水晶発振器は、段部
を有する凹状の容器本体1に水晶片2、ICチップ3及
びコンデンサ4(ab)を収容し、シーム溶接によって
金属カバー5を接合してなる。容器本体1は積層セラミ
ックからなり、上面に金属リング6を鑞接する。水晶片
2は励振電極から引出電極の延出した一端部を段部の上
面に導電性接着剤7によって固着する。
(Example of Prior Art) FIG. 4 is a sectional view of a crystal oscillator for explaining a conventional example. The crystal oscillator is formed by accommodating a crystal blank 2, an IC chip 3, and a capacitor 4 (ab) in a concave container body 1 having a step, and joining a metal cover 5 by seam welding. The container body 1 is made of a laminated ceramic, and a metal ring 6 is soldered to the upper surface. The crystal blank 2 has one end portion of the extraction electrode extending from the excitation electrode fixed to the upper surface of the step portion with a conductive adhesive 7.

【0004】ICチップ3は、第5図の点線枠で示すよ
うに、発振回路の主を構成する回路素子を集積化する。
そして、フェースダウンボンディングによって底面に固
着する。図中の符号8は増幅器、C1、C2は発振用コン
デンサ、C3は電源とアース間のバイパス用のコンデン
サ、C4は高周波出力(発振出力)を次段に送出する結
合コンデンサ、2Aは水晶振動子、Rは抵抗、Vccは電
源、Voは出力である。
As shown by a dotted frame in FIG. 5, the IC chip 3 integrates circuit elements constituting a main part of an oscillation circuit.
Then, it is fixed to the bottom surface by face-down bonding. In the figure, reference numeral 8 denotes an amplifier, C1 and C2 denote oscillation capacitors, C3 denotes a bypass capacitor between a power supply and ground, C4 denotes a coupling capacitor that sends a high-frequency output (oscillation output) to the next stage, and 2A denotes a crystal oscillator. , R are resistors, Vcc is a power supply, and Vo is an output.

【0005】コンデンサ4(ab)は、前述のバイパス
及び結合用のコンデンサC3、C4であり、ICチップ3
の両側に配置される。なお、これらのコンデンサ4(a
b)は発振用コンデンサC1、C2に比較し、容量が大き
くて(約10000pF)集積化が困難なことから、I
Cチップ3とは別個に収容せざるを得ない状況にある。
[0005] The capacitor 4 (ab) is the bypass and coupling capacitors C3 and C4, and the IC chip 3
Are arranged on both sides. Note that these capacitors 4 (a
b) has a larger capacitance (about 10,000 pF) than the oscillation capacitors C1 and C2 and is difficult to integrate.
It is in a situation where it has to be accommodated separately from the C chip 3.

【0006】[0006]

【発明が解決しようとする課題】(従来技術の問題点)
しかしながら、上記構成の水晶発振器では、さらなる小
型化に伴い凹部内の底面積が小さくなり、コンデンサ4
(ab)を収容する空間が損われる。そして、ICチッ
プ3とコンデンサ4(ab)の複数部品を収容するので
素子配置及び電極パターン等を複雑にし、自動機による
搭載にも難を生ずる問題があった。
[Problems to be Solved by the Invention]
However, in the crystal oscillator having the above configuration, the bottom area in the concave portion is reduced with further miniaturization, and the capacitor 4
The space accommodating (ab) is damaged. Further, since a plurality of components of the IC chip 3 and the capacitor 4 (ab) are accommodated, there is a problem that the arrangement of the elements and the electrode patterns are complicated, and mounting by an automatic machine is difficult.

【0007】また、水晶片2とともにコンデンサ4(a
b)を同一空間内に配置するので、これらを固着する導
電性接着剤7の量が多くなる。したがって、導電性接着
剤7から放出されるガス等によって経時変化特性を悪化
させる問題もあった。特に、温度補償発振器等のように
高安定度を求められるものは問題が大きくなる。
A capacitor 4 (a) is used together with the crystal blank 2.
Since b) is arranged in the same space, the amount of the conductive adhesive 7 for fixing them is increased. Therefore, there is also a problem that the aging characteristics are deteriorated by the gas or the like released from the conductive adhesive 7. In particular, a problem requiring a high degree of stability, such as a temperature-compensated oscillator, becomes serious.

【0008】(発明の目的)本発明は小型化を促進して
経時変化特性を良好とした圧電装置特には水晶発振器を
提供することを目的とする。
(Object of the Invention) It is an object of the present invention to provide a piezoelectric device, particularly a crystal oscillator, which promotes miniaturization and has good aging characteristics.

【0009】[0009]

【課題を解決するための手段】本発明は、容器本体とし
ての積層セラミックを少なくとも三層構造として積層セ
ラミックの外表面となる端面(側面)に窪みを設け、中
間層の端面を無電極として上下層の端面にチップ素子の
電極と接続する電極端子を形成したことを基本的な解決
手段とする。
According to the present invention, a multilayer ceramic as a container body has at least a three-layer structure, and a recess is provided on an end face (side face) serving as an outer surface of the multilayer ceramic, and an end face of an intermediate layer is formed as an electrode-less upper face. The basic solution is to form an electrode terminal connected to the electrode of the chip element on the end surface of the lower layer.

【0010】[0010]

【作用】本発明では、積層セラミックの側面に電極端子
を有する窪みを設けたので、チップ素子を水晶片とは独
立して外部に収容する。また、チップ素子を垂直方向に
搭載できるので、容器本体の平面面積を小さくする。以
下、本発明の一実施例を説明する。
In the present invention, since the recess having the electrode terminal is provided on the side surface of the multilayer ceramic, the chip element is housed outside independently of the crystal blank. Further, since the chip element can be mounted in the vertical direction, the plane area of the container body is reduced. Hereinafter, an embodiment of the present invention will be described.

【0011】[0011]

【実施例】第1図乃至第3図は本発明の一実施例を説明
する図で、第1図は水晶発振器の半断面図、第2図は同
一部拡大図、第3図は容器本体1の分解図である。な
お、前従来例図と同一部分には同番号を付与してその説
明は簡略又は省略する。水晶発振器は、前述のように凹
状の容器本体1に水晶片2及びICチップ3を容器本体
1内に収容し、シーム溶接によって金属カバー5を接合
してなる。そして、コンデンサ4(ab)を容器本体1
の外表面の側面に設けた凹状の窪み9内に収容する。こ
の実施例では、容器本体1は、底壁10と第1及び第2
枠壁11、12とを有する積層セラミックからなる。な
お、第2枠壁12の上には金属リング6が鑞接され、金
属カバー5がシーム溶接によって接合される。
1 to 3 are views for explaining an embodiment of the present invention. FIG. 1 is a half sectional view of a crystal oscillator, FIG. 2 is an enlarged view of the same part, and FIG. 1 is an exploded view of FIG. The same parts as those in the prior art are denoted by the same reference numerals, and description thereof will be simplified or omitted. As described above, the crystal oscillator is formed by accommodating the crystal blank 2 and the IC chip 3 in the concave container body 1 in the container body 1 and joining the metal cover 5 by seam welding. Then, the condenser 4 (ab) is connected to the container body 1.
Is housed in a concave depression 9 provided on the side surface of the outer surface of the. In this embodiment, the container body 1 includes a bottom wall 10 and first and second containers.
It is made of a laminated ceramic having frame walls 11 and 12. The metal ring 6 is soldered on the second frame wall 12, and the metal cover 5 is joined by seam welding.

【0012】第1枠壁11は中間層11aと上下層11
(bc)の三層構造とする。そして、対向する一組の両
辺の側面に凹部を有し、中間層11aは無電極として上
下層11(bc)には電極端子13(ab)を形成す
る。これらは、それぞれ単層の状態で印刷によって下地
電極を形成し、例えば積層後一体的に焼成されて所謂ス
ルーホール加工によって形成される。なお、底壁10に
は水晶片2の電極及びICチップ3と電気的に接続する
電極パターン、及びこれに接続して側面及び裏面に延出
する実装電極がスルーホール等によって形成される(未
図示)。
The first frame wall 11 includes an intermediate layer 11a and upper and lower layers 11a.
(Bc) The three-layer structure is adopted. The pair of opposing sides has concave portions on both side surfaces, and the intermediate layer 11a has no electrodes, and the electrode terminals 13 (ab) are formed on the upper and lower layers 11 (bc). These are formed in a single-layer state by forming a base electrode by printing, for example, by laminating after lamination, and so-called through-hole processing. The bottom wall 10 has an electrode pattern electrically connected to the electrode of the crystal blank 2 and the IC chip 3, and mounting electrodes connected to the electrode pattern and extending to the side surface and the back surface through through holes and the like (not shown). Illustrated).

【0013】そして、チップ素子からなるコンデンサ4
(ab)の実装電極14(ab)を窪み9の電極端子1
3(ab)に導電性接着剤7(未図示)によって電気的
に接続して固着する。すなわち、コンデンサ4(ab)
の長さ方向を垂直方向として寸法の最も小さい厚み方向
を対面させて収容する。なお、コンデンサ4(ab)は
前述のようにバイパス及び結合用のコンデンサC3、C4
とする。
Then, a capacitor 4 composed of a chip element
The mounting electrode 14 (ab) of (ab) is recessed into the electrode terminal 1 of
3 (ab) is electrically connected and fixed by a conductive adhesive 7 (not shown). That is, the capacitor 4 (ab)
The vertical direction is the vertical direction, and the thickness direction with the smallest dimension is faced and accommodated. The capacitor 4 (ab) is connected to the bypass and coupling capacitors C3 and C4 as described above.
And

【0014】このような構成であれば、凹部内にICチ
ップ3のみを収容するので、底面積を小さく維持して、
凹部内での素子配置を簡易にして搭載も容易にする。ま
た、コンデンサ4(ab)の寸法が最も小さい厚み方向
を外表面の側面に収容するので、全体的な平面外形寸法
を小さくできる。また、水晶片2とICチップ3とを別
個に収容するので、容器内での導電性接着剤7を少なく
して、経時変化特性を良好に維持する。
With such a configuration, since only the IC chip 3 is accommodated in the concave portion, the bottom area is kept small.
The arrangement of elements in the recess is simplified and mounting is facilitated. In addition, since the thickness direction in which the dimension of the capacitor 4 (ab) is the smallest is accommodated in the side surface of the outer surface, the overall planar outer dimension can be reduced. In addition, since the crystal blank 2 and the IC chip 3 are housed separately, the amount of the conductive adhesive 7 in the container is reduced, and the aging characteristic is favorably maintained.

【0015】[0015]

【他の事項】上記実施例では、バイパス及び結合用とし
てのコンデンサ4(ab)を容器本体1の窪み9に収容
したが、これに限らず例えば発振用コンデンサ4(a
b)や抵抗あるいはインダクタのチップ素子を収容して
もよい。また、水晶発振器を例示したが、例えば圧電振
動子、圧電材からなるフィルタ素子及び弾性表面波素子
等の圧電装置に適用できる。
[Others] In the above embodiment, the condenser 4 (ab) for bypass and coupling is accommodated in the recess 9 of the container body 1. However, the present invention is not limited to this.
b) or chip elements such as resistors or inductors may be accommodated. Further, although the crystal oscillator has been exemplified, the invention can be applied to piezoelectric devices such as a piezoelectric vibrator, a filter element made of a piezoelectric material, and a surface acoustic wave element.

【0016】また、コンデンサ4(ab)を窪み9内に
収容したが、一部が窪み9から突出してもよい。また、
窪み9は対向する一組の側面に形成したが、必要に応じ
て1個でも3個以上でもよい。また、積層セラミックは
底壁10、第1及び第2枠壁から形成したが、基本的に
は第1枠壁11の中間層11a及び上下層11(bc)
が基本構造であり、これのみでも形成できる。また、窪
み9は凹状としたがコンデンサ4(ab)を収容できれ
ばよいので、その形状は任意である。また、カバーはシ
ーム溶接によって接合するとしたが樹脂やガラスよる接
合でもよい。
Although the capacitor 4 (ab) is accommodated in the depression 9, a part may protrude from the depression 9. Also,
The depressions 9 are formed on a pair of opposing side surfaces, but may be one or three or more as necessary. Although the laminated ceramic is formed from the bottom wall 10 and the first and second frame walls, basically, the intermediate layer 11a and the upper and lower layers 11 (bc) of the first frame wall 11 are formed.
Is a basic structure, and can be formed only by this. In addition, the depression 9 is formed in a concave shape, but any shape may be used as long as it can accommodate the capacitor 4 (ab). Although the cover is joined by seam welding, the cover may be joined by resin or glass.

【0017】なお、本願発明に関連して、例えば本出願
人による実公平7−35451号公報が存在するが、こ
れはアイデア的な考案であって、積層セラミックとして
上下層11(bc)に電極を形成する点の明記がなく、
本願発明では今回この点につき具現化可能としたもので
あります。
In connection with the present invention, there is, for example, Japanese Utility Model Publication No. 7-35451 by the present applicant. This is an idea and is an idea. Is not specified,
In the present invention, this point can be realized in this case.

【0018】[0018]

【発明の効果】本発明は、容器本体としての積層セラミ
ックを少なくとも三層構造として積層セラミックの外表
面となる端面(側面)に窪みを設け、中間層の端面を無
電極として上下層の端面にチップ素子の電極と接続する
電極端子を形成したので、小型化を促進して経時変化特
性を良好とした圧電装置特には水晶発振器を提供でき
る。
According to the present invention, the laminated ceramic serving as the container body has at least a three-layer structure, and a recess is provided on an end surface (side surface) serving as an outer surface of the laminated ceramic. Since the electrode terminals connected to the electrodes of the chip element are formed, it is possible to provide a piezoelectric device, particularly a crystal oscillator, which promotes miniaturization and has good aging characteristics.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を説明する水晶発振器の半断
面図である。
FIG. 1 is a half sectional view of a crystal oscillator illustrating one embodiment of the present invention.

【図2】本発明の一実施例を説明する水晶発振器の一部
拡大図である。
FIG. 2 is a partially enlarged view of a crystal oscillator explaining one embodiment of the present invention.

【図3】本発明の一実施例を説明する容器本体の分解図
である。
FIG. 3 is an exploded view of the container main body for explaining one embodiment of the present invention.

【図4】従来例を説明する水晶発振器の断面図である。FIG. 4 is a cross-sectional view of a crystal oscillator illustrating a conventional example.

【図5】従来例を説明する発振回路の概略図である。FIG. 5 is a schematic diagram of an oscillation circuit illustrating a conventional example.

【符号の説明】[Explanation of symbols]

1 容器本体、2 水晶片、3 ICチップ、4 コン
デンサ、5 金属カバー、6 金属リング、7 導電性
接着剤、8 増幅器、9 窪み、10 底壁、11 第
1枠壁、11a 中間層、11b 上層、11c 下
層、12 第2枠壁、13 電極端子、14 実装電
極.
DESCRIPTION OF SYMBOLS 1 Container main body, 2 crystal pieces, 3 IC chips, 4 capacitors, 5 metal covers, 6 metal rings, 7 conductive adhesives, 8 amplifiers, 9 depressions, 10 bottom walls, 11 first frame walls, 11a intermediate layers, 11b Upper layer, 11c Lower layer, 12 Second frame wall, 13 Electrode terminal, 14 Mounting electrode.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H03H 9/10 H01L 41/08 D ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H03H 9/10 H01L 41/08 D

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】積層セラミックからなる容器本体内に水晶
片を封入してなる圧電装置において、前記積層セラミッ
クを少なくとも三層構造として該積層セラミックの外表
面となる端面に窪みを設け、前記三層構造の中間層の端
面を無電極として上下層の端面に電極端子を形成し、前
記積層セラミックの電極端子にチップ素子の電極を接続
して該チップ素子を前記窪みに収容したことを特徴とす
る圧電装置。
1. A piezoelectric device comprising a quartz body sealed in a container body made of a laminated ceramic, wherein the laminated ceramic has at least a three-layer structure, and a recess is provided on an end face which is an outer surface of the laminated ceramic, and An electrode terminal is formed on the end surface of the upper and lower layers without using the end surface of the intermediate layer of the structure as an electrode, the electrode of the chip element is connected to the electrode terminal of the laminated ceramic, and the chip element is housed in the recess. Piezo device.
【請求項2】前記圧電装置は容器本体にICチップを搭
載した水晶発振器であって、前記チップ素子は電源とア
ース間のバイパスコンデンサである請求項1の圧電装
置。
2. The piezoelectric device according to claim 1, wherein said piezoelectric device is a crystal oscillator having an IC chip mounted on a container body, and said chip element is a bypass capacitor between a power supply and ground.
【請求項3】前記圧電装置は容器本体にICチップを搭
載した水晶発振器であって、前記チップ素子は高周波的
な結合コンデンサである請求項1の圧電装置。
3. The piezoelectric device according to claim 1, wherein the piezoelectric device is a crystal oscillator having an IC chip mounted on a container body, and the chip element is a high-frequency coupling capacitor.
JP29013799A 1999-10-12 1999-10-12 Piezoelectric device Expired - Fee Related JP3435106B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29013799A JP3435106B2 (en) 1999-10-12 1999-10-12 Piezoelectric device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29013799A JP3435106B2 (en) 1999-10-12 1999-10-12 Piezoelectric device

Publications (2)

Publication Number Publication Date
JP2001111380A true JP2001111380A (en) 2001-04-20
JP3435106B2 JP3435106B2 (en) 2003-08-11

Family

ID=17752276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29013799A Expired - Fee Related JP3435106B2 (en) 1999-10-12 1999-10-12 Piezoelectric device

Country Status (1)

Country Link
JP (1) JP3435106B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007294798A (en) * 2006-04-27 2007-11-08 Kyocera Corp Laminated substrate, electronic apparatus, and manufacturing method for them
JP2007324851A (en) * 2006-05-31 2007-12-13 Nippon Dempa Kogyo Co Ltd Surface mount type temperature-compensated crystal oscillator
JP2008091561A (en) * 2006-09-29 2008-04-17 Kyocera Corp Wiring substrate and electronic device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007294798A (en) * 2006-04-27 2007-11-08 Kyocera Corp Laminated substrate, electronic apparatus, and manufacturing method for them
JP2007324851A (en) * 2006-05-31 2007-12-13 Nippon Dempa Kogyo Co Ltd Surface mount type temperature-compensated crystal oscillator
JP2008091561A (en) * 2006-09-29 2008-04-17 Kyocera Corp Wiring substrate and electronic device

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