JP2008072166A - 位相同期回路および電子機器 - Google Patents

位相同期回路および電子機器 Download PDF

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Publication number
JP2008072166A
JP2008072166A JP2006246327A JP2006246327A JP2008072166A JP 2008072166 A JP2008072166 A JP 2008072166A JP 2006246327 A JP2006246327 A JP 2006246327A JP 2006246327 A JP2006246327 A JP 2006246327A JP 2008072166 A JP2008072166 A JP 2008072166A
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JP
Japan
Prior art keywords
frequency
current
unit
oscillation
signal
Prior art date
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Pending
Application number
JP2006246327A
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English (en)
Japanese (ja)
Other versions
JP2008072166A5 (enExample
Inventor
Tomohiro Matsumoto
智宏 松本
Yosuke Ueno
洋介 植野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2006246327A priority Critical patent/JP2008072166A/ja
Priority to US11/900,110 priority patent/US7616067B2/en
Publication of JP2008072166A publication Critical patent/JP2008072166A/ja
Publication of JP2008072166A5 publication Critical patent/JP2008072166A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0895—Details of the current generators
    • H03L7/0898—Details of the current generators the source or sink current values being variable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1072—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the charge pump, e.g. changing the gain

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP2006246327A 2006-09-12 2006-09-12 位相同期回路および電子機器 Pending JP2008072166A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006246327A JP2008072166A (ja) 2006-09-12 2006-09-12 位相同期回路および電子機器
US11/900,110 US7616067B2 (en) 2006-09-12 2007-09-10 Phase synchronization circuit and electronic apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006246327A JP2008072166A (ja) 2006-09-12 2006-09-12 位相同期回路および電子機器

Publications (2)

Publication Number Publication Date
JP2008072166A true JP2008072166A (ja) 2008-03-27
JP2008072166A5 JP2008072166A5 (enExample) 2009-04-16

Family

ID=39168965

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006246327A Pending JP2008072166A (ja) 2006-09-12 2006-09-12 位相同期回路および電子機器

Country Status (2)

Country Link
US (1) US7616067B2 (enExample)
JP (1) JP2008072166A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246605A (ja) * 2008-03-31 2009-10-22 Sony Corp Ｐｌｌ回路およびそのｉｃ
JP2010035098A (ja) * 2008-07-31 2010-02-12 Sony Corp 位相同期回路並びに記録再生装置および電子機器
JP2013519312A (ja) * 2010-02-04 2013-05-23 アルテラ コーポレイション オートスピードネゴシエーションおよび他の可能な特徴を有するクロック・データ再生回路

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009038778A (ja) * 2007-08-06 2009-02-19 Nec Electronics Corp Ｖｃｏ回路及びそれを用いたｐｌｌ回路
US7884676B1 (en) * 2009-08-03 2011-02-08 Panasonic Corporation PLL/FLL circuit with gain control
KR101391352B1 (ko) * 2011-12-19 2014-05-07 삼성전자주식회사 메모리 시스템 및 그것의 프로그램 방법
JP5727961B2 (ja) * 2012-03-30 2015-06-03 ルネサスエレクトロニクス株式会社 半導体装置及びバラツキ情報取得プログラム
JP6559548B2 (ja) * 2015-11-11 2019-08-14 エイブリック株式会社 発振回路装置
US10447253B2 (en) 2017-12-13 2019-10-15 Megachips Corporation High performance PLL based on PVT independent stable oscillator
CN108711735B (zh) * 2018-08-20 2024-05-24 江苏科大亨芯半导体技术有限公司 用于直调激光驱动器的温度补偿电路
US10848164B1 (en) * 2020-02-28 2020-11-24 Ciena Corporation Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter
CN115510388B (zh) * 2022-11-23 2023-03-24 深圳市恒运昌真空技术有限公司 信号同步方法、装置和等离子电源系统

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10154934A (ja) * 1996-11-21 1998-06-09 Fujitsu Ltd 高安定化されたｐｌｌ周波数シンセサイザ回路
WO2001054283A1 (en) * 2000-01-17 2001-07-26 Fujitsu Limited Pll circuit
JP2006180428A (ja) * 2004-12-24 2006-07-06 Matsushita Electric Ind Co Ltd 位相同期回路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6998922B2 (en) * 2003-09-08 2006-02-14 Broadcom Corp. Phase locked loop modulator calibration techniques
JP2005311945A (ja) * 2004-04-26 2005-11-04 Matsushita Electric Ind Co Ltd Ｐｌｌ回路、無線通信装置及び発振周波数制御方法
US7148760B2 (en) * 2004-12-30 2006-12-12 Nokia Corporation VCO gain tuning using voltage measurements and frequency iteration

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10154934A (ja) * 1996-11-21 1998-06-09 Fujitsu Ltd 高安定化されたｐｌｌ周波数シンセサイザ回路
WO2001054283A1 (en) * 2000-01-17 2001-07-26 Fujitsu Limited Pll circuit
JP2006180428A (ja) * 2004-12-24 2006-07-06 Matsushita Electric Ind Co Ltd 位相同期回路

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246605A (ja) * 2008-03-31 2009-10-22 Sony Corp Ｐｌｌ回路およびそのｉｃ
US7965144B2 (en) 2008-03-31 2011-06-21 Sony Corporation Phase locked loop circuit and integrated circuit for the same
JP2010035098A (ja) * 2008-07-31 2010-02-12 Sony Corp 位相同期回路並びに記録再生装置および電子機器
US8089317B2 (en) 2008-07-31 2012-01-03 Sony Corporation Phase-locked loop circuit, recording-and-reproducing apparatus, and electronic apparatus
JP2013519312A (ja) * 2010-02-04 2013-05-23 アルテラ コーポレイション オートスピードネゴシエーションおよび他の可能な特徴を有するクロック・データ再生回路

Also Published As

Publication number Publication date
US20080061889A1 (en) 2008-03-13
US7616067B2 (en) 2009-11-10

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