JP2008053758A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2008053758A5 JP2008053758A5 JP2007292929A JP2007292929A JP2008053758A5 JP 2008053758 A5 JP2008053758 A5 JP 2008053758A5 JP 2007292929 A JP2007292929 A JP 2007292929A JP 2007292929 A JP2007292929 A JP 2007292929A JP 2008053758 A5 JP2008053758 A5 JP 2008053758A5
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- plug
- film
- insulating film
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 28
- 239000004020 conductor Substances 0.000 claims 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 6
- 229910052802 copper Inorganic materials 0.000 claims 6
- 239000010949 copper Substances 0.000 claims 6
- 230000004888 barrier function Effects 0.000 claims 4
- 239000002184 metal Substances 0.000 claims 4
- 229910052751 metal Inorganic materials 0.000 claims 4
- 239000000758 substrate Substances 0.000 claims 4
- 229910008482 TiSiN Inorganic materials 0.000 claims 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 2
- QRXWMOHMRWLFEY-UHFFFAOYSA-N isoniazide Chemical compound NNC(=O)C1=CC=NC=C1 QRXWMOHMRWLFEY-UHFFFAOYSA-N 0.000 claims 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 1
- 229910052814 silicon oxide Inorganic materials 0.000 claims 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007292929A JP2008053758A (ja) | 2007-11-12 | 2007-11-12 | 半導体集積回路装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007292929A JP2008053758A (ja) | 2007-11-12 | 2007-11-12 | 半導体集積回路装置 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002181974A Division JP2004031439A (ja) | 2002-06-21 | 2002-06-21 | 半導体集積回路装置およびその製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009099263A Division JP2009158987A (ja) | 2009-04-15 | 2009-04-15 | 半導体集積回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008053758A JP2008053758A (ja) | 2008-03-06 |
| JP2008053758A5 true JP2008053758A5 (enExample) | 2008-08-14 |
Family
ID=39237422
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007292929A Pending JP2008053758A (ja) | 2007-11-12 | 2007-11-12 | 半導体集積回路装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2008053758A (enExample) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08316330A (ja) * | 1995-05-12 | 1996-11-29 | Hitachi Ltd | 半導体集積回路のレイアウト方法 |
| JP2001337440A (ja) * | 2000-03-24 | 2001-12-07 | Toshiba Corp | 半導体集積回路のパターン設計方法、フォトマスク、および半導体装置 |
-
2007
- 2007-11-12 JP JP2007292929A patent/JP2008053758A/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6548377B2 (ja) | 集積回路素子及びその製造方法 | |
| JP6310217B2 (ja) | Ｔｓｖ構造を備える集積回路素子及びその製造方法 | |
| US9420683B2 (en) | Substrate embedding passive element | |
| JP2004031439A5 (enExample) | ||
| WO2015047321A8 (en) | Previous layer self-aligned via and plug patterning for back end of line (beol) interconnects | |
| JP5388768B2 (ja) | ローカルインターコネクトを備えた半導体装置 | |
| WO2012074783A3 (en) | Low-profile microelectronic package, method of manufacturing same, and electronic assembly containing same | |
| JP2011151185A5 (ja) | 半導体装置 | |
| JP2006523963A5 (enExample) | ||
| JP2010062530A5 (enExample) | ||
| JP2010192605A5 (enExample) | ||
| WO2011017202A3 (en) | Packaged semiconductor device for high performance memory and logic | |
| JP2010212445A5 (enExample) | ||
| JP2017508281A5 (enExample) | ||
| JP2012004505A5 (enExample) | ||
| JP2008205119A5 (enExample) | ||
| JP2013219348A5 (enExample) | ||
| TWI456719B (zh) | 穿矽通孔及其製作方法 | |
| SG141230A1 (en) | Method of a non-metal barrier copper damascene integration | |
| US9425191B2 (en) | Memory device and manufacturing method of the same | |
| WO2006098820A3 (en) | Method of forming a semiconductor device having a diffusion barrier stack and structure thereof | |
| JP2003332428A5 (enExample) | ||
| CN101882611A (zh) | 集成电路芯片 | |
| JP2014090170A5 (enExample) | ||
| JP2003249626A5 (enExample) |