JP2007518272A - 歪みｆｉｎｆｅｔチャネルの製造方法 - Google Patents

歪みｆｉｎｆｅｔチャネルの製造方法 Download PDF

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Publication number
JP2007518272A
JP2007518272A JP2006549312A JP2006549312A JP2007518272A JP 2007518272 A JP2007518272 A JP 2007518272A JP 2006549312 A JP2006549312 A JP 2006549312A JP 2006549312 A JP2006549312 A JP 2006549312A JP 2007518272 A JP2007518272 A JP 2007518272A
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Japan
Prior art keywords
layer
semiconductor layer
fin
strained
compound semiconductor
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JP2006549312A
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English (en)
Japanese (ja)
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JP2007518272A5 (enExample
Inventor
シャン キ
エヌ． パン ジェイムズ
グー ジャン−スク
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2007518272A publication Critical patent/JP2007518272A/ja
Publication of JP2007518272A5 publication Critical patent/JP2007518272A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2006549312A 2004-01-12 2004-12-21 歪みｆｉｎｆｅｔチャネルの製造方法 Pending JP2007518272A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/755,763 US7138302B2 (en) 2004-01-12 2004-01-12 Method of fabricating an integrated circuit channel region
PCT/US2004/043106 WO2005071728A1 (en) 2004-01-12 2004-12-21 Method of fabricating a strained finfet channel

Publications (2)

Publication Number Publication Date
JP2007518272A true JP2007518272A (ja) 2007-07-05
JP2007518272A5 JP2007518272A5 (enExample) 2008-02-14

Family

ID=34739641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006549312A Pending JP2007518272A (ja) 2004-01-12 2004-12-21 歪みｆｉｎｆｅｔチャネルの製造方法

Country Status (8)

Country Link
US (1) US7138302B2 (enExample)
EP (1) EP1723668B1 (enExample)
JP (1) JP2007518272A (enExample)
KR (1) KR101065049B1 (enExample)
CN (1) CN100477126C (enExample)
DE (2) DE112004002641B4 (enExample)
TW (1) TWI360197B (enExample)
WO (1) WO2005071728A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012212756A (ja) * 2011-03-31 2012-11-01 Takehide Shirato 半導体記憶装置
JP2013055206A (ja) * 2011-09-03 2013-03-21 Takehide Shirato 半導体装置及びその製造方法

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US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
KR100618852B1 (ko) * 2004-07-27 2006-09-01 삼성전자주식회사 높은 동작 전류를 갖는 반도체 소자
US7393733B2 (en) 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
US7271448B2 (en) * 2005-02-14 2007-09-18 Taiwan Semiconductor Manufacturing Co., Ltd. Multiple gate field effect transistor structure
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
WO2007112066A2 (en) 2006-03-24 2007-10-04 Amberwave Systems Corporation Lattice-mismatched semiconductor structures and related methods for device fabrication
US7365401B2 (en) * 2006-03-28 2008-04-29 International Business Machines Corporation Dual-plane complementary metal oxide semiconductor
WO2008030574A1 (en) 2006-09-07 2008-03-13 Amberwave Systems Corporation Defect reduction using aspect ratio trapping
US7799592B2 (en) 2006-09-27 2010-09-21 Taiwan Semiconductor Manufacturing Company, Ltd. Tri-gate field-effect transistors formed by aspect ratio trapping
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
US8502263B2 (en) 2006-10-19 2013-08-06 Taiwan Semiconductor Manufacturing Company, Ltd. Light-emitter-based devices with lattice-mismatched semiconductor structures
US7772048B2 (en) * 2007-02-23 2010-08-10 Freescale Semiconductor, Inc. Forming semiconductor fins using a sacrificial fin
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US9508890B2 (en) 2007-04-09 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Photovoltaics on silicon
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
WO2009035746A2 (en) 2007-09-07 2009-03-19 Amberwave Systems Corporation Multi-junction solar cells
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
US7872303B2 (en) * 2008-08-14 2011-01-18 International Business Machines Corporation FinFET with longitudinal stress in a channel
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
WO2010033813A2 (en) 2008-09-19 2010-03-25 Amberwave System Corporation Formation of devices by epitaxial layer overgrowth
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
CN102379046B (zh) 2009-04-02 2015-06-17 台湾积体电路制造股份有限公司 从晶体材料的非极性平面形成的器件及其制作方法
FR3029011B1 (fr) * 2014-11-25 2018-04-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede ameliore de mise en contrainte d'une zone de canal de transistor
US9362400B1 (en) 2015-03-06 2016-06-07 International Business Machines Corporation Semiconductor device including dielectrically isolated finFETs and buried stressor
US10411128B1 (en) 2018-05-22 2019-09-10 International Business Machines Corporation Strained fin channel devices

Citations (4)

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JP2002076334A (ja) * 2000-08-30 2002-03-15 Hitachi Ltd 半導体装置及びその製造方法
JP2003243667A (ja) * 2002-02-22 2003-08-29 Toshiba Corp 半導体装置、半導体装置の製造方法、半導体基板の製造方法
WO2003081640A2 (en) * 2002-03-19 2003-10-02 International Business Machines Corporation Strained fin fets structure and method
JP2004128185A (ja) * 2002-10-02 2004-04-22 Renesas Technology Corp 絶縁ゲート型電界効果型トランジスタ及び半導体装置、並びにその製造方法

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US6197641B1 (en) 1998-08-28 2001-03-06 Lucent Technologies Inc. Process for fabricating vertical transistors
CN1225799C (zh) * 2002-04-24 2005-11-02 华邦电子股份有限公司 金属氧化物半导体场效应晶体管及其制造方法
WO2003105189A2 (en) 2002-06-07 2003-12-18 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US6645797B1 (en) 2002-12-06 2003-11-11 Advanced Micro Devices, Inc. Method for forming fins in a FinFET device using sacrificial carbon layer
US6806534B2 (en) * 2003-01-14 2004-10-19 International Business Machines Corporation Damascene method for improved MOS transistor
US6815738B2 (en) 2003-02-28 2004-11-09 International Business Machines Corporation Multiple gate MOSFET structure with strained Si Fin body
EP1602125B1 (en) * 2003-03-07 2019-06-26 Taiwan Semiconductor Manufacturing Company, Ltd. Shallow trench isolation process
US6835618B1 (en) * 2003-08-05 2004-12-28 Advanced Micro Devices, Inc. Epitaxially grown fin for FinFET
US6855583B1 (en) * 2003-08-05 2005-02-15 Advanced Micro Devices, Inc. Method for forming tri-gate FinFET with mesa isolation
US6955969B2 (en) * 2003-09-03 2005-10-18 Advanced Micro Devices, Inc. Method of growing as a channel region to reduce source/drain junction capacitance

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002076334A (ja) * 2000-08-30 2002-03-15 Hitachi Ltd 半導体装置及びその製造方法
JP2003243667A (ja) * 2002-02-22 2003-08-29 Toshiba Corp 半導体装置、半導体装置の製造方法、半導体基板の製造方法
WO2003081640A2 (en) * 2002-03-19 2003-10-02 International Business Machines Corporation Strained fin fets structure and method
JP2004128185A (ja) * 2002-10-02 2004-04-22 Renesas Technology Corp 絶縁ゲート型電界効果型トランジスタ及び半導体装置、並びにその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012212756A (ja) * 2011-03-31 2012-11-01 Takehide Shirato 半導体記憶装置
JP2013055206A (ja) * 2011-09-03 2013-03-21 Takehide Shirato 半導体装置及びその製造方法

Also Published As

Publication number Publication date
TWI360197B (en) 2012-03-11
DE602004006782T2 (de) 2008-01-24
CN100477126C (zh) 2009-04-08
EP1723668A1 (en) 2006-11-22
TW200529367A (en) 2005-09-01
WO2005071728A1 (en) 2005-08-04
KR101065049B1 (ko) 2011-09-19
DE112004002641T5 (de) 2006-12-14
US7138302B2 (en) 2006-11-21
US20050153486A1 (en) 2005-07-14
EP1723668B1 (en) 2007-05-30
CN1902744A (zh) 2007-01-24
DE112004002641B4 (de) 2009-01-02
DE602004006782D1 (de) 2007-07-12
KR20060130098A (ko) 2006-12-18

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