DE602004006782D1 - Verfahren zur herstellung eines verspannten finfet-kanals - Google Patents

Verfahren zur herstellung eines verspannten finfet-kanals

Info

Publication number
DE602004006782D1
DE602004006782D1 DE602004006782T DE602004006782T DE602004006782D1 DE 602004006782 D1 DE602004006782 D1 DE 602004006782D1 DE 602004006782 T DE602004006782 T DE 602004006782T DE 602004006782 T DE602004006782 T DE 602004006782T DE 602004006782 D1 DE602004006782 D1 DE 602004006782D1
Authority
DE
Germany
Prior art keywords
producing
finfet channel
separate
separate finfet
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004006782T
Other languages
English (en)
Other versions
DE602004006782T2 (de
Inventor
Qi Xiang
James N Pan
Jung-Suk Goo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GlobalFoundries Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE602004006782D1 publication Critical patent/DE602004006782D1/de
Application granted granted Critical
Publication of DE602004006782T2 publication Critical patent/DE602004006782T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/785Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE602004006782T 2004-01-12 2004-12-21 Verfahren zur herstellung eines verformten finfet-kanals Active DE602004006782T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US755763 2004-01-12
US10/755,763 US7138302B2 (en) 2004-01-12 2004-01-12 Method of fabricating an integrated circuit channel region
PCT/US2004/043106 WO2005071728A1 (en) 2004-01-12 2004-12-21 Method of fabricating a strained finfet channel

Publications (2)

Publication Number Publication Date
DE602004006782D1 true DE602004006782D1 (de) 2007-07-12
DE602004006782T2 DE602004006782T2 (de) 2008-01-24

Family

ID=34739641

Family Applications (2)

Application Number Title Priority Date Filing Date
DE112004002641T Active DE112004002641B4 (de) 2004-01-12 2004-12-21 Verfahren zur Herstellung eines verformten FinFET-Kanals
DE602004006782T Active DE602004006782T2 (de) 2004-01-12 2004-12-21 Verfahren zur herstellung eines verformten finfet-kanals

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE112004002641T Active DE112004002641B4 (de) 2004-01-12 2004-12-21 Verfahren zur Herstellung eines verformten FinFET-Kanals

Country Status (8)

Country Link
US (1) US7138302B2 (de)
EP (1) EP1723668B1 (de)
JP (1) JP2007518272A (de)
KR (1) KR101065049B1 (de)
CN (1) CN100477126C (de)
DE (2) DE112004002641B4 (de)
TW (1) TWI360197B (de)
WO (1) WO2005071728A1 (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
KR100618852B1 (ko) * 2004-07-27 2006-09-01 삼성전자주식회사 높은 동작 전류를 갖는 반도체 소자
US7393733B2 (en) 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
US7271448B2 (en) * 2005-02-14 2007-09-18 Taiwan Semiconductor Manufacturing Co., Ltd. Multiple gate field effect transistor structure
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US7777250B2 (en) 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
US7365401B2 (en) * 2006-03-28 2008-04-29 International Business Machines Corporation Dual-plane complementary metal oxide semiconductor
US8173551B2 (en) 2006-09-07 2012-05-08 Taiwan Semiconductor Manufacturing Co., Ltd. Defect reduction using aspect ratio trapping
WO2008039534A2 (en) 2006-09-27 2008-04-03 Amberwave Systems Corporation Quantum tunneling devices and circuits with lattice- mismatched semiconductor structures
WO2008039495A1 (en) 2006-09-27 2008-04-03 Amberwave Systems Corporation Tri-gate field-effect transistors formed by aspect ratio trapping
WO2008051503A2 (en) 2006-10-19 2008-05-02 Amberwave Systems Corporation Light-emitter-based devices with lattice-mismatched semiconductor structures
US7772048B2 (en) * 2007-02-23 2010-08-10 Freescale Semiconductor, Inc. Forming semiconductor fins using a sacrificial fin
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
WO2008124154A2 (en) 2007-04-09 2008-10-16 Amberwave Systems Corporation Photovoltaics on silicon
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
JP2010538495A (ja) 2007-09-07 2010-12-09 アンバーウェーブ・システムズ・コーポレーション 多接合太陽電池
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
US7872303B2 (en) * 2008-08-14 2011-01-18 International Business Machines Corporation FinFET with longitudinal stress in a channel
CN102160145B (zh) 2008-09-19 2013-08-21 台湾积体电路制造股份有限公司 通过外延层过成长的元件形成
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
EP2415083B1 (de) 2009-04-02 2017-06-21 Taiwan Semiconductor Manufacturing Company, Ltd. Aus einer nicht polaren ebene eines kristallinen materials geformte vorrichtungen und verfahren zu ihrer herstellung
JP5666961B2 (ja) * 2011-03-31 2015-02-12 猛英 白土 半導体記憶装置
JP5667017B2 (ja) * 2011-09-03 2015-02-12 猛英 白土 半導体装置及びその製造方法
FR3029011B1 (fr) 2014-11-25 2018-04-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede ameliore de mise en contrainte d'une zone de canal de transistor
US9362400B1 (en) 2015-03-06 2016-06-07 International Business Machines Corporation Semiconductor device including dielectrically isolated finFETs and buried stressor
US10411128B1 (en) 2018-05-22 2019-09-10 International Business Machines Corporation Strained fin channel devices

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6197641B1 (en) 1998-08-28 2001-03-06 Lucent Technologies Inc. Process for fabricating vertical transistors
JP2002076334A (ja) * 2000-08-30 2002-03-15 Hitachi Ltd 半導体装置及びその製造方法
JP3782021B2 (ja) 2002-02-22 2006-06-07 株式会社東芝 半導体装置、半導体装置の製造方法、半導体基板の製造方法
US6635909B2 (en) 2002-03-19 2003-10-21 International Business Machines Corporation Strained fin FETs structure and method
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
WO2003105189A2 (en) 2002-06-07 2003-12-18 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
JP4546021B2 (ja) * 2002-10-02 2010-09-15 ルネサスエレクトロニクス株式会社 絶縁ゲート型電界効果型トランジスタ及び半導体装置
US6645797B1 (en) 2002-12-06 2003-11-11 Advanced Micro Devices, Inc. Method for forming fins in a FinFET device using sacrificial carbon layer
US6806534B2 (en) * 2003-01-14 2004-10-19 International Business Machines Corporation Damascene method for improved MOS transistor
US6815738B2 (en) 2003-02-28 2004-11-09 International Business Machines Corporation Multiple gate MOSFET structure with strained Si Fin body
JP4585510B2 (ja) * 2003-03-07 2010-11-24 台湾積體電路製造股▲ふん▼有限公司 シャロートレンチアイソレーションプロセス
US6855583B1 (en) * 2003-08-05 2005-02-15 Advanced Micro Devices, Inc. Method for forming tri-gate FinFET with mesa isolation
US6835618B1 (en) * 2003-08-05 2004-12-28 Advanced Micro Devices, Inc. Epitaxially grown fin for FinFET
US6955969B2 (en) * 2003-09-03 2005-10-18 Advanced Micro Devices, Inc. Method of growing as a channel region to reduce source/drain junction capacitance

Also Published As

Publication number Publication date
EP1723668A1 (de) 2006-11-22
DE602004006782T2 (de) 2008-01-24
CN100477126C (zh) 2009-04-08
KR101065049B1 (ko) 2011-09-19
US7138302B2 (en) 2006-11-21
WO2005071728A1 (en) 2005-08-04
CN1902744A (zh) 2007-01-24
DE112004002641B4 (de) 2009-01-02
TWI360197B (en) 2012-03-11
DE112004002641T5 (de) 2006-12-14
KR20060130098A (ko) 2006-12-18
JP2007518272A (ja) 2007-07-05
EP1723668B1 (de) 2007-05-30
US20050153486A1 (en) 2005-07-14
TW200529367A (en) 2005-09-01

Similar Documents

Publication Publication Date Title
DE602004006782D1 (de) Verfahren zur herstellung eines verspannten finfet-kanals
DE602005017522D1 (de) Verfahren zur Herstellung eines FinFET mit mehrseitigem Kanal
DE502005008796D1 (de) Verfahren zur Herstellung eines lateralen DMOS-Transistors
DE112006004256A5 (de) Verfahren zur Herstellung eines SOI-Bauelements
DE602005025965D1 (de) Verfahren zur Herstellung eines Reissverschlussbandes
DE602006004751D1 (de) Verfahren zur Herstellung eines planaren Kondensators
ATE408609T1 (de) Verfahren zur herstellung von n-phenylpyrazol-1- carboxamiden
ATE349408T1 (de) Verfahren zur herstellung verzweigter kohlenwasserstoffe
ATE477084T1 (de) Verfahren zur herstellung eines strukturierten schleifkörpers
DE602005007670D1 (de) Vorrichtung zur Herstellung eines Gummistreifens
DE602005016091D1 (de) Verfahren zur herstellung eines holzformteils
ATE548409T1 (de) Verfahren zur herstellung eines vernetzten elastomers
DE50302301D1 (de) Verfahren zur herstellung eines formteiles
ATE554489T1 (de) Verfahren zur herstellung eines transformators
ATE414058T1 (de) Verfahren zur herstellung eines sulfinyl- acetamids
DE502007005615D1 (de) Verfahren zur herstellung eines piezoaktors
DE112005000864A5 (de) Verfahren zur Herstellung eines dentalen Passkörpers
DE50305969D1 (de) Verfahren zur herstellung eines kurzkanal-feldeffekttransistors
ATE549314T1 (de) Verfahren zur herstellung von 4-aminochinazolinen
DE602004007783D1 (de) Verfahren zur herstellung eines schichtkörpers
DE602006021606D1 (de) Verfahren zur herstellung eines gaba-haltigen fermentationsprodukts
DE60317715D1 (de) Verfahren zur herstellung eines sektionaltorpaneels
ATE478071T1 (de) Verfahren zur herstellung neuer tiotropiumsalze
ATE392404T1 (de) Verfahren zur herstellung von methanol
ATE538519T1 (de) Bauelement zur herstellung eines kabelkanals

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GLOBALFOUNDRIES INC., GRAND CAYMAN, KY

8328 Change in the person/name/address of the agent

Representative=s name: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER,